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what's new updates
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Release 0.9.0 7-Jul-2015
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Release 0.9.0 11-Jul-2015
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-------------------------
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Full details about new features and changes can be found here:
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@ -44,7 +44,7 @@ master_doc = 'index'
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# General information about the project.
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project = u'MyHDL'
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copyright = u'2014, Jan Decaluwe'
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copyright = u'2015, Jan Decaluwe'
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# The version info for the project you're documenting, acts as replacement for
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# |version| and |release|, also used in various other places throughout the
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=======================================
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New in MyHDL 0.4: Conversion to Verilog
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=======================================
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==============================================
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What's new in MyHDL 0.4: Conversion to Verilog
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==============================================
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:Author: Jan Decaluwe
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What's new in MyHDL 0.9
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***********************
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Python 3 Support
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Python 3 support
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================
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Experimental Python 3 support has been added to MyHDL 0.9
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Experimental Python 3 support has been added to MyHDL 0.9.
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This was a major effort to modernize the code. As a result,
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Python 2 and 3 are supported from a single codebase.
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See :doc:`/python3` for more info.
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@ -71,3 +74,41 @@ For additional information see the original proposal `mep-107`_.
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.. _mep-107: http://dev.myhdl.org/meps/mep-107.html
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.. _MyHDL generator: http://docs.myhdl.org/en/latest/manual/reference.html#myhdl-generators-and-trigger-objects
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Other noteworthy improvements
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=============================
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``ConcatSignal`` interface
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--------------------------
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The interface of :class:`ConcatSignal` was enhanced. In
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addition to signals, you can now also use constant values
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in the concatenation.
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``std_logic`` type ports
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------------------------
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:func:`toVHDL` has a new attibute ``std_logic_ports``. When
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set, only ``std_logic`` type ports are used in the interface
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of the top-level VHDL module.
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Development flow
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----------------
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The MyHDL development flow has been modernized by moving to git and `github`_
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for version control. In addition, travis has set up so that all pull requests
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are tested automatically, enabling continuous intergration.
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Acknowledgments
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===============
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The Python 3 support effort was coordinated by Keerthan Jaic, who also
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implemented most of if. Convertible interfaces were championed by Chris Felton,
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and implemented by Keerthan Jaic.
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MyHDL development is a collaborative effort, as can be seen on `github`_.
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Thanks to all who contributed with suggestions, issues and pull requests.
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.. _github: https://www.github.com/jandecaluwe/myhdl
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