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Fixed _VHDLNameValidation.py method calls in _toVHDL.py
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e11125a07a
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7f31b570f7
@ -354,7 +354,7 @@ def _writeModuleHeader(f, intf, needPck, lib, arch, useClauses, doc, stdLogicPor
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if convertPort:
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if convertPort:
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pt = "std_logic_vector"
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pt = "std_logic_vector"
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# Check if VHDL keyword or reused name
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# Check if VHDL keyword or reused name
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_nameCheck._nameValid(s)
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_VHDLNameValidation._nameValid(s)
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if s._driven:
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if s._driven:
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if s._read:
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if s._read:
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if not isinstance(s, _TristateSignal):
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if not isinstance(s, _TristateSignal):
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@ -419,7 +419,7 @@ def _writeSigDecls(f, intf, siglist, memlist):
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print("signal %s: %s%s;" % (s._name, p, r), file=f)
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print("signal %s: %s%s;" % (s._name, p, r), file=f)
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elif s._read:
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elif s._read:
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# Check if VHDL keyword or reused name
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# Check if VHDL keyword or reused name
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_nameCheck._nameValid(s)
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_VHDLNameValidation._nameValid(s)
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# the original exception
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# the original exception
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# raise ToVHDLError(_error.UndrivenSignal, s._name)
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# raise ToVHDLError(_error.UndrivenSignal, s._name)
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# changed to a warning and a continuous assignment to a wire
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# changed to a warning and a continuous assignment to a wire
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@ -440,7 +440,7 @@ def _writeSigDecls(f, intf, siglist, memlist):
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if not m._driven and not m._read:
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if not m._driven and not m._read:
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continue
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continue
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# Check if VHDL keyword or reused name
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# Check if VHDL keyword or reused name
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_nameCheck._nameValid(m)
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_VHDLNameValidation._nameValid(m)
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r = _getRangeString(m.elObj)
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r = _getRangeString(m.elObj)
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p = _getTypeString(m.elObj)
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p = _getTypeString(m.elObj)
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t = "t_array_%s" % m.name
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t = "t_array_%s" % m.name
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