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Use to_string to support long vectors; with various implications...
This commit is contained in:
parent
0d9dc8f45a
commit
86ec7e81c9
164
myhdl/_intbv.py
164
myhdl/_intbv.py
@ -29,7 +29,7 @@ from myhdl._bin import bin
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class intbv(object):
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#__slots__ = ('_val', '_min', '_max', '_nrbits', '_handleBounds')
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def __init__(self, val=0, min=None, max=None, _nrbits=0):
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if _nrbits:
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self._min = 0
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@ -60,7 +60,7 @@ class intbv(object):
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raise TypeError("intbv constructor arg should be int or string")
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self._nrbits = _nrbits
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self._handleBounds()
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# support for the 'min' and 'max' attribute
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@property
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def max(self):
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@ -79,7 +79,7 @@ class intbv(object):
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if self._val < self._min:
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raise ValueError("intbv value %s < minimum %s" %
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(self._val, self._min))
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def _hasFullRange(self):
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min, max = self._min, self._max
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if max <= 0:
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@ -92,7 +92,7 @@ class intbv(object):
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# hash
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def __hash__(self):
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raise TypeError("intbv objects are unhashable")
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# copy methods
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def __copy__(self):
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c = type(self)(self._val)
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@ -149,7 +149,7 @@ class intbv(object):
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return res
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def __setitem__(self, key, val):
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# convert val to int to avoid confusion with intbv or Signals
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val = int(val)
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@ -187,13 +187,13 @@ class intbv(object):
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else:
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raise ValueError("intbv[i] = v requires v in (0, 1)\n" \
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" i == %s " % i)
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self._handleBounds()
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# integer-like methods
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def __add__(self, other):
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if isinstance(other, intbv):
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return self._val + other._val
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@ -201,7 +201,7 @@ class intbv(object):
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return self._val + other
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def __radd__(self, other):
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return other + self._val
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def __sub__(self, other):
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if isinstance(other, intbv):
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return self._val - other._val
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@ -225,7 +225,7 @@ class intbv(object):
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return self._val / other
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def __rtruediv__(self, other):
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return other / self._val
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def __floordiv__(self, other):
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if isinstance(other, intbv):
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return self._val // other._val
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@ -233,7 +233,7 @@ class intbv(object):
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return self._val // other
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def __rfloordiv__(self, other):
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return other // self._val
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def __mod__(self, other):
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if isinstance(other, intbv):
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return self._val % other._val
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@ -243,7 +243,7 @@ class intbv(object):
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return other % self._val
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# divmod
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def __pow__(self, other):
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if isinstance(other, intbv):
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return self._val ** other._val
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@ -259,7 +259,7 @@ class intbv(object):
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return intbv(long(self._val) << other)
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def __rlshift__(self, other):
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return other << self._val
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def __rshift__(self, other):
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if isinstance(other, intbv):
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return intbv(self._val >> other._val)
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@ -267,7 +267,7 @@ class intbv(object):
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return intbv(self._val >> other)
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def __rrshift__(self, other):
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return other >> self._val
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def __and__(self, other):
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if isinstance(other, intbv):
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return intbv(self._val & other._val)
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@ -283,7 +283,7 @@ class intbv(object):
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return intbv(self._val | other)
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def __ror__(self, other):
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return intbv(other | self._val)
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def __xor__(self, other):
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if isinstance(other, intbv):
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return intbv(self._val ^ other._val)
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@ -299,7 +299,7 @@ class intbv(object):
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self._val += other
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self._handleBounds()
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return self
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def __isub__(self, other):
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if isinstance(other, intbv):
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self._val -= other._val
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@ -307,7 +307,7 @@ class intbv(object):
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self._val -= other
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self._handleBounds()
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return self
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def __imul__(self, other):
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if isinstance(other, intbv):
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self._val *= other._val
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@ -315,7 +315,7 @@ class intbv(object):
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self._val *= other
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self._handleBounds()
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return self
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def __ifloordiv__(self, other):
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if isinstance(other, intbv):
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self._val //= other._val
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@ -328,7 +328,7 @@ class intbv(object):
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raise TypeError("intbv: Augmented classic division not supported")
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def __itruediv__(self, other):
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raise TypeError("intbv: Augmented true division not supported")
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def __imod__(self, other):
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if isinstance(other, intbv):
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self._val %= other._val
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@ -336,10 +336,10 @@ class intbv(object):
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self._val %= other
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self._handleBounds()
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return self
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def __ipow__(self, other, modulo=None):
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# XXX why 3rd param required?
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# unused but needed in 2.2, not in 2.3
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# unused but needed in 2.2, not in 2.3
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if isinstance(other, intbv):
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self._val **= other._val
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else:
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@ -348,7 +348,7 @@ class intbv(object):
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raise ValueError("intbv value should be integer")
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self._handleBounds()
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return self
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def __iand__(self, other):
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if isinstance(other, intbv):
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self._val &= other._val
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@ -404,10 +404,10 @@ class intbv(object):
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return intbv(~self._val & (long(1) << self._nrbits)-1)
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else:
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return intbv(~self._val)
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def __int__(self):
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return int(self._val)
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def __long__(self):
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return long(self._val)
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@ -415,16 +415,16 @@ class intbv(object):
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return float(self._val)
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# XXX __complex__ seems redundant ??? (complex() works as such?)
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def __oct__(self):
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return oct(self._val)
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def __hex__(self):
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return hex(self._val)
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def __index__(self):
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return int(self._val)
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# comparisons
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def __eq__(self, other):
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if isinstance(other, intbv):
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@ -457,67 +457,83 @@ class intbv(object):
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else:
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return self._val >= other
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# representation
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# representation
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def __str__(self):
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return str(self._val)
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# represent in hex format, to handle VHDL long vectors
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v = int(self._val)
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nrbits = self._nrbits
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if nrbits:
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# represent negative values without minus sign
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# I would prefer sign extension with hex format, but to
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# align with Verilog $display I don't do that
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if v < 0:
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v = 2**nrbits + v
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w = (nrbits-1) // 4 + 1
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return "{:0{w}x}".format(v, w=w)
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else:
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return "{:x}".format(v)
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def __repr__(self):
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return "intbv(" + repr(self._val) + ")"
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def signed(self):
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''' return integer with the signed value of the intbv instance
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''' Return new intbv with the values interpreted as signed
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The intbv.signed() function will classify the value of the intbv
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instance either as signed or unsigned. If the value is classified
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as signed it will be returned unchanged as integer value. If the
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value is considered unsigned, the bits as specified by _nrbits
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will be considered as 2's complement number and returned. This
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feature will allow to create slices and have the sliced bits be
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considered a 2's complement number.
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The intbv.signed() function will classify the value of the intbv
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instance either as signed or unsigned. If the value is classified
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as signed it will be returned unchanged as integer value. If the
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value is considered unsigned, the bits as specified by _nrbits
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will be considered as 2's complement number and returned. This
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feature will allow to create slices and have the sliced bits be
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considered a 2's complement number.
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The classification is based on the following possible combinations
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of the min and max value.
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The classification is based on the following possible combinations
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of the min and max value.
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----+----+----+----+----+----+----+----
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-3 -2 -1 0 1 2 3
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1 min max
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2 min max
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3 min max
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4 min max
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5 min max
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6 min max
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7 min max
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8 neither min nor max is set
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9 only max is set
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10 only min is set
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1 min max
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2 min max
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3 min max
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4 min max
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5 min max
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6 min max
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7 min max
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8 neither min nor max is set
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9 only max is set
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10 only min is set
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From the above cases, # 1 and 2 are considered unsigned and the
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signed() function will convert the value to a signed number.
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Decision about the sign will be done based on the msb. The msb is
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based on the _nrbits value.
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So the test will be if min >= 0 and _nrbits > 0. Then the instance
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is considered unsigned and the value is returned as 2's complement
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number.
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'''
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From the above cases, # 1 and 2 are considered unsigned and the
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signed() function will convert the value to a signed number.
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Decision about the sign will be done based on the msb. The msb is
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based on the _nrbits value.
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# value is considered unsigned
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if self.min is not None and self.min >= 0 and self._nrbits > 0:
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So the test will be if min >= 0 and _nrbits > 0. Then the instance
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is considered unsigned and the value is returned as 2's complement
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number.
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'''
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# get 2's complement value of bits
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msb = self._nrbits-1
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# value is considered unsigned
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if self.min is not None and self.min >= 0 and self._nrbits:
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sign = ((self._val >> msb) & 0x1) > 0
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# mask off the bits msb-1:lsb, they are always positive
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mask = (1<<msb) - 1
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retVal = self._val & mask
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# if sign bit is set, subtract the value of the sign bit
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if sign:
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retVal -= 1<<msb
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# get 2's complement value of bits
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msb = self._nrbits-1
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else: # value is returned just as is
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retVal = self._val
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sign = ((self._val >> msb) & 0x1) > 0
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return retVal
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# mask off the bits msb-1:lsb, they are always positive
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mask = (1<<msb) - 1
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retVal = self._val & mask
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# if sign bit is set, subtract the value of the sign bit
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if sign:
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retVal -= 1<<msb
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else: # value is returned just as is
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retVal = self._val
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if self._nrbits:
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M = 2**(self._nrbits-1)
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return intbv(retVal, min=-M, max=M)
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else:
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return intbv(retVal)
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@ -469,6 +469,7 @@ class _AnalyzeVisitor(ast.NodeVisitor, _ConversionMixin):
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self.tree.kind = _kind.TASK
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# self.access = _access.OUTPUT
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self.visit(node.value)
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node.obj = node.value.obj
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# self.access = _access.INPUT
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def getAttr(self, node):
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@ -480,6 +481,7 @@ class _AnalyzeVisitor(ast.NodeVisitor, _ConversionMixin):
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raise AssertionError("attribute target: %s" % n)
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obj = node.value.obj
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if isinstance(obj, _Signal):
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print ('analyze', node.value.id)
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if node.attr == 'posedge':
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node.obj = obj.posedge
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elif node.attr == 'negedge':
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@ -590,7 +592,12 @@ class _AnalyzeVisitor(ast.NodeVisitor, _ConversionMixin):
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node.obj = delay(0)
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### suprize: identity comparison on unbound methods doesn't work in python 2.5??
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elif f == intbv.signed:
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node.obj = int(-1)
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obj = node.func.value.obj
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if len(obj):
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M = 2 ** (len(obj)-1)
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node.obj = intbv(-1, min=-M, max=M)
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else:
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node.obj = intbv(-1)
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elif f in myhdlObjects:
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pass
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elif f in builtinObjects:
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@ -1347,14 +1347,19 @@ class _ConvertVisitor(ast.NodeVisitor, _ConversionMixin):
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else:
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a = node.args[argnr]
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argnr += 1
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to_string = "to_string"
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if s.conv is int:
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a.vhd = vhd_int()
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else:
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if isinstance(a.vhdOri, vhd_vector):
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a.vhd = vhd_int()
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to_string = "to_hstring"
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# to_hstring correctly does sign extension
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# however, Verilog doesn not: therefore, interprete
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# print values as unsigned...
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a.vhd = vhd_unsigned(a.vhd.size)
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elif isinstance(a.vhdOri, vhd_std_logic):
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a.vhd = vhd_boolean()
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self.write("write(L, to_string(")
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self.write("write(L, %s(" % to_string)
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self.visit(a)
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self.write("))")
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self.write(';')
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@ -1987,7 +1992,7 @@ class _AnnotateTypesVisitor(ast.NodeVisitor, _ConversionMixin):
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def visit_Attribute(self, node):
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self.generic_visit(node)
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node.vhd = copy(node.value.vhd)
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node.vhd = inferVhdlObj(node.obj)
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node.vhdOri = copy(node.vhd)
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def visit_Assert(self, node):
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@ -2036,6 +2041,7 @@ class _AnnotateTypesVisitor(ast.NodeVisitor, _ConversionMixin):
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node.vhd = vhd_nat()
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elif f == intbv.signed: # note equality comparison
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# this comes from a getattr
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# node.vhd = vhd_int()
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node.vhd = vhd_signed(fn.value.vhd.size)
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elif hasattr(node, 'tree'):
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v = _AnnotateTypesVisitor(node.tree)
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@ -1061,7 +1061,10 @@ class _ConvertVisitor(ast.NodeVisitor, _ConversionMixin):
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a = node.args[argnr]
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argnr += 1
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obj = a.obj
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fs = "%0d"
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if s.conv is int or isinstance(obj, int):
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fs = "%0d"
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else:
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fs = "%h"
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self.context =_context.PRINT
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if isinstance(obj, str):
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self.write('$write(')
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@ -1092,6 +1095,7 @@ class _ConvertVisitor(ast.NodeVisitor, _ConversionMixin):
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self.writeline()
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self.write("endcase")
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else:
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print (type(obj), type(a))
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self.write('$write("%s", ' % fs)
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self.visit(a)
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self.write(');')
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@ -57,80 +57,80 @@ def PlainIntbv():
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# intbv with positive range, pos number, and msb not set, return signed()
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# Expect the number to be returned
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a1 = intbv(0x3b, min=0, max=0x7c)
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b = a1.signed()
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assert b == 0x3b
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b1 = a1.signed()
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assert b1 == 0x3b
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# intbv with positive range, pos number, and msb set, return signed()
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# test various bit patterns to see that the 2's complement
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# conversion works correct
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# Expect the number to be converted to a negative number
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a2 = intbv(7, min=0, max=8)
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b = a2.signed()
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assert b == -1
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b2 = a2.signed()
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assert b2 == -1
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a3 = intbv(6, min=0, max=8)
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b = a3.signed()
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assert b == -2
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b3 = a3.signed()
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assert b3 == -2
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a4 = intbv(5, min=0, max=8)
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b = a4.signed()
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assert b == -3
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b4 = a4.signed()
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assert b4 == -3
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# set bit #3 and increase the range so that the set bit is considered
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# the sign bit. Here min = 0
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# Expect to return -4
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a5 = intbv(4, min=0, max=5)
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b = a5.signed()
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assert b == -4
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b5 = a5.signed()
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assert b5 == -4
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a6 = intbv(4, min=0, max=6)
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b = a6.signed()
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assert b == -4
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b6 = a6.signed()
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assert b6 == -4
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a7 = intbv(4, min=0, max=7)
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b = a7.signed()
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assert b == -4
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b7 = a7.signed()
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assert b7 == -4
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a8 = intbv(4, min=0, max=8)
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b = a8.signed()
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assert b == -4
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b8 = a8.signed()
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assert b8 == -4
|
||||
|
||||
# here it is not the sign bit anymore
|
||||
# Expect the value to be 4
|
||||
a9 = intbv(4, min=0, max=9)
|
||||
b = a9.signed()
|
||||
assert b == 4
|
||||
b9 = a9.signed()
|
||||
assert b9 == 4
|
||||
|
||||
# set bit #3 and increase the range so that the set bit is considered
|
||||
# the sign bit. Here min > 0
|
||||
# Expect to return -4
|
||||
a10 = intbv(4, min=1, max=5)
|
||||
b = a10.signed()
|
||||
assert b == -4
|
||||
b10 = a10.signed()
|
||||
assert b10 == -4
|
||||
|
||||
a11 = intbv(4, min=2, max=6)
|
||||
b = a11.signed()
|
||||
assert b == -4
|
||||
b11 = a11.signed()
|
||||
assert b11 == -4
|
||||
|
||||
a12 = intbv(4, min=3, max=7)
|
||||
b = a12.signed()
|
||||
assert b == -4
|
||||
b12 = a12.signed()
|
||||
assert b12 == -4
|
||||
|
||||
a13 = intbv(4, min=4, max=8)
|
||||
b = a13.signed()
|
||||
assert b == -4
|
||||
b13 = a13.signed()
|
||||
assert b13 == -4
|
||||
|
||||
# again with min > 0, here it is not the sign bit anymore
|
||||
# Expect the value to be 4
|
||||
a14 = intbv(4, min=2, max=9)
|
||||
b = a14.signed()
|
||||
assert b == 4
|
||||
b14 = a14.signed()
|
||||
assert b14 == 4
|
||||
|
||||
# intbv with positive range, value = 0, return signed()
|
||||
# Expect the number to be returned
|
||||
a15 = intbv(0, min=0, max=0x8)
|
||||
b = a15.signed()
|
||||
assert b == 0
|
||||
b15 = a15.signed()
|
||||
assert b15 == 0
|
||||
|
||||
|
||||
#~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||
@ -143,55 +143,55 @@ def PlainIntbv():
|
||||
# msb, but due to the negative range not considered signed
|
||||
# Expect to return 4
|
||||
a20 = intbv(4, min=-1, max=5)
|
||||
b = a20.signed()
|
||||
assert b == 4
|
||||
b20 = a20.signed()
|
||||
assert b20 == 4
|
||||
|
||||
a21 = intbv(4, min=-1, max=6)
|
||||
b = a21.signed()
|
||||
assert b == 4
|
||||
b21 = a21.signed()
|
||||
assert b21 == 4
|
||||
|
||||
a22 = intbv(4, min=-1, max=7)
|
||||
b = a22.signed()
|
||||
assert b == 4
|
||||
b22 = a22.signed()
|
||||
assert b22 == 4
|
||||
|
||||
a23 = intbv(4, min=-1, max=8)
|
||||
b = a23.signed()
|
||||
assert b == 4
|
||||
b23 = a23.signed()
|
||||
assert b23 == 4
|
||||
|
||||
# intbv with negative range, pos number, and msb set, return signed()
|
||||
# Expect the number to returned as is
|
||||
a24 = intbv(7, min=-1, max=8)
|
||||
b = a24.signed()
|
||||
assert b == 7
|
||||
b24 = a24.signed()
|
||||
assert b24 == 7
|
||||
|
||||
a25 = intbv(6, min=-1, max=8)
|
||||
b = a25.signed()
|
||||
assert b == 6
|
||||
b25 = a25.signed()
|
||||
assert b25 == 6
|
||||
|
||||
a26 = intbv(5, min=-1, max=8)
|
||||
b = a26.signed()
|
||||
assert b == 5
|
||||
b26 = a26.signed()
|
||||
assert b26 == 5
|
||||
|
||||
# intbv with symmetric (min = -max) range, pos value, msb set
|
||||
# return signed()
|
||||
# Expect value returned as is
|
||||
a27 = intbv(4, min=-8, max=8)
|
||||
b = a27.signed()
|
||||
assert b == 4
|
||||
b27 = a27.signed()
|
||||
assert b27 == 4
|
||||
|
||||
# intbv with symmetric (min = -max) range, neg value,
|
||||
# return signed()
|
||||
# Expect value returned as is
|
||||
a28 = intbv(-4, min=-8, max=8)
|
||||
b = a28.signed()
|
||||
assert b == -4
|
||||
b28 = a28.signed()
|
||||
assert b28 == -4
|
||||
|
||||
# intbv with symmetric (min=-max) range, value = 0,
|
||||
# return signed()
|
||||
# Expect value returned as is
|
||||
a29 = intbv(0, min=-8, max=8)
|
||||
b = a29.signed()
|
||||
assert b == 0
|
||||
b29 = a29.signed()
|
||||
assert b29 == 0
|
||||
|
||||
return logic
|
||||
|
||||
|
@ -27,25 +27,25 @@ def PrintBench():
|
||||
print("%d %d" % (i1, i2))
|
||||
print(si1)
|
||||
print(si2)
|
||||
|
||||
|
||||
yield delay(10)
|
||||
print("This is a test")
|
||||
|
||||
|
||||
yield delay(10)
|
||||
print(int(b))
|
||||
print(int(sb))
|
||||
|
||||
|
||||
yield delay(10)
|
||||
print("i1 is %s" % i1)
|
||||
|
||||
|
||||
yield delay(10)
|
||||
print("i1 is %s, i2 is %s" % (i1, i2))
|
||||
print("i1 %s i2 %s b %s si1 %s si2 %s" % (i1, i2, b, si1, si2))
|
||||
print("i1 %d i2 %d b %d si1 %d si2 %d" % (i1, i2, b, si1, si2))
|
||||
print(b)
|
||||
#print "%% %s" % i1
|
||||
|
||||
yield delay(10)
|
||||
|
||||
yield delay(10)
|
||||
print(state)
|
||||
print("the state is %s" % state)
|
||||
print("the state is %s" % (state,))
|
||||
@ -68,6 +68,47 @@ def PrintBench():
|
||||
def testPrint():
|
||||
assert conversion.verify(PrintBench) == 0
|
||||
|
||||
def PrintLongVectorsBench():
|
||||
N84 = 84
|
||||
M84 = 2**N84-1
|
||||
N85 = 85
|
||||
M85 = 2**N85-1
|
||||
N86 = 86
|
||||
M86 = 2**N86-1
|
||||
N87 = 87
|
||||
M87 = 2**N87-1
|
||||
|
||||
si1 = Signal(intbv(0)[N87:])
|
||||
si2 = Signal(intbv(0, min=-M85, max=M86))
|
||||
|
||||
@instance
|
||||
def logic():
|
||||
i1 = intbv(0)[N85:]
|
||||
i2 = intbv(0, min=-M86, max=M85)
|
||||
si1.next = 0
|
||||
si2.next = 0
|
||||
yield delay(10)
|
||||
print("%s %s %s %s" % (i1, i2, si1, si2))
|
||||
i1[:] = M84
|
||||
i2[:] = -1
|
||||
si1.next = M85
|
||||
si2.next = -1
|
||||
yield delay(10)
|
||||
print("%s %s %s %s" % (i1, i2, si1, si2))
|
||||
i1[:] = 596854
|
||||
i2[:] = -4954502
|
||||
si1.next = 232434
|
||||
si2.next = -3434355
|
||||
yield delay(10)
|
||||
print("%s %s %s %s" % (i1, i2, si1, si2))
|
||||
|
||||
return logic
|
||||
|
||||
def testPrintLongVectors():
|
||||
assert conversion.verify(PrintLongVectorsBench) == 0
|
||||
|
||||
def testPrint():
|
||||
assert conversion.verify(PrintBench) == 0
|
||||
|
||||
# format string errors and unsupported features
|
||||
|
||||
@ -86,7 +127,7 @@ def testPrintError1():
|
||||
assert e.kind == _error.UnsupportedFormatString
|
||||
else:
|
||||
assert False
|
||||
|
||||
|
||||
def PrintError2():
|
||||
@instance
|
||||
def logic():
|
||||
@ -102,7 +143,7 @@ def testPrintError2():
|
||||
assert e.kind == _error.FormatString
|
||||
else:
|
||||
assert False
|
||||
|
||||
|
||||
def PrintError3():
|
||||
@instance
|
||||
def logic():
|
||||
@ -119,7 +160,7 @@ def testPrintError3():
|
||||
assert e.kind == _error.FormatString
|
||||
else:
|
||||
assert False
|
||||
|
||||
|
||||
def PrintError4():
|
||||
@instance
|
||||
def logic():
|
||||
@ -135,7 +176,7 @@ def testPrintError4():
|
||||
assert e.kind == _error.UnsupportedFormatString
|
||||
else:
|
||||
assert False
|
||||
|
||||
|
||||
def PrintError5():
|
||||
@instance
|
||||
def logic():
|
||||
|
@ -39,11 +39,14 @@ def binaryOps(
|
||||
Bitand.next = left & right
|
||||
Bitor.next = left | right
|
||||
Bitxor.next = left ^ right
|
||||
FloorDiv.next = 0
|
||||
if right != 0:
|
||||
FloorDiv.next = left // right
|
||||
## if left < 256 and right < 40:
|
||||
LeftShift.next = 0
|
||||
if left < 256 and right < 26: # fails in ghdl for > 26
|
||||
LeftShift.next = left << right
|
||||
Modulo.next = 0
|
||||
if right != 0:
|
||||
Modulo.next = left % right
|
||||
Mul.next = left * right
|
||||
@ -52,6 +55,7 @@ def binaryOps(
|
||||
# Pow.next = left ** right
|
||||
## Pow.next = 0
|
||||
RightShift.next = left >> right
|
||||
Sub.next = 0
|
||||
if left >= right:
|
||||
Sub.next = left - right
|
||||
Sum.next = left + right
|
||||
@ -358,10 +362,12 @@ def augmOps( Bitand,
|
||||
var[:] = left
|
||||
var ^= left
|
||||
Bitxor.next = var
|
||||
FloorDiv.next = 0
|
||||
if right != 0:
|
||||
var[:] = left
|
||||
var //= right
|
||||
FloorDiv.next = var
|
||||
Sub.next = 0
|
||||
if left >= right:
|
||||
var[:] = left
|
||||
var -= right
|
||||
@ -369,10 +375,12 @@ def augmOps( Bitand,
|
||||
var[:] = left
|
||||
var += right
|
||||
Sum.next = var
|
||||
LeftShift.next = 0
|
||||
if left < 256 and right < 26:
|
||||
var2[:] = left
|
||||
var2 <<= right
|
||||
LeftShift.next = var2
|
||||
Modulo.next = 0
|
||||
if right != 0:
|
||||
var[:] = left
|
||||
var %= right
|
||||
|
@ -42,6 +42,7 @@ def binaryOps(
|
||||
## if right != 0:
|
||||
## FloorDiv.next = left // right
|
||||
# Keep left shifts smaller than 2** 31 for VHDL's to_integer
|
||||
LeftShift.next = 0
|
||||
if left < 256 and right < 22 and right >= 0:
|
||||
LeftShift.next = left << right
|
||||
## if right != 0:
|
||||
@ -308,6 +309,7 @@ def augmOps(
|
||||
## var[:] = left
|
||||
## var //= right
|
||||
## FloorDiv.next = var
|
||||
LeftShift.next = 0
|
||||
if left < 256 and right < 22 and right >= 0:
|
||||
var2[:] = left
|
||||
var2 <<= right
|
||||
@ -321,6 +323,7 @@ def augmOps(
|
||||
Mul.next = var
|
||||
|
||||
var[:] = left
|
||||
RightShift.next = 0
|
||||
if right >= 0:
|
||||
var >>= right
|
||||
RightShift.next = var
|
||||
|
Loading…
x
Reference in New Issue
Block a user