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mirror of https://github.com/myhdl/myhdl.git synced 2025-01-24 21:52:56 +08:00

change core test assertions to pytest style

This commit is contained in:
Keerthan Jaic 2015-06-24 10:33:26 -04:00
parent 3adb53a046
commit 8f70de0895
15 changed files with 364 additions and 358 deletions

View File

@ -63,18 +63,18 @@ class CosimulationTest(TestCase):
try:
Cosimulation("bla -x 45")
except CosimulationError as e:
self.assertEqual(e.kind, _error.OSError)
assert e.kind == _error.OSError
else:
self.fail()
raise AssertionError
def testNotUnique(self):
cosim1 = Cosimulation(exe + ".cosimNotUnique", **allSigs)
try:
Cosimulation(exe + ".cosimNotUnique", **allSigs)
except CosimulationError as e:
self.assertEqual(e.kind, _error.MultipleCosim)
assert e.kind == _error.MultipleCosim
else:
self.fail()
raise AssertionError
def cosimNotUnique(self):
wt = int(os.environ['MYHDL_TO_PIPE'])
@ -88,8 +88,8 @@ class CosimulationTest(TestCase):
def testFromSignals(self):
cosim = Cosimulation(exe + ".cosimFromSignals", **allSigs)
self.assertEqual(cosim._fromSignames, fromSignames)
self.assertEqual(cosim._fromSizes, fromSizes)
assert cosim._fromSignames == fromSignames
assert cosim._fromSizes == fromSizes
def cosimFromSignals(self):
wt = int(os.environ['MYHDL_TO_PIPE'])
@ -106,10 +106,10 @@ class CosimulationTest(TestCase):
def testToSignals(self):
cosim = Cosimulation(exe + ".cosimToSignals", **toSigs)
self.assertEqual(cosim._fromSignames, [])
self.assertEqual(cosim._fromSizes, [])
self.assertEqual(cosim._toSignames, toSignames)
self.assertEqual(cosim._toSizes, toSizes)
assert cosim._fromSignames == []
assert cosim._fromSizes == []
assert cosim._toSignames == toSignames
assert cosim._toSizes == toSizes
def cosimToSignals(self):
wt = int(os.environ['MYHDL_TO_PIPE'])
@ -126,10 +126,10 @@ class CosimulationTest(TestCase):
def testFromToSignals(self):
cosim = Cosimulation(exe + ".cosimFromToSignals", **allSigs)
self.assertEqual(cosim._fromSignames, fromSignames)
self.assertEqual(cosim._fromSizes, fromSizes)
self.assertEqual(cosim._toSignames, toSignames)
self.assertEqual(cosim._toSizes, toSizes)
assert cosim._fromSignames == fromSignames
assert cosim._fromSizes == fromSizes
assert cosim._toSignames == toSignames
assert cosim._toSizes == toSizes
def cosimFromToSignals(self):
wt = int(os.environ['MYHDL_TO_PIPE'])
@ -151,9 +151,9 @@ class CosimulationTest(TestCase):
try:
Cosimulation(exe + ".cosimTimeZero", **allSigs)
except CosimulationError as e:
self.assertEqual(e.kind, _error.TimeZero)
assert e.kind == _error.TimeZero
except:
self.fail()
raise AssertionError
def cosimTimeZero(self):
wt = int(os.environ['MYHDL_TO_PIPE'])
@ -167,9 +167,9 @@ class CosimulationTest(TestCase):
try:
Cosimulation(exe + ".cosimNoComm", **allSigs)
except CosimulationError as e:
self.assertEqual(e.kind, _error.NoCommunication)
assert e.kind == _error.NoCommunication
else:
self.fail()
raise AssertionError
def cosimNoComm(self):
wt = int(os.environ['MYHDL_TO_PIPE'])
@ -185,9 +185,9 @@ class CosimulationTest(TestCase):
try:
Cosimulation(exe + ".cosimFromSignalsDupl", **allSigs)
except CosimulationError as e:
self.assertEqual(e.kind, _error.DuplicateSigNames)
assert e.kind == _error.DuplicateSigNames
else:
self.fail()
raise AssertionError
def cosimFromSignalsDupl(self):
wt = int(os.environ['MYHDL_TO_PIPE'])
@ -202,9 +202,9 @@ class CosimulationTest(TestCase):
try:
Cosimulation(exe + ".cosimToSignalsDupl", **allSigs)
except CosimulationError as e:
self.assertEqual(e.kind, _error.DuplicateSigNames)
assert e.kind == _error.DuplicateSigNames
else:
self.fail()
raise AssertionError
def cosimToSignalsDupl(self):
wt = int(os.environ['MYHDL_TO_PIPE'])
@ -236,20 +236,20 @@ class CosimulationTest(TestCase):
os.write(wt, b"DUMMY")
s = os.read(rf, MAXLINE)
vals = [int(e, 16) for e in s.split()[1:]]
self.assertEqual(vals, fromVals)
assert vals == fromVals
def testToSignalVals(self):
cosim = Cosimulation(exe + ".cosimToSignalVals", **allSigs)
for n in toSignames:
self.assertEqual(toSigs[n].next, 0)
assert toSigs[n].next == 0
cosim._get()
for n, v in zip(toSignames, toVals):
self.assertEqual(toSigs[n].next, v)
assert toSigs[n].next == v
os.write(cosim._wf, b"DUMMY")
cosim._getMode = 1
cosim._get()
for n in toSignames:
self.assertEqual(toSigs[n].next, 0)
assert toSigs[n].next == 0
def cosimToSignalVals(self):

View File

@ -68,7 +68,7 @@ class SigTest(TestCase):
except AttributeError:
pass
else:
self.fail()
raise AssertionError
def testDrivenAttrValue(self):
""" driven attribute only accepts value 'reg' or 'wire' """
@ -78,7 +78,7 @@ class SigTest(TestCase):
except ValueError:
pass
else:
self.fail()
raise AssertionError
def testPosedgeAttrReadOnly(self):
""" posedge attribute should not be writable"""
@ -88,7 +88,7 @@ class SigTest(TestCase):
except AttributeError:
pass
else:
self.fail()
raise AssertionError
def testNegedgeAttrReadOnly(self):
""" negedge attribute should not be writable"""
@ -98,17 +98,17 @@ class SigTest(TestCase):
except AttributeError:
pass
else:
self.fail()
raise AssertionError
def testInitDefault(self):
""" initial value is None by default """
s1 = Signal()
self.assertEqual(s1, None)
assert s1 == None
def testInitialization(self):
""" initial val and next should be equal """
for s in self.sigs:
self.assertEqual(s.val, s.next)
assert s.val == s.next
def testUpdate(self):
""" _update() should assign next into val """
@ -116,16 +116,16 @@ class SigTest(TestCase):
cur = copy.copy(s.val)
s.next = n
# assigning to next should not change current value ...
self.assertTrue(s.val == cur)
assert s.val == cur
s._update()
self.assertTrue(s.val == n)
assert s.val == n
def testNextType(self):
""" sig.next = n should fail on access if type(n) incompatible """
i = 0
for s in (self.sigs + self.incompatibleSigs):
for n in (self.vals + self.incompatibleVals):
self.assertTrue(isinstance(s.val, s._type))
assert isinstance(s.val, s._type)
if isinstance(s.val, (int, long, intbv)):
t = (int, long, intbv)
else:
@ -138,15 +138,15 @@ class SigTest(TestCase):
except (TypeError, ValueError):
pass
else:
self.fail()
self.assertTrue(i >= len(self.incompatibleSigs), "Nothing tested %s" %i)
raise AssertionError
assert i >= len(self.incompatibleSigs), "Nothing tested %s" %i
def testAfterUpdate(self):
""" updated val and next should be equal but not identical """
for s, n in zip(self.sigs, self.nexts):
s.next = n
s._update()
self.assertEqual(s.val, s.next)
assert s.val == s.next
def testModify(self):
""" Modifying mutable next should be on a copy """
@ -164,7 +164,7 @@ class SigTest(TestCase):
s.next[3] = 5
else:
s.next # plain read access
self.assertTrue(s.val is not s.next, repr(s.val))
assert s.val is not s.next, repr(s.val)
def testUpdatePosedge(self):
""" update on posedge should return event and posedge waiters """
@ -177,10 +177,10 @@ class SigTest(TestCase):
s1._negedgeWaiters = self.negedgeWaiters[:]
waiters = s1._update()
expected = self.eventWaiters + self.posedgeWaiters
self.assertEqual(set(waiters), set(expected))
self.assertEqual(s1._eventWaiters, [])
self.assertEqual(s1._posedgeWaiters, [])
self.assertEqual(s1._negedgeWaiters, self.negedgeWaiters)
assert set(waiters) == set(expected)
assert s1._eventWaiters == []
assert s1._posedgeWaiters == []
assert s1._negedgeWaiters == self.negedgeWaiters
def testUpdateNegedge(self):
""" update on negedge should return event and negedge waiters """
@ -193,10 +193,10 @@ class SigTest(TestCase):
s1._negedgeWaiters = self.negedgeWaiters[:]
waiters = s1._update()
expected = self.eventWaiters + self.negedgeWaiters
self.assertEqual(set(waiters), set(expected))
self.assertEqual(s1._eventWaiters, [])
self.assertEqual(s1._posedgeWaiters, self.posedgeWaiters)
self.assertEqual(s1._negedgeWaiters, [])
assert set(waiters) == set(expected)
assert s1._eventWaiters == []
assert s1._posedgeWaiters == self.posedgeWaiters
assert s1._negedgeWaiters == []
def testUpdateEvent(self):
""" update on non-edge event should return event waiters """
@ -209,10 +209,10 @@ class SigTest(TestCase):
s1._negedgeWaiters = self.negedgeWaiters[:]
waiters = s1._update()
expected = self.eventWaiters
self.assertEqual(set(waiters), set(expected))
self.assertEqual(s1._eventWaiters, [])
self.assertEqual(s1._posedgeWaiters, self.posedgeWaiters)
self.assertEqual(s1._negedgeWaiters, self.negedgeWaiters)
assert set(waiters) == set(expected)
assert s1._eventWaiters == []
assert s1._posedgeWaiters == self.posedgeWaiters
assert s1._negedgeWaiters == self.negedgeWaiters
def testUpdateNoEvent(self):
""" update without value change should not return event waiters """
@ -224,10 +224,10 @@ class SigTest(TestCase):
s1._posedgeWaiters = self.posedgeWaiters[:]
s1._negedgeWaiters = self.negedgeWaiters[:]
waiters = s1._update()
self.assertEqual(waiters, [])
self.assertEqual(s1._eventWaiters, self.eventWaiters)
self.assertEqual(s1._posedgeWaiters, self.posedgeWaiters)
self.assertEqual(s1._negedgeWaiters, self.negedgeWaiters)
assert waiters == []
assert s1._eventWaiters == self.eventWaiters
assert s1._posedgeWaiters == self.posedgeWaiters
assert s1._negedgeWaiters == self.negedgeWaiters
def testNextAccess(self):
""" each next attribute access puts a sig in a global siglist """
@ -242,7 +242,7 @@ class SigTest(TestCase):
s[3].next = 1
s[3].next = 3
for i in range(len(s)):
self.assertEqual(_siglist.count(s[i]), i)
assert _siglist.count(s[i]) == i
class TestSignalAsNum(TestCase):
@ -289,12 +289,12 @@ class TestSignalAsNum(TestCase):
r1 = op(bi, j)
r2 = op(long(i), bj)
r3 = op(bi, bj)
self.assertEqual(type(r1), type(ref))
self.assertEqual(type(r2), type(ref))
self.assertEqual(type(r3), type(ref))
self.assertEqual(r1, ref)
self.assertEqual(r2, ref)
self.assertEqual(r3, ref)
assert type(r1) == type(ref)
assert type(r2) == type(ref)
assert type(r3) == type(ref)
assert r1 == ref
assert r2 == ref
assert r3 == ref
def augmentedAssignCheck(self, op, imin=0, imax=None, jmin=0, jmax=None):
self.seqSetup(imin=imin, imax=imax, jmin=jmin, jmax=jmax)
@ -308,7 +308,7 @@ class TestSignalAsNum(TestCase):
except TypeError:
pass
else:
self.fail()
raise AssertionError
r2 = long(i)
r2 = op(r2, bj)
r3 = bi3 = Signal(i)
@ -317,8 +317,8 @@ class TestSignalAsNum(TestCase):
except TypeError:
pass
else:
self.fail()
self.assertEqual(r2, ref)
raise AssertionError
assert r2 == ref
def unaryCheck(self, op, imin=0, imax=None):
self.seqSetup(imin=imin, imax=imax)
@ -326,8 +326,8 @@ class TestSignalAsNum(TestCase):
bi = Signal(i)
ref = op(i)
r1 = op(bi)
self.assertEqual(type(r1), type(ref))
self.assertEqual(r1, ref)
assert type(r1) == type(ref)
assert r1 == ref
def conversionCheck(self, op, imin=0, imax=None):
self.seqSetup(imin=imin, imax=imax)
@ -335,8 +335,8 @@ class TestSignalAsNum(TestCase):
bi = Signal(i)
ref = op(i)
r1 = op(bi)
self.assertEqual(type(r1), type(ref))
self.assertEqual(r1, ref)
assert type(r1) == type(ref)
assert r1 == ref
def comparisonCheck(self, op, imin=0, imax=None, jmin=0, jmax=None):
self.seqSetup(imin=imin, imax=imax, jmin=jmin, jmax=jmax)
@ -347,9 +347,9 @@ class TestSignalAsNum(TestCase):
r1 = op(bi, j)
r2 = op(i, bj)
r3 = op(bi, bj)
self.assertEqual(r1, ref)
self.assertEqual(r2, ref)
self.assertEqual(r3, ref)
assert r1 == ref
assert r2 == ref
assert r3 == ref
def testAdd(self):
self.binaryCheck(operator.add)
@ -499,10 +499,10 @@ class TestSignalIntBvIndexing(TestCase):
ref = long(getItem(s, i), 2)
res = sbv[i]
resi = sbvi[i]
self.assertEqual(res, ref)
self.assertEqual(type(res), bool)
self.assertEqual(resi, ref^1)
self.assertEqual(type(resi), bool)
assert res == ref
assert type(res) == bool
assert resi == ref^1
assert type(resi) == bool
def testGetSlice(self):
self.seqsSetup()
@ -516,14 +516,14 @@ class TestSignalIntBvIndexing(TestCase):
res = sbv[i:j]
resi = sbvi[i:j]
except ValueError:
self.assertTrue(i<=j)
assert i<=j
continue
ref = long(getSlice(s, i, j), 2)
self.assertEqual(res, ref)
self.assertEqual(type(res), intbv)
assert res == ref
assert type(res) == intbv
mask = (2**(i-j))-1
self.assertEqual(resi, ref ^ mask)
self.assertEqual(type(resi), intbv)
assert resi == ref ^ mask
assert type(resi) == intbv
def testSetItem(self):
sbv = Signal(intbv(5))
@ -532,7 +532,7 @@ class TestSignalIntBvIndexing(TestCase):
except TypeError:
pass
else:
self.fail()
raise AssertionError
def testSetSlice(self):
sbv = Signal(intbv(5))
@ -541,7 +541,7 @@ class TestSignalIntBvIndexing(TestCase):
except TypeError:
pass
else:
self.fail()
raise AssertionError
class TestSignalNrBits(TestCase):
@ -550,32 +550,32 @@ class TestSignalNrBits(TestCase):
if type(bool) is not type : # bool not a type in 2.2
return
s = Signal(bool())
self.assertEqual(s._nrbits, 1)
assert s._nrbits == 1
def testIntbvSlice(self):
for n in range(1, 40):
for m in range(0, n):
s = Signal(intbv()[n:m])
self.assertEqual(s._nrbits, n-m)
assert s._nrbits == n-m
def testIntbvBounds(self):
for n in range(1, 40):
s = Signal(intbv(min=-(2**n)))
self.assertEqual(s._nrbits, 0)
assert s._nrbits == 0
s = Signal(intbv(max=2**n))
self.assertEqual(s._nrbits, 0)
assert s._nrbits == 0
s = Signal(intbv(min=0, max=2**n))
self.assertEqual(s._nrbits, n)
assert s._nrbits == n
s = Signal(intbv(1, min=1, max=2**n))
self.assertEqual(s._nrbits, n)
assert s._nrbits == n
s = Signal(intbv(min=0, max=2**n+1))
self.assertEqual(s._nrbits, n+1)
assert s._nrbits == n+1
s = Signal(intbv(min=-(2**n), max=2**n-1))
self.assertEqual(s._nrbits, n+1)
assert s._nrbits == n+1
s = Signal(intbv(min=-(2**n), max=1))
self.assertEqual(s._nrbits, n+1)
assert s._nrbits == n+1
s = Signal(intbv(min=-(2**n)-1, max=2**n-1))
self.assertEqual(s._nrbits, n+2)
assert s._nrbits == n+2
class TestSignalBoolBounds(TestCase):
@ -594,7 +594,7 @@ class TestSignalBoolBounds(TestCase):
except ValueError:
pass
else:
self.fail()
raise AssertionError
class TestSignalIntbvBounds(TestCase):
@ -605,7 +605,7 @@ class TestSignalIntbvBounds(TestCase):
for k in (6, 9, 10):
s.next[:] = 0
s.next[k:] = i
self.assertEqual(s.next, i)
assert s.next == i
for i in (-25, -128, 34, 35, 229):
for k in (0, 9, 10):
try:
@ -614,7 +614,7 @@ class TestSignalIntbvBounds(TestCase):
except ValueError:
pass
else:
self.fail()
raise AssertionError
s = Signal(intbv(5)[8:])
for v in (0, 2**8-1, 100):
s.next[:] = v
@ -625,7 +625,7 @@ class TestSignalIntbvBounds(TestCase):
except ValueError:
pass
else:
self.fail()
raise AssertionError
if __name__ == "__main__":

View File

@ -44,9 +44,9 @@ class SimArgs(TestCase):
try:
Simulation(None)
except SimulationError as e:
self.assertEqual(e.kind, _error.ArgType)
assert e.kind == _error.ArgType
except:
self.fail()
raise AssertionError
def test2(self):
def g():
@ -55,9 +55,9 @@ class SimArgs(TestCase):
try:
Simulation(i, i)
except SimulationError as e:
self.assertEqual(e.kind, _error.DuplicatedArg)
assert e.kind == _error.DuplicatedArg
except:
self.fail()
raise AssertionError
class YieldNone(TestCase):
@ -69,11 +69,11 @@ class YieldNone(TestCase):
yield delay(10)
a.next = 1
yield None
self.assertEqual(a.val, 0)
self.assertEqual(now(), 10)
assert a.val == 0
assert now() == 10
yield delay(0)
self.assertEqual(a.val, 1)
self.assertEqual(now(), 10)
assert a.val == 1
assert now() == 10
Simulation(stimulus()).run(quiet=QUIET)
def test2(self):
@ -81,19 +81,19 @@ class YieldNone(TestCase):
a = Signal(0)
yield delay(10)
a.next = 1
self.assertEqual(a.val, 0)
self.assertEqual(now(), 10)
assert a.val == 0
assert now() == 10
yield None
a.next = 0
self.assertEqual(a.val, 0)
self.assertEqual(now(), 10)
assert a.val == 0
assert now() == 10
yield None
a.next = 1
self.assertEqual(a.val, 0)
self.assertEqual(now(), 10)
assert a.val == 0
assert now() == 10
yield delay(0)
self.assertEqual(a.val, 1)
self.assertEqual(now(), 10)
assert a.val == 1
assert now() == 10
Simulation(stimulus()).run(quiet=QUIET)
def test3(self):
@ -102,11 +102,11 @@ class YieldNone(TestCase):
yield delay(10)
a.next = 1
yield None, delay(10)
self.assertEqual(a.val, 0)
self.assertEqual(now(), 10)
assert a.val == 0
assert now() == 10
yield delay(0)
self.assertEqual(a.val, 1)
self.assertEqual(now(), 10)
assert a.val == 1
assert now() == 10
Simulation(stimulus()).run(quiet=QUIET)
def test4(self):
@ -117,10 +117,10 @@ class YieldNone(TestCase):
yield delay(20)
a.next = 1
yield None, gen()
self.assertEqual(a.val, 0)
self.assertEqual(now(), 10)
assert a.val == 0
assert now() == 10
yield delay(25)
self.assertEqual(a.val, 1)
assert a.val == 1
Simulation(stimulus()).run(quiet=QUIET)
@ -133,18 +133,18 @@ class JoinMix(TestCase):
def gen():
yield join(delay(10), delay(20))
yield gen(), delay(5)
self.assertEqual(now(), 5)
assert now() == 5
yield a
self.fail("Incorrect run") # should not get here
raise AssertionError("Incorrect run") # should not get here
Simulation(stimulus()).run(quiet=QUIET)
def test2(self):
def stimulus():
a = Signal(0)
yield join(delay(10), delay(20)), delay(5)
self.assertEqual(now(), 5)
assert now() == 5
yield a
self.fail("Incorrect run") # should not get here
raise AssertionError("Incorrect run") # should not get here
Simulation(stimulus()).run(quiet=QUIET)
def stimulus(self, a, b, c, d):
@ -167,63 +167,63 @@ class JoinMix(TestCase):
a, b, c, d = [Signal(0) for i in range(4)]
def response():
yield join(a, b, c, d)
self.assertEqual(now(), 20)
assert now() == 20
Simulation(self.stimulus(a, b, c, d), response()).run(quiet=QUIET)
def test4(self):
a, b, c, d = [Signal(0) for i in range(4)]
def response():
yield join(a, b), join(c, d)
self.assertEqual(now(), 10)
assert now() == 10
Simulation(self.stimulus(a, b, c, d), response()).run(quiet=QUIET)
def test5(self):
a, b, c, d = [Signal(0) for i in range(4)]
def response():
yield join(a), b, join(c, d)
self.assertEqual(now(), 5)
assert now() == 5
Simulation(self.stimulus(a, b, c, d), response()).run(quiet=QUIET)
def test6(self):
a, b, c, d = [Signal(0) for i in range(4)]
def response():
yield join(a, delay(20)), b, join(c, d)
self.assertEqual(now(), 10)
assert now() == 10
Simulation(self.stimulus(a, b, c, d), response()).run(quiet=QUIET)
def test7(self):
a, b, c, d = [Signal(0) for i in range(4)]
def response():
yield join(a, delay(30)), join(c, d)
self.assertEqual(now(), 20)
assert now() == 20
Simulation(self.stimulus(a, b, c, d), response()).run(quiet=QUIET)
def test8(self):
a, b, c, d = [Signal(0) for i in range(4)]
def response():
yield join(a, a.negedge)
self.assertEqual(now(), 10)
assert now() == 10
Simulation(self.stimulus(a, b, c, d), response()).run(quiet=QUIET)
def test9(self):
a, b, c, d = [Signal(0) for i in range(4)]
def response():
yield join(a, a.negedge, c.posedge)
self.assertEqual(now(), 15)
assert now() == 15
Simulation(self.stimulus(a, b, c, d), response()).run(quiet=QUIET)
def test10(self):
a, b, c, d = [Signal(0) for i in range(4)]
def response():
yield join(a, a)
self.assertEqual(now(), 5)
assert now() == 5
Simulation(self.stimulus(a, b, c, d), response()).run(quiet=QUIET)
def test11(self):
a, b, c, d = [Signal(0) for i in range(4)]
def response():
yield join(a, b.posedge, b.negedge, a)
self.assertEqual(now(), 15)
assert now() == 15
Simulation(self.stimulus(a, b, c, d), response()).run(quiet=QUIET)
@ -251,9 +251,9 @@ class JoinedGen(TestCase):
sig1.next = 0
sig2.next = 0
yield join(delay(n0*td), gen(sig1, n1), gen(sig2, n2))
self.assertEqual(sig1.val, 1)
self.assertEqual(sig2.val, 1)
self.assertEqual(now(), offset + td * max(n0, n1, n2))
assert sig1.val == 1
assert sig2.val == 1
assert now() == offset + td * max(n0, n1, n2)
raise StopSimulation("Joined concurrent generator yield")
@ -280,13 +280,13 @@ class SignalUpdateFirst(TestCase):
R.next = 1
S.next = 1
yield delay(10)
self.assertEqual(Q.val, 1) # control
self.assertEqual(R.val, 1) # actual check
self.assertEqual(S.val, 0) # control
assert Q.val == 1 # control
assert R.val == 1 # actual check
assert S.val == 0 # control
yield delay(1)
self.assertEqual(Q.val, 1) # control
self.assertEqual(R.val, 1) # control
self.assertEqual(S.val, 1) # control
assert Q.val == 1 # control
assert R.val == 1 # control
assert S.val == 1 # control
raise StopSimulation("Signal update test")
return process()
@ -316,14 +316,14 @@ class YieldZeroDelay(TestCase):
n1 = randrange(2, 10)
n2 = randrange(n1+1, 20) # n2 > n1
yield delay(0), gen(sig1, n1), gen(sig2, n2)
self.assertEqual(sig1.val, 0)
self.assertEqual(sig2.val, 0)
self.assertEqual(now(), offset + 0)
assert sig1.val == 0
assert sig2.val == 0
assert now() == offset + 0
yield sig1.posedge
self.assertEqual(sig2.val, 0)
self.assertEqual(now(), offset + n1*td)
assert sig2.val == 0
assert now() == offset + n1*td
yield sig2.posedge
self.assertEqual(now(), offset + n2*td)
assert now() == offset + n2*td
raise StopSimulation("Zero delay yield")
@ -352,14 +352,14 @@ class YieldConcurrentGen(TestCase):
n1 = randrange(2, 10)
n2 = randrange(n1+1, 20) # n2 > n1
yield delay(td), gen(sig1, n1), gen(sig2, n2)
self.assertEqual(sig1.val, 0)
self.assertEqual(sig2.val, 0)
self.assertEqual(now(), offset + td)
assert sig1.val == 0
assert sig2.val == 0
assert now() == offset + td
yield sig1.posedge
self.assertEqual(sig2.val, 0)
self.assertEqual(now(), offset + n1*td)
assert sig2.val == 0
assert now() == offset + n1*td
yield sig2.posedge
self.assertEqual(now(), offset + n2*td)
assert now() == offset + n2*td
raise StopSimulation("Concurrent generator yield")
@ -402,7 +402,7 @@ class YieldGen(TestCase):
for i in range(n):
yield clk.posedge
shared.cnt += 1
self.assertEqual(shared.cnt, expected[shared.i])
assert shared.cnt == expected[shared.i]
shared.i += 1
if nlist:
yield task(nlist)
@ -410,7 +410,7 @@ class YieldGen(TestCase):
def module():
for nlist in nlists:
yield task(nlist)
self.assertEqual(shared.cnt, expected[-1])
assert shared.cnt == expected[-1]
raise StopSimulation("Generator yield")
return(module(), clkGen())
@ -469,7 +469,7 @@ class DeltaCycleOrder(TestCase):
random.shuffle(index)
yield clk.posedge
yield clk.posedge
self.assertEqual(z.val, function(v[0], v[1], v[2], v[3]))
assert z.val == function(v[0], v[1], v[2], v[3])
raise StopSimulation("Delta cycle order")
inputGen = [inGen(i) for i in range(4)]
@ -537,7 +537,7 @@ class DeltaCycleRace(TestCase):
while 1:
yield clk.posedge
msig.next = uprange[i+1]
self.assertEqual(msig.val, uprange[i])
assert msig.val == uprange[i]
shared.t = now()
i += 1
@ -547,7 +547,7 @@ class DeltaCycleRace(TestCase):
while 1:
yield clk.posedge
ssig.next = msig.val
self.assertEqual(ssig.val, uprange[i-1])
assert ssig.val == uprange[i-1]
i += 1
def deltaSlave(dsig):
@ -556,8 +556,8 @@ class DeltaCycleRace(TestCase):
while 1:
yield deltaClk.posedge
dsig.next = msig.val
self.assertEqual(now(), shared.t)
self.assertEqual(dsig.val, uprange[i])
assert now() == shared.t
assert dsig.val == uprange[i]
i += 1
return (slave(ssig[1]), deltaSlave(dsig[1]),
@ -589,7 +589,7 @@ class DelayLine(TestCase):
def delayElement(n, i):
sig_Z[n].next = sig_Z[n-1].val
self.assertEqual(sig_Z[n].val, uprange[i-n])
assert sig_Z[n].val == uprange[i-n]
def stage(n):
i = 0
@ -693,11 +693,11 @@ class Waveform(TestCase):
self.sig.delay = sigdelay
def response(self, clause, expected):
self.assertTrue(len(expected) > 100) # we should test something
assert len(expected) > 100 # we should test something
i = 0
while 1:
yield clause
self.assertEqual(now(), expected[i])
assert now() == expected[i]
i += 1
def setUp(self):
@ -713,7 +713,7 @@ class Waveform(TestCase):
expected = getExpectedTimes(self.waveform, isPosedge)
response = self.response(clause=s.posedge, expected=expected)
self.runSim(Simulation(stimulus, response))
self.assertTrue(self.duration <= now())
assert self.duration <= now()
def testNegedge(self):
""" Negedge waveform test """
@ -722,7 +722,7 @@ class Waveform(TestCase):
expected = getExpectedTimes(self.waveform, isNegedge)
response = self.response(clause=s.negedge, expected=expected)
self.runSim(Simulation(stimulus, response))
self.assertTrue(self.duration <= now())
assert self.duration <= now()
def testEdge(self):
""" Edge waveform test """
@ -732,7 +732,7 @@ class Waveform(TestCase):
response = self.response(clause=(s.negedge, s.posedge),
expected=expected)
self.runSim(Simulation(stimulus, response))
self.assertTrue(self.duration <= now())
assert self.duration <= now()
def testEvent(self):
""" Event waveform test """
@ -742,7 +742,7 @@ class Waveform(TestCase):
# print expected
response = self.response(clause=s, expected=expected)
self.runSim(Simulation(stimulus, response))
self.assertTrue(self.duration <= now())
assert self.duration <= now()
def testRedundantEvents(self):
""" Redundant event waveform test """
@ -751,7 +751,7 @@ class Waveform(TestCase):
expected = getExpectedTimes(self.waveform, isEvent)
response = self.response(clause=(s,) * 6, expected=expected)
self.runSim(Simulation(stimulus, response))
self.assertTrue(self.duration <= now())
assert self.duration <= now()
def testRedundantEventAndEdges(self):
""" Redundant edge waveform test """
@ -761,7 +761,7 @@ class Waveform(TestCase):
response = self.response(clause=(s, s.negedge, s.posedge),
expected=expected)
self.runSim(Simulation(stimulus, response))
self.assertTrue(self.duration <= now())
assert self.duration <= now()
def testRedundantPosedges(self):
""" Redundant posedge waveform test """
@ -770,7 +770,7 @@ class Waveform(TestCase):
expected = getExpectedTimes(self.waveform, isPosedge)
response = self.response(clause=(s.posedge,) * 3, expected=expected)
self.runSim(Simulation(stimulus, response))
self.assertTrue(self.duration <= now())
assert self.duration <= now()
def testRedundantNegedges(self):
""" Redundant negedge waveform test """
@ -779,7 +779,7 @@ class Waveform(TestCase):
expected = getExpectedTimes(self.waveform, isNegedge)
response = self.response(clause=(s.negedge,) * 9, expected=expected)
self.runSim(Simulation(stimulus, response))
self.assertTrue(self.duration <= now())
assert self.duration <= now()
class WaveformSigDelay(Waveform):
@ -846,8 +846,8 @@ class TimeZeroEvents(TestCase):
yield delay(10)
def response():
yield clause, delay(timeout)
self.assertEqual(now(), 0)
self.assertEqual(sig.val, next)
assert now() == 0
assert sig.val == next
return [stimulus(), response()]
def testEvent(self):

View File

@ -54,9 +54,9 @@ class AlwaysCompilationTest(TestCase):
try:
always(delay(3))(h)
except AlwaysError as e:
self.assertEqual(e.kind, _error.ArgType)
assert e.kind == _error.ArgType
else:
self.fail()
raise AssertionError
def testArgIsNormalFunction(self):
try:
@ -64,9 +64,9 @@ class AlwaysCompilationTest(TestCase):
def h():
yield None
except AlwaysError as e:
self.assertEqual(e.kind, _error.ArgType)
assert e.kind == _error.ArgType
else:
self.fail()
raise AssertionError
def testArgHasNoArgs(self):
try:
@ -74,9 +74,9 @@ class AlwaysCompilationTest(TestCase):
def h(n):
return n
except AlwaysError as e:
self.assertEqual(e.kind, _error.NrOfArgs)
assert e.kind == _error.NrOfArgs
else:
self.fail()
raise AssertionError
def testDecArgType1(self):
try:
@ -84,9 +84,9 @@ class AlwaysCompilationTest(TestCase):
def h(n):
return n
except AlwaysError as e:
self.assertEqual(e.kind, _error.DecArgType)
assert e.kind == _error.DecArgType
else:
self.fail()
raise AssertionError
def testDecArgType2(self):
try:
@ -94,9 +94,9 @@ class AlwaysCompilationTest(TestCase):
def h(n):
return n
except AlwaysError as e:
self.assertEqual(e.kind, _error.DecArgType)
assert e.kind == _error.DecArgType
else:
self.fail()
raise AssertionError
@ -162,7 +162,7 @@ class InferWaiterTest(TestCase):
a, b, c, d, r, s = [Signal(intbv(0)) for i in range(6)]
inst_r = MyHDLFunc(a, b, c, d, r)
self.assertEqual(type(inst_r.waiter), waiterType)
assert type(inst_r.waiter) == waiterType
inst_s = MyHDLFunc(a, b, c, d, s)
@ -180,7 +180,7 @@ class InferWaiterTest(TestCase):
def check():
while 1:
yield a, b, c, r, s
self.assertEqual(r, s)
assert r == s
return inst_r, _Waiter(inst_s.gen), _Waiter(stimulus()), _Waiter(check())

View File

@ -52,9 +52,9 @@ class AlwaysCombCompilationTest(TestCase):
try:
always_comb(h)
except AlwaysCombError as e:
self.assertEqual(e.kind, _error.ArgType)
assert e.kind == _error.ArgType
else:
self.fail()
raise AssertionError
def testArgIsNormalFunction(self):
def h():
@ -62,9 +62,9 @@ class AlwaysCombCompilationTest(TestCase):
try:
always_comb(h)
except AlwaysCombError as e:
self.assertEqual(e.kind, _error.ArgType)
assert e.kind == _error.ArgType
else:
self.fail()
raise AssertionError
def testArgHasNoArgs(self):
def h(n):
@ -72,9 +72,9 @@ class AlwaysCombCompilationTest(TestCase):
try:
always_comb(h)
except AlwaysCombError as e:
self.assertEqual(e.kind, _error.NrOfArgs)
assert e.kind == _error.NrOfArgs
else:
self.fail()
raise AssertionError
## def testScope(self):
## try:
@ -93,7 +93,7 @@ class AlwaysCombCompilationTest(TestCase):
g = always_comb(h).gen
i = g.gi_frame.f_locals['self']
expected = set(['a'])
self.assertEqual(i.inputs, expected)
assert i.inputs == expected
def testInfer2(self):
a, b, c, d = [Signal(0) for i in range(4)]
@ -104,7 +104,7 @@ class AlwaysCombCompilationTest(TestCase):
g = always_comb(h).gen
i = g.gi_frame.f_locals['self']
expected = set(['a', 'x'])
self.assertEqual(i.inputs, expected)
assert i.inputs == expected
def testInfer3(self):
a, b, c, d = [Signal(0) for i in range(4)]
@ -115,7 +115,7 @@ class AlwaysCombCompilationTest(TestCase):
g = always_comb(h).gen
i = g.gi_frame.f_locals['self']
expected = set(['x'])
self.assertEqual(i.inputs, expected)
assert i.inputs == expected
def testInfer4(self):
a, b, c, d = [Signal(0) for i in range(4)]
@ -126,7 +126,7 @@ class AlwaysCombCompilationTest(TestCase):
g = always_comb(h).gen
i = g.gi_frame.f_locals['self']
expected = set(['a'])
self.assertEqual(i.inputs, expected)
assert i.inputs == expected
def testInfer5(self):
@ -137,9 +137,9 @@ class AlwaysCombCompilationTest(TestCase):
try:
g = always_comb(h).gen
except AlwaysCombError as e:
self.assertEqual(e.kind, _error.SignalAsInout % "c")
assert e.kind == _error.SignalAsInout % "c"
else:
self.fail()
raise AssertionError
def testInfer6(self):
a, b, c, d = [Signal(0) for i in range(4)]
@ -149,9 +149,9 @@ class AlwaysCombCompilationTest(TestCase):
try:
g = always_comb(h).gen
except AlwaysCombError as e:
self.assertEqual(e.kind, _error.SignalAsInout % "c")
assert e.kind == _error.SignalAsInout % "c"
else:
self.fail()
raise AssertionError
def testInfer7(self):
a, b, c, d = [Signal(0) for i in range(4)]
@ -160,7 +160,7 @@ class AlwaysCombCompilationTest(TestCase):
g = always_comb(h).gen
i = g.gi_frame.f_locals['self']
expected = set(['a', 'b', 'x'])
self.assertEqual(i.inputs, expected)
assert i.inputs == expected
def testInfer8(self):
a, b, c, d = [Signal(0) for i in range(4)]
@ -171,7 +171,7 @@ class AlwaysCombCompilationTest(TestCase):
g = always_comb(h).gen
i = g.gi_frame.f_locals['self']
expected = set(['a', 'b', 'x'])
self.assertEqual(i.inputs, expected)
assert i.inputs == expected
def testInfer9(self):
a, b, c, d = [Signal(0) for i in range(4)]
@ -180,7 +180,7 @@ class AlwaysCombCompilationTest(TestCase):
g = always_comb(h).gen
i = g.gi_frame.f_locals['self']
expected = set(['a', 'b', 'x'])
self.assertEqual(i.inputs, expected)
assert i.inputs == expected
def testInfer10(self):
a, b, c, d = [Signal(0) for i in range(4)]
@ -191,7 +191,7 @@ class AlwaysCombCompilationTest(TestCase):
g = always_comb(h).gen
i = g.gi_frame.f_locals['self']
expected = set(['a', 'b', 'd', 'x'])
self.assertEqual(i.inputs, expected)
assert i.inputs == expected
def testEmbeddedFunction(self):
a, b, c, d = [Signal(0) for i in range(4)]
@ -205,9 +205,9 @@ class AlwaysCombCompilationTest(TestCase):
try:
g = always_comb(h)
except AlwaysCombError as e:
self.assertEqual(e.kind, _error.EmbeddedFunction)
assert e.kind == _error.EmbeddedFunction
else:
self.fail()
raise AssertionError
class AlwaysCombSimulationTest1(TestCase):
@ -249,7 +249,7 @@ class AlwaysCombSimulationTest1(TestCase):
d.next = v[3]
yield clk.posedge
yield clk.negedge
self.assertEqual(x, z)
assert x == z
raise StopSimulation("always_comb simulation test")
return instances()
@ -346,7 +346,7 @@ class AlwaysCombSimulationTest2(TestCase):
k.next = v
yield clk.posedge
yield clk.negedge
self.assertEqual(x, z)
assert x == z
raise StopSimulation("always_comb simulation test")
return comb, gen, clkGen(), stimulus()
@ -393,7 +393,7 @@ class InferWaiterTest(TestCase):
a, b, c, d, r, s = [Signal(intbv(0)) for i in range(6)]
inst_r = MyHDLFunc(a, b, c, d, r)
self.assertEqual(type(inst_r.waiter), waiterType)
assert type(inst_r.waiter) == waiterType
inst_s = MyHDLFunc(a, b, c, d, s)
@ -411,7 +411,7 @@ class InferWaiterTest(TestCase):
def check():
while 1:
yield a, b, c, r, s
self.assertEqual(r, s)
assert r == s
return inst_r, _Waiter(inst_s.gen), _Waiter(stimulus()), _Waiter(check())

View File

@ -62,40 +62,40 @@ class TestBin(TestCase):
def testSmall(self):
for i in range(-65, 65):
self.assertEqual(bin(i), binref(i))
assert bin(i) == binref(i)
def testSmallWidth(self):
for i in range(-65, 65):
w = randrange(1, 8)
self.assertEqual(bin(i, w), binref(i, w))
assert bin(i, w) == binref(i, w)
def testRandomInt(self):
for j in range(SIZE):
i = randrange(-sys.maxsize, sys.maxsize)
self.assertEqual(bin(i), binref(i))
assert bin(i) == binref(i)
def testRandomIntWidth(self):
for j in range(SIZE):
w = randrange(1, 1000)
i = randrange(-sys.maxsize, sys.maxsize)
self.assertEqual(bin(i, w), binref(i, w))
assert bin(i, w) == binref(i, w)
def testRandomLong(self):
for j in range(SIZE):
k = randrange(sys.maxsize)
i = k + sys.maxsize
self.assertEqual(bin(i), binref(i))
assert bin(i) == binref(i)
i = -k - sys.maxsize
self.assertEqual(bin(i), binref(i))
assert bin(i) == binref(i)
def testRandomLongWith(self):
for j in range(SIZE):
w = randrange(1, 1000)
k = randrange(sys.maxsize)
i = k + sys.maxsize
self.assertEqual(bin(i, w), binref(i, w))
assert bin(i, w) == binref(i, w)
i = -k - sys.maxsize
self.assertEqual(bin(i, w), binref(i, w))
assert bin(i, w) == binref(i, w)

View File

@ -21,6 +21,7 @@
from __future__ import absolute_import
import pytest
import unittest
from unittest import TestCase
import random
@ -52,8 +53,8 @@ class TestConcat(TestCase):
refstr = basestr + reduce(operator.add, extstr)
reflen = len(refstr)
ref = long(refstr, 2)
self.assertEqual(bv, ref)
self.assertEqual(len(bv), reflen)
assert bv == ref
assert len(bv) == reflen
def ConcatToUnsizedBase(self, bases, extslist):
for base, basestr in zip(bases, self.bases):
@ -61,8 +62,8 @@ class TestConcat(TestCase):
bv = concat(base, *exts)
refstr = basestr + reduce(operator.add, extstr)
ref = long(refstr, 2)
self.assertEqual(bv, ref)
self.assertEqual(len(bv), 0)
assert bv == ref
assert len(bv) == 0
def testConcatStringsToString(self):
@ -240,12 +241,14 @@ class TestConcat(TestCase):
def testWrongType(self):
a = intbv(4)
self.assertRaises(TypeError, concat, a, 5)
with pytest.raises(TypeError):
concat(a, 5)
def testUnsizedConcat(self):
a = intbv(4)
b = intbv(5)
self.assertRaises(TypeError, concat, a, b)
with pytest.raises(TypeError):
concat(a, b)
if __name__ == "__main__":
unittest.main()

View File

@ -46,7 +46,7 @@ class TestEnum(TestCase):
except ValueError:
pass
else:
self.fail()
raise AssertionError
def testWrongAttr(self):
try:
@ -54,7 +54,7 @@ class TestEnum(TestCase):
except AttributeError:
pass
else:
self.fail()
raise AssertionError
def testAttrAssign(self):
try:
@ -62,7 +62,7 @@ class TestEnum(TestCase):
except AttributeError:
pass
else:
self.fail()
raise AssertionError
def testWrongAttrAssign(self):
try:
@ -70,18 +70,18 @@ class TestEnum(TestCase):
except AttributeError:
pass
else:
self.fail()
raise AssertionError
def testHomograph(self):
self.assertTrue(t_State is not t_Homograph)
assert t_State is not t_Homograph
def testHomographLiteral(self):
self.assertTrue(t_State.SEARCH is not t_Homograph.SEARCH)
assert t_State.SEARCH is not t_Homograph.SEARCH
def testItemCopy(self):
e = copy.deepcopy(t_State.SEARCH)
self.assertTrue(e == t_State.SEARCH)
self.assertTrue(e != t_State.CONFIRM)
assert e == t_State.SEARCH
assert e != t_State.CONFIRM
if __name__ == "__main__":

View File

@ -138,7 +138,7 @@ class InferWaiterTest(TestCase):
gen_inst_r = genFunc(a, b, c, d, r)
if not isinstance(gen_inst_r, GeneratorType): # decorator type
gen_inst_r = gen_inst_r.gen
self.assertEqual(type(_inferWaiter(gen_inst_r)), waiterType)
assert type(_inferWaiter(gen_inst_r)) == waiterType
gen_inst_s = genFunc(a, b, c, d, s)
if not isinstance(gen_inst_s, GeneratorType): # decorator type
@ -158,7 +158,7 @@ class InferWaiterTest(TestCase):
def check():
while 1:
yield a, b, c, r, s
self.assertEqual(r, s)
assert r == s
return gen_inst_r, _Waiter(gen_inst_s), _Waiter(stimulus()), _Waiter(check())

View File

@ -51,9 +51,9 @@ class InstanceCompilationTest(TestCase):
try:
instance(h)
except InstanceError as e:
self.assertEqual(e.kind, _error.ArgType)
assert e.kind == _error.ArgType
else:
self.fail()
raise AssertionError
def testArgIsGeneratorFunction(self):
try:
@ -61,9 +61,9 @@ class InstanceCompilationTest(TestCase):
def h():
return None
except InstanceError as e:
self.assertEqual(e.kind, _error.ArgType)
assert e.kind == _error.ArgType
else:
self.fail()
raise AssertionError
def testArgHasNoArgs(self):
try:
@ -71,9 +71,9 @@ class InstanceCompilationTest(TestCase):
def h(n):
yield n
except InstanceError as e:
self.assertEqual(e.kind, _error.NrOfArgs)
assert e.kind == _error.NrOfArgs
else:
self.fail()
raise AssertionError
if __name__ == "__main__":

View File

@ -37,7 +37,7 @@ from myhdl._compat import long, integer_types
class TestIntbvInit(TestCase):
def testDefaultValue(self):
self.assertEqual(intbv(), 0)
assert intbv() == 0
def getItem(s, i):
@ -107,10 +107,10 @@ class TestIntBvIndexing(TestCase):
ref = long(getItem(s, i), 2)
res = bv[i]
resi = bvi[i]
self.assertEqual(res, ref)
self.assertEqual(type(res), bool)
self.assertEqual(resi, ref^1)
self.assertEqual(type(resi), bool)
assert res == ref
assert type(res) == bool
assert resi == ref^1
assert type(resi) == bool
def testGetSlice(self):
self.seqsSetup()
@ -124,14 +124,14 @@ class TestIntBvIndexing(TestCase):
res = bv[i:j]
resi = bvi[i:j]
except ValueError:
self.assertTrue(i<=j)
assert i<=j
continue
ref = long(getSlice(s, i, j), 2)
self.assertEqual(res, ref)
self.assertEqual(type(res), intbv)
assert res == ref
assert type(res) == intbv
mask = (2**(i-j))-1
self.assertEqual(resi, ref ^ mask)
self.assertEqual(type(resi), intbv)
assert resi == ref ^ mask
assert type(resi) == intbv
def testGetSliceLeftOpen(self):
self.seqsSetup()
@ -143,10 +143,10 @@ class TestIntBvIndexing(TestCase):
res = bv[:j]
resi = bvi[:j]
ref = long(getSliceLeftOpen(s, j), 2)
self.assertEqual(res, ref)
self.assertEqual(type(res), intbv)
self.assertEqual(resi+ref, -1)
self.assertEqual(type(res), intbv)
assert res == ref
assert type(res) == intbv
assert resi+ref == -1
assert type(res) == intbv
def testSetItem(self):
@ -168,10 +168,10 @@ class TestIntBvIndexing(TestCase):
ref1 = long(setItem(s, i, '1'), 2)
ref0i = ~long(setItem(s, i, '1'), 2)
ref1i = ~long(setItem(s, i, '0'), 2)
self.assertEqual(bv0, ref0)
self.assertEqual(bv1, ref1)
self.assertEqual(bv0i, ref0i)
self.assertEqual(bv1i, ref1i)
assert bv0 == ref0
assert bv1 == ref1
assert bv0i == ref0i
assert bv1i == ref1i
def testSetSlice(self):
self.seqsSetup()
@ -192,21 +192,21 @@ class TestIntBvIndexing(TestCase):
try:
bv[i:j] = val
except ValueError:
self.assertTrue(i<=j or val >= 2**(i-j))
assert i<=j or val >= 2**(i-j)
continue
else:
ref = long(setSlice(s, i, j, extv), 2)
self.assertEqual(bv, ref)
assert bv == ref
mask = (2**(i-j))-1
vali = val ^ mask
try:
bvi[i:j] = vali
except ValueError:
self.assertTrue(vali >= 2**(i-j))
assert vali >= 2**(i-j)
continue
else:
refi = ~long(setSlice(s, i, j, extv), 2)
self.assertEqual(bvi, refi)
assert bvi == refi
def testSetSliceLeftOpen(self):
self.seqsSetup()
@ -224,9 +224,9 @@ class TestIntBvIndexing(TestCase):
bv[:j] = val
bvi[:j] = -1-val
ref = long(setSliceLeftOpen(s, j, v), 2)
self.assertEqual(bv, ref)
assert bv == ref
refi = ~long(setSliceLeftOpen(s, j, v), 2)
self.assertEqual(bvi, refi)
assert bvi == refi
@ -277,9 +277,9 @@ class TestIntBvAsInt(TestCase):
#self.assertEqual(type(r1), intbv)
#self.assertEqual(type(r2), intbv)
#self.assertEqual(type(r3), intbv)
self.assertEqual(r1, ref)
self.assertEqual(r2, ref)
self.assertEqual(r3, ref)
assert r1 == ref
assert r2 == ref
assert r3 == ref
def augmentedAssignCheck(self, op, imin=0, imax=None, jmin=0, jmax=None):
self.seqSetup(imin=imin, imax=imax, jmin=jmin, jmax=jmax)
@ -293,13 +293,13 @@ class TestIntBvAsInt(TestCase):
r2 = op(r2, bj)
r3 = bi3 = intbv(long(i))
r3 = op(r3, bj)
self.assertEqual(type(r1), intbv)
self.assertEqual(type(r3), intbv)
self.assertEqual(r1, ref)
self.assertEqual(r2, ref)
self.assertEqual(r3, ref)
self.assertTrue(r1 is bi1)
self.assertTrue(r3 is bi3)
assert type(r1) == intbv
assert type(r3) == intbv
assert r1 == ref
assert r2 == ref
assert r3 == ref
assert r1 is bi1
assert r3 is bi3
def unaryCheck(self, op, imin=0, imax=None):
self.seqSetup(imin=imin, imax=imax)
@ -308,7 +308,7 @@ class TestIntBvAsInt(TestCase):
ref = op(i)
r1 = op(bi)
#self.assertEqual(type(r1), intbv)
self.assertEqual(r1, ref)
assert r1 == ref
def conversionCheck(self, op, imin=0, imax=None):
self.seqSetup(imin=imin, imax=imax)
@ -316,8 +316,8 @@ class TestIntBvAsInt(TestCase):
bi = intbv(i)
ref = op(i)
r1 = op(bi)
self.assertEqual(type(r1), type(ref))
self.assertEqual(r1, ref)
assert type(r1) == type(ref)
assert r1 == ref
def comparisonCheck(self, op, imin=0, imax=None, jmin=0, jmax=None):
self.seqSetup(imin=imin, imax=imax, jmin=jmin, jmax=jmax)
@ -328,9 +328,9 @@ class TestIntBvAsInt(TestCase):
r1 = op(bi, j)
r2 = op(i, bj)
r3 = op(bi, bj)
self.assertEqual(r1, ref)
self.assertEqual(r2, ref)
self.assertEqual(r3, ref)
assert r1 == ref
assert r2 == ref
assert r3 == ref
def testAdd(self):
self.binaryCheck(operator.add)
@ -447,20 +447,20 @@ class TestIntBvAsInt(TestCase):
class TestIntbvBounds(TestCase):
def testConstructor(self):
self.assertEqual(intbv(40, max=54), 40)
assert intbv(40, max=54) == 40
try:
intbv(40, max=27)
except ValueError:
pass
else:
self.fail()
self.assertEqual(intbv(25, min=16), 25)
raise AssertionError
assert intbv(25, min=16) == 25
try:
intbv(25, min=27)
except ValueError:
pass
else:
self.fail()
raise AssertionError
def testSliceAssign(self):
a = intbv(min=-24, max=34)
@ -468,7 +468,7 @@ class TestIntbvBounds(TestCase):
for k in (6, 9, 10):
a[:] = 0
a[k:] = i
self.assertEqual(a, i)
assert a == i
for i in (-25, -128, 34, 35, 229):
for k in (0, 9, 10):
try:
@ -476,7 +476,7 @@ class TestIntbvBounds(TestCase):
except ValueError:
pass
else:
self.fail()
raise AssertionError
a = intbv(5)[8:]
for v in (0, 2**8-1, 100):
a[:] = v
@ -486,11 +486,11 @@ class TestIntbvBounds(TestCase):
except ValueError:
pass
else:
self.fail()
raise AssertionError
def checkBounds(self, i, j, op):
a = intbv(i)
self.assertEqual(a, i) # just to be sure
assert a == i # just to be sure
try:
exec("a %s long(j)" % op)
except (ZeroDivisionError, ValueError):
@ -508,7 +508,7 @@ class TestIntbvBounds(TestCase):
except ValueError:
pass
else:
self.fail()
raise AssertionError
elif a < i :
b = intbv(i, min=a, max=i+1)
exec("b %s long(j)" % op) # should be ok
@ -519,7 +519,7 @@ class TestIntbvBounds(TestCase):
except ValueError:
pass
else:
self.fail()
raise AssertionError
else: # a == i
b = intbv(i, min=i, max=i+1)
exec("b %s long(j)" % op) # should be ok
@ -573,11 +573,11 @@ class TestIntbvCopy(TestCase):
b = copy(n)
c = deepcopy(n)
for m in (a, b, c):
self.assertEqual(n, m)
self.assertEqual(n._val, m._val)
self.assertEqual(n.min, m.min)
self.assertEqual(n.max, m.max)
self.assertEqual(len(n), len(m))
assert n == m
assert n._val == m._val
assert n.min == m.min
assert n.max == m.max
assert len(n) == len(m)

View File

@ -70,9 +70,9 @@ class InstancesTest(TestCase):
i = instances()
# can't just construct an expected list;
# that would become part of the instances also!
self.assertEqual(len(i), 4)
assert len(i) == 4
for e in (D_1, A_1, B_1, C_1):
self.assertTrue(e in i)
assert e in i
if __name__ == "__main__":

View File

@ -23,6 +23,7 @@ from __future__ import absolute_import
import unittest
from unittest import TestCase
import pytest
from myhdl._intbv import intbv
from myhdl._modbv import modbv
@ -32,26 +33,28 @@ class TestModbvWrap(TestCase):
def testWrap(self):
x = modbv(0, min=-8, max=8)
x[:] = x + 1
self.assertEqual(1, x)
assert 1 == x
x[:] = x + 2
self.assertEqual(3, x)
assert 3 == x
x[:] = x + 5
self.assertEqual(-8, x)
assert -8 == x
x[:] = x + 1
self.assertEqual(-7, x)
assert -7 == x
x[:] = x - 5
self.assertEqual(4, x)
assert 4 == x
x[:] = x - 4
self.assertEqual(0, x)
assert 0 == x
x[:] += 15
x[:] = x - 1
self.assertEqual(-2, x)
assert -2 == x
def testInit(self):
self.assertRaises(ValueError, intbv, 15, min=-8, max=8)
with pytest.raises(ValueError):
intbv(15, min=-8, max=8)
x = modbv(15, min=-8, max=8)
self.assertEqual(-1, x)
assert -1 == x
# Arbitrary boundraries support (no exception)
modbv(5, min=-3, max=8)
@ -62,14 +65,14 @@ class TestModbvWrap(TestCase):
x = intbv(0, min=-8, max=8)
try:
x[:] += 15
self.fail()
raise AssertionError
except ValueError:
pass
x = intbv(0, min=-8, max=8)
try:
x[:] += 15
self.fail()
raise AssertionError
except ValueError:
pass

View File

@ -60,7 +60,7 @@ class TestIntbvSigned(TestCase):
# Expect the number to be returned
a = intbv(0x3b, min=0, max=0x7c)
b = a.signed()
self.assertEqual(b, 0x3b)
assert b == 0x3b
# intbv with positive range, pos number, and msb set, return signed()
# test various bit patterns to see that the 2's complement
@ -68,71 +68,71 @@ class TestIntbvSigned(TestCase):
# Expect the number to be converted to a negative number
a = intbv(7, min=0, max=8)
b = a.signed()
self.assertEqual(b, -1)
assert b == -1
a = intbv(6, min=0, max=8)
b = a.signed()
self.assertEqual(b, -2)
assert b == -2
a = intbv(5, min=0, max=8)
b = a.signed()
self.assertEqual(b, -3)
assert b == -3
# set bit #3 and increase the range so that the set bit is considered
# the sign bit. Here min = 0
# Expect to return -4
a = intbv(4, min=0, max=5)
b = a.signed()
self.assertEqual(b, -4)
assert b == -4
a = intbv(4, min=0, max=6)
b = a.signed()
self.assertEqual(b, -4)
assert b == -4
a = intbv(4, min=0, max=7)
b = a.signed()
self.assertEqual(b, -4)
assert b == -4
a = intbv(4, min=0, max=8)
b = a.signed()
self.assertEqual(b, -4)
assert b == -4
# here it is not the sign bit anymore
# Expect the value to be 4
a = intbv(4, min=0, max=9)
b = a.signed()
self.assertEqual(b, 4)
assert b == 4
# set bit #3 and increase the range so that the set bit is considered
# the sign bit. Here min > 0
# Expect to return -4
a = intbv(4, min=1, max=5)
b = a.signed()
self.assertEqual(b, -4)
assert b == -4
a = intbv(4, min=2, max=6)
b = a.signed()
self.assertEqual(b, -4)
assert b == -4
a = intbv(4, min=3, max=7)
b = a.signed()
self.assertEqual(b, -4)
assert b == -4
a = intbv(4, min=4, max=8)
b = a.signed()
self.assertEqual(b, -4)
assert b == -4
# again with min > 0, here it is not the sign bit anymore
# Expect the value to be 4
a = intbv(4, min=2, max=9)
b = a.signed()
self.assertEqual(b, 4)
assert b == 4
# intbv with positive range, value = 0, return signed()
# Expect the number to be returned
a = intbv(0, min=0, max=0x8)
b = a.signed()
self.assertEqual(b, 0)
assert b == 0
#~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@ -144,46 +144,46 @@ class TestIntbvSigned(TestCase):
# Expect value to be returned as is
a = intbv(8)
b = a.signed()
self.assertEqual(b, 8)
assert b == 8
# intbv without range, neg number, return signed()
# Expect value to be returned as is
a = intbv(-8)
b = a.signed()
self.assertEqual(b, -8)
assert b == -8
# set bit #3 and increase the range that the set bit is actually the
# msb, but due to the negative range not considered signed
# Expect to return 4
a = intbv(4, min=-1, max=5)
b = a.signed()
self.assertEqual(b, 4)
assert b == 4
a = intbv(4, min=-1, max=6)
b = a.signed()
self.assertEqual(b, 4)
assert b == 4
a = intbv(4, min=-1, max=7)
b = a.signed()
self.assertEqual(b, 4)
assert b == 4
a = intbv(4, min=-1, max=8)
b = a.signed()
self.assertEqual(b, 4)
assert b == 4
# intbv with negative range, pos number, and msb set, return signed()
# Expect the number to returned as is
a = intbv(7, min=-1, max=8)
b = a.signed()
self.assertEqual(b, 7)
assert b == 7
a = intbv(6, min=-1, max=8)
b = a.signed()
self.assertEqual(b, 6)
assert b == 6
a = intbv(5, min=-1, max=8)
b = a.signed()
self.assertEqual(b, 5)
assert b == 5
# intbv with symmetric (min = -max) range, pos value, msb set
@ -191,21 +191,21 @@ class TestIntbvSigned(TestCase):
# Expect value returned as is
a = intbv(4, min=-8, max=8)
b = a.signed()
self.assertEqual(b, 4)
assert b == 4
# intbv with symmetric (min = -max) range, neg value,
# return signed()
# Expect value returned as is
a = intbv(-4, min=-8, max=8)
b = a.signed()
self.assertEqual(b, -4)
assert b == -4
# intbv with symmetric (min=-max) range, value = 0,
# return signed()
# Expect value returned as is
a = intbv(0, min=-8, max=8)
b = a.signed()
self.assertEqual(b, 0)
assert b == 0
@ -218,14 +218,14 @@ class TestIntbvSigned(TestCase):
'''
a = intbv(4, min=-8, max=8)
b = a[4:]
self.assertEqual(b, 4)
assert b == 4
b = a[4:].signed()
self.assertEqual(b, 4) # msb is not set with a 4 bit slice
assert b == 4 # msb is not set with a 4 bit slice
b = a[3:]
self.assertEqual(b, 4)
assert b == 4
b = a[3:].signed()
self.assertEqual(b, -4) # msb is set with 3 bits sliced
assert b == -4 # msb is set with 3 bits sliced
def testSignedConcat(self):
@ -234,12 +234,12 @@ class TestIntbvSigned(TestCase):
# concat 3 bits
# Expect the signed function to return a negative value
a = concat(True, True, True).signed()
self.assertEqual(a, -1)
assert a == -1
# concate a 3 bit intbv with msb set and two bits
# Expect a negative number
b = concat(intbv(5,min=0,max=8), True, True).signed()
self.assertEqual(b, -9)
assert b == -9
def checkInvariants(self, a):
@ -247,10 +247,10 @@ class TestIntbvSigned(TestCase):
W = len(a)
b = intbv(a.signed())
if W > 0:
self.assertEqual(a[W:], b[W:])
self.assertEqual(b[:W], -a[W-1])
assert a[W:] == b[W:]
assert b[:W] == -a[W-1]
else:
self.assertEqual(a, b)
assert a == b
def testRandom(self):
NRTESTS = 1000

View File

@ -140,17 +140,17 @@ class TestTraceSigs(TestCase):
try:
dut = top3()
except TraceSignalsError as e:
self.assertEqual(e.kind, _error.MultipleTraces)
assert e.kind == _error.MultipleTraces
else:
self.fail()
raise AssertionError
def testArgType1(self):
try:
dut = traceSignals([1, 2])
except TraceSignalsError as e:
self.assertEqual(e.kind, _error.ArgType)
assert e.kind == _error.ArgType
else:
self.fail()
raise AssertionError
def testReturnVal(self):
from myhdl import ExtractHierarchyError
@ -158,21 +158,21 @@ class TestTraceSigs(TestCase):
try:
dut = traceSignals(dummy)
except ExtractHierarchyError as e:
self.assertEqual(e.kind, _error.InconsistentToplevel % (2, "dummy"))
assert e.kind == _error.InconsistentToplevel % (2, "dummy")
else:
self.fail()
raise AssertionError
def testHierarchicalTrace1(self):
p = "%s.vcd" % fun.__name__
top()
self.assertTrue(path.exists(p))
assert path.exists(p)
def testHierarchicalTrace2(self):
pdut = "%s.vcd" % top.__name__
psub = "%s.vcd" % fun.__name__
dut = traceSignals(top)
self.assertTrue(path.exists(pdut))
self.assertTrue(not path.exists(psub))
assert path.exists(pdut)
assert not path.exists(psub)
def testTristateTrace(self):
Simulation(topTristate()).run(100, quiet=QUIET)
@ -185,14 +185,14 @@ class TestTraceSigs(TestCase):
_simulator._tracing = 0
size = path.getsize(p)
pbak = p + '.' + str(path.getmtime(p))
self.assertTrue(not path.exists(pbak))
assert not path.exists(pbak)
dut = traceSignals(fun)
_simulator._tf.close()
_simulator._tracing = 0
self.assertTrue(path.exists(p))
self.assertTrue(path.exists(pbak))
self.assertTrue(path.getsize(pbak) == size)
self.assertTrue(path.getsize(p) < size)
assert path.exists(p)
assert path.exists(pbak)
assert path.getsize(pbak) == size
assert path.getsize(p) < size