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mirror of https://github.com/myhdl/myhdl.git synced 2025-01-24 21:52:56 +08:00

updated code

This commit is contained in:
jand 2003-05-14 11:38:26 +00:00
parent 924ab794db
commit 91ff7eb533

View File

@ -144,14 +144,9 @@ single bit. We will test all Gray codes up to a certain order
\begin{verbatim}
def testSingleBitChange(self):
""" Check that only one bit changes in successive codewords """
B = Signal(intbv(-1))
G = Signal(intbv(0))
G_Z = Signal(intbv(0))
def test(width):
def test(B, G, width):
B.next = intbv(0)
yield delay(10)
for i in range(1, 2**width):
@ -161,12 +156,17 @@ single bit. We will test all Gray codes up to a certain order
diffcode = bin(G ^ G_Z)
self.assertEqual(diffcode.count('1'), 1)
for width in range(MAX_WIDTH):
for width in range(1, MAX_WIDTH):
B = Signal(intbv(-1))
G = Signal(intbv(0))
G_Z = Signal(intbv(0))
dut = bin2gray(B, G, width)
sim = Simulation(dut, test(width))
check = test(B, G, width)
sim = Simulation(dut, check)
sim.run(quiet=1)
\end{verbatim}
Note how the actual check is performed by a \code{self.assertEqual}
method, defined by the \code{unittest.TestCase} class.
@ -177,13 +177,9 @@ numbers:
\begin{verbatim}
def testUniqueCodeWords(self):
""" Check that all codewords occur exactly once """
B = Signal(intbv(-1))
G = Signal(intbv(0))
def test(width):
def test(B, G, width):
actual = []
for i in range(2**width):
B.next = intbv(i)
@ -193,9 +189,12 @@ numbers:
expected = range(2**width)
self.assertEqual(actual, expected)
for width in range(MAX_WIDTH):
for width in range(1, MAX_WIDTH):
B = Signal(intbv(-1))
G = Signal(intbv(0))
dut = bin2gray(B, G, width)
sim = Simulation(dut, test(width))
check = test(B, G, width)
sim = Simulation(dut, check)
sim.run(quiet=1)
\end{verbatim}
@ -347,14 +346,11 @@ expected result. The new test case code is as follows:
class TestOriginalGrayCode(TestCase):
def testOriginalGrayCode(self):
""" Check that the code is an original Gray code """
B = Signal(intbv(-1))
G = Signal(intbv(0))
Rn = []
def stimulus(n):
def stimulus(B, G, n):
for i in range(2**n):
B.next = intbv(i)
yield delay(10)
@ -364,8 +360,11 @@ class TestOriginalGrayCode(TestCase):
for n in range(2, MAX_WIDTH):
Ln = nextLn(Ln)
del Rn[:]
B = Signal(intbv(-1))
G = Signal(intbv(0))
dut = bin2gray(B, G, n)
sim = Simulation(dut, stimulus(n))
stim = stimulus(B, G, n)
sim = Simulation(dut, stim)
sim.run(quiet=1)
self.assertEqual(Ln, Rn)