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Update _ShadowSignal.py
removed dangling ']' in toVerilog()
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@ -229,7 +229,7 @@ class ConcatSignal(_ShadowSignal):
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if isinstance(a, _Signal):
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lines.append("assign %s[%s-1:%s] = %s;" % (self._name, hi, lo, a._name))
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else:
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lines.append("assign %s[%s-1:%s] = 'b%s;" % (self._name, hi, lo, bin(ini[hi:lo],w)]))
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lines.append("assign %s[%s-1:%s] = 'b%s;" % (self._name, hi, lo, bin(ini[hi:lo],w)))
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hi = lo
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return "\n".join(lines)
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