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Fixed issue #3
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@ -220,7 +220,7 @@ class _SigNameVisitor(ast.NodeVisitor):
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elif self.context == OUTPUT:
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self.outputs.add(id)
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elif self.context == INOUT:
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raise AlwaysSeqError(_error.SigAugAssign % id)
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raise AlwaysSeqError(_error.SigAugAssign, id)
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else:
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raise AssertionError("bug in always_seq")
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