typo

doc/manual/background.tex

@@ -99,7 +99,7 @@ the Simulator, that interacts with such resumable functions; they are
 called 
 \index{VHDL!process}%
 \dfn{processes} in VHDL and 
-\index{VHDL!always block}%
+\index{Verilog!always block}%
 \dfn{always blocks} in
 Verilog. Like in those languages, Python generators provide an elegant
 and efficient method to model concurrency, without having to resort to