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COMPLETED - move to ast
All conversion unit tests work.
This commit is contained in:
Jan Decaluwe
parent
c1e31def1e
commit
dc10d0899d
@ -881,7 +881,7 @@ class _AnalyzeVisitor(ast.NodeVisitor, _ConversionMixin):
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n = node.left.id
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# check wether it can be a case
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if isinstance(arg.obj, EnumItemType):
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node.case = (node.expr, arg.obj)
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node.case = (node.left, arg.obj)
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# check whether it can be part of an edge check
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elif n in self.tree.sigdict:
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sig = self.tree.sigdict[n]
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@ -357,7 +357,7 @@ opmap = {
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ast.Sub : '-',
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ast.Mult : '*',
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ast.Div : '/',
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ast.Mod : '%',
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ast.Mod : 'mod',
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ast.Pow : '**',
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ast.LShift : 'shift_left',
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ast.RShift : 'shift_right',
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@ -374,7 +374,7 @@ opmap = {
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ast.GtE : '>=',
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ast.Lt : '<',
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ast.LtE : '<=',
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ast.NotEq : '!=',
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ast.NotEq : '/=',
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ast.And : 'and',
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ast.Or : 'or',
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}
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@ -389,7 +389,9 @@ class _ConvertVisitor(ast.NodeVisitor, _ConversionMixin):
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self.ind = ''
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self.isSigAss = False
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self.labelStack = []
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self.context = None
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def write(self, arg):
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self.buf.write("%s" % arg)
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@ -517,10 +519,10 @@ class _ConvertVisitor(ast.NodeVisitor, _ConversionMixin):
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def visit_BinOp(self, node):
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if isinstance(node.op, (ast.LShift, ast.RShift)):
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self.ShiftOp(node)
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self.shiftOp(node)
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elif isinstance(node.op, (ast.BitAnd, ast.BitOr, ast.BitXor)):
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self.BitOp(node)
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elif isinstance(node.op, ast.Mod) and self.context == _context.PRINT:
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elif isinstance(node.op, ast.Mod) and (self.context == _context.PRINT):
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self.visit(node.left)
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self.write(", ")
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self.visit(node.right)
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@ -551,7 +553,7 @@ class _ConvertVisitor(ast.NodeVisitor, _ConversionMixin):
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elif isinstance(op, ast.FloorDiv):
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left.vhd.size = ns
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node.vhdOri.size = ns
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elif isinstance(op, ast.Mul):
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elif isinstance(op, ast.Mult):
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left.vhd.size += ds
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node.vhdOri.size = ns
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else:
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@ -560,7 +562,7 @@ class _ConvertVisitor(ast.NodeVisitor, _ConversionMixin):
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if isinstance(op, (ast.Add, ast.Sub, ast.Mod, ast.FloorDiv)):
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left.vhd.size = ns
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node.vhdOri.size = ns
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elif isinstance(op, ast.Mul):
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elif isinstance(op, ast.Mult):
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left.vhd.size += ds
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node.vhdOri.size = 2 * left.vhd.size
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else:
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@ -569,7 +571,7 @@ class _ConvertVisitor(ast.NodeVisitor, _ConversionMixin):
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if isinstance(op, ast.Add, ast.Sub, ast.Mod, ast.FloorDiv):
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right.vhd.size = ns
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node.vhdOri.size = ns
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elif isinstance(op, ast.Mul):
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elif isinstance(op, ast.Mult):
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node.vhdOri.size = 2 * right.vhd.size
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else:
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raise AssertionError("unexpected op %s" % op)
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@ -633,7 +635,7 @@ class _ConvertVisitor(ast.NodeVisitor, _ConversionMixin):
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# self.shiftOp(node, "shift_right")
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def shiftOp(self, node):
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pre, suf = self.inferShiftOpCast(node, node.left, node.right, op)
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pre, suf = self.inferShiftOpCast(node, node.left, node.right, node.op)
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self.write(pre)
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self.write("%s(" % opmap[type(node.op)])
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self.visit(node.left)
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@ -669,12 +671,15 @@ class _ConvertVisitor(ast.NodeVisitor, _ConversionMixin):
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# self.multiBitOp(node, 'xor')
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def BitOp(self, node):
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pre, suf = self.inferCast(node.vhd, node.vhdOri)
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self.write(pre)
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self.write("(")
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self.visit(node.left)
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self.write(" %s " % opmap[type(node.op)])
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self.visit(node.right)
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self.write(")")
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self.write(suf)
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# def multiBoolOp(self, node, op):
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# for n in node.nodes:
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@ -1041,27 +1046,27 @@ class _ConvertVisitor(ast.NodeVisitor, _ConversionMixin):
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def visit_AugAssign(self, node):
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op = opmap[node.op]
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op = opmap[type(node.op)]
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# XXX apparently no signed context required for augmented assigns
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left, op, right = node.target, node.op, node.value
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isFunc = False
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pre, suf = "", ""
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if isinstance(op, (ast.Add, ast.Sub, Ast.Mul, ast.Mod, ast.FloorDiv)):
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if isinstance(op, (ast.Add, ast.Sub, ast.Mult, ast.Mod, ast.FloorDiv)):
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pre, suf = self.inferBinaryOpCast(node, left, right, op)
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elif isinstance(op, (ast.LShift, ast.RShift)):
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isFunc = True
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pre, suf = self.inferShiftOpCast(node, left, right, op)
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self.visit(node.left)
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self.visit(left)
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self.write(" := ")
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self.write(pre)
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if isFunc:
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self.write("%s(" % opmap[type(op)])
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self.visit(node.left)
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self.visit(left)
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if isFunc:
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self.write(", ")
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else:
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self.write(" %s " % opmap[type(op)])
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self.visit(node.right)
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self.visit(right)
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if isFunc:
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self.write(")")
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self.write(suf)
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@ -1201,7 +1206,7 @@ class _ConvertVisitor(ast.NodeVisitor, _ConversionMixin):
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elif f is ord:
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opening, closing = '', ''
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if isinstance(node.args[0], ast.Str):
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if len(node.args[0].value) > 1:
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if len(node.args[0].s) > 1:
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self.raiseError(node, _error.UnsupportedType, "Strings with length > 1" )
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else:
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node.args[0].s = ord(node.args[0].s)
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@ -1331,8 +1336,12 @@ class _ConvertVisitor(ast.NodeVisitor, _ConversionMixin):
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elif isinstance(node.vhd, (vhd_unsigned, vhd_signed)):
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self.write('"%s"' % bin(n, node.vhd.size))
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else:
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if n < 0:
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self.write("(")
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self.write(n)
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if n < 0:
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self.write(")")
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def visit_Str(self, node):
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self.write("string'(\"%s\")" % node.s)
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@ -2061,7 +2070,7 @@ class _ConvertVisitor(ast.NodeVisitor, _ConversionMixin):
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# self.visit(elt)
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def visit_Tuple(self, node):
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assert context != None
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assert self.context != None
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sep = ", "
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tpl = node.elts
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self.visit(tpl[0])
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@ -2773,7 +2782,7 @@ class _AnnotateTypesVisitor(ast.NodeVisitor, _ConversionMixin):
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node.vhdOri = copy(node.target.vhd)
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else:
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node.left, node.right = node.target, node.value
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self.inferBinaryOpType(node)
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self.inferBinOpType(node)
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node.vhd = copy(node.target.vhd)
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@ -2861,7 +2870,7 @@ class _AnnotateTypesVisitor(ast.NodeVisitor, _ConversionMixin):
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if isinstance(left.vhd, vhd_std_logic) or isinstance(right.vhd, vhd_std_logic):
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left.vhd = right.vhd = vhd_std_logic()
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elif isinstance(left.vhd, vhd_unsigned) and maybeNegative(right.vhd):
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left.vhd = vhd_signed(expr.vhd.size + 1)
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left.vhd = vhd_signed(left.vhd.size + 1)
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elif maybeNegative(left.vhd) and isinstance(right.vhd, vhd_unsigned):
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right.vhd = vhd_signed(right.vhd.size + 1)
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node.vhdOri = copy(node.vhd)
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@ -2879,7 +2888,10 @@ class _AnnotateTypesVisitor(ast.NodeVisitor, _ConversionMixin):
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node.vhdOri = copy(node.vhd)
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def visit_Num(self, node):
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node.vhd = vhd_nat()
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if node.n < 0:
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node.vhd = vhd_int()
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else:
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node.vhd = vhd_nat()
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node.vhdOri = copy(node.vhd)
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# def visitFor(self, node):
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@ -3042,21 +3054,21 @@ class _AnnotateTypesVisitor(ast.NodeVisitor, _ConversionMixin):
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s = rs
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elif isinstance(op, ast.FloorDiv):
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s = ls
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elif isinstance(op, ast.Mul):
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elif isinstance(op, ast.Mult):
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s = ls + rs
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else:
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raise AssertionError("unexpected op %s" % op)
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elif isinstance(l, vhd_vector) and isinstance(r, vhd_int):
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if isinstance(op, (ast.Add, ast.Sub, ast.Mod, ast.FloorDiv)):
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s = ls
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elif isinstance(op, ast.Mul):
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elif isinstance(op, ast.Mult):
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s = 2 * ls
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else:
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raise AssertionError("unexpected op %s" % op)
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elif isinstance(l, vhd_int) and isinstance(r, vhd_vector):
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if isinstance(op, (ast.Add, ast.Sub, ast.Mod, ast.FloorDiv)):
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s = rs
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elif isinstance(op, ast.Mul):
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elif isinstance(op, ast.Mult):
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s = 2 * rs
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else:
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raise AssertionError("unexpected op %s" % op)
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