diff --git a/myhdl/test/toVerilog/test_hec.py b/myhdl/test/toVerilog/test_hec.py
index 4df88ab2..9108a824 100644
--- a/myhdl/test/toVerilog/test_hec.py
+++ b/myhdl/test/toVerilog/test_hec.py
@@ -94,6 +94,17 @@ def HecCalculatorTask(hec, header):
         yield header
         calculateHecTask(h, header)
         hec.next = h
+        
+def HecCalculatorTask2(hec, header):
+    """ Hec calculation module.
+
+    Version with task call.
+    """
+    h = intbv(0)[8:]
+    while 1:
+        yield header
+        calculateHecTask(header=header, hec=h)
+        hec.next = h
 
          
         
@@ -151,6 +162,10 @@ class TestHec(unittest.TestCase):
         sim = self.bench(HecCalculatorTask)
         Simulation(sim).run()
        
+    def testTask2(self):
+        sim = self.bench(HecCalculatorTask2)
+        Simulation(sim).run()
+       
         
 if __name__ == '__main__':
     unittest.main()