FPGA/myhdl
1
0
Fork 0
mirror of https://github.com/myhdl/myhdl.git synced 2025-01-24 21:52:56 +08:00
Code Issues Projects Releases Wiki Activity

typo

Browse Source
This commit is contained in:
jand 2003-08-29 11:55:55 +00:00
parent 0c9bbfd26b
commit ff02e1d458
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
doc/whatsnew03/whatsnew03.tex
View File

@ -312,9 +312,9 @@ example:
\end{verbatim}
\class{intbv} objects now have \var{min} and \var{max} attributes
that can be specified at construction time. The meaning is that that
that can be specified at construction time. The meaning is that
only values within \code{range(min, max)} are permitted. The default
values for these attributes is \var{None}, meaning ``infinite''. For
value for these attributes is \var{None}, meaning ``infinite''. For
example (traceback output shortened for clarity):
\begin{verbatim}