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mirror of https://github.com/myhdl/myhdl.git synced 2024-12-14 07:44:38 +08:00

1950 Commits

Author SHA1 Message Date
Jan Decaluwe
b28ef3e2da Fix #122 2015-09-26 13:20:45 +02:00
Jan Decaluwe
381f6e396c Add cast infer 2015-09-19 12:24:42 +02:00
Jan Decaluwe
68ac94cc54 Fix #114 2015-09-18 20:46:48 +02:00
jandecaluwe
97f9b3479b Merge pull request #119 from josyb/GroupMemSignalsinVCD
[enhancement] added scope-module// upscope around mem signals in.vcd
2015-08-07 22:14:15 +02:00
Josy Boelen
3c8733b0df added scope-module// upscope around mem signals to properly display in a group with Impulse plugin (http://toem.de/) for Eclipse 2015-08-01 14:22:03 +02:00
jandecaluwe
fdc453fcc7 Merge pull request #118 from cfelton/concat_issue_117
fixed bool const concat bug and added test
2015-07-30 22:53:03 +02:00
Christopher Felton
d24c465dae fixed bool const concat bug and added test 2015-07-28 11:25:02 -05:00
jandecaluwe
0f106505cb Merge pull request #116 from jck/signamevisitor
prevent adding intbv to senslist of always_comb
2015-07-28 14:25:21 +02:00
jandecaluwe
c7d92c471c Merge pull request #115 from cfelton/verilog_inout
Added inout pot declaration to Verilog conversion for TristateSignals
2015-07-28 14:23:43 +02:00
Keerthan Jaic
443024ff29 prevent adding intbv to senslist of always_comb
Since the merging of always_comb and always_seq NodeVisitors in #113,
intbvs are also added to the inputs by SigNameVisitor(in addition to
sigs and listofsigs). Since always_comb assumed that only sigs and
listofsigs are present in inputs, it wrongly addded intbvs to the
sensitivity list.
2015-07-28 01:57:33 -04:00
Christopher Felton
16bbf7e960 Merge branch 'master' of https://github.com/jandecaluwe/myhdl into verilog_inout 2015-07-27 11:31:50 -05:00
jandecaluwe
a1ba159a16 Merge pull request #113 from jck/decorators
core decorator improvements
2015-07-27 18:25:35 +02:00
Christopher Felton
75ba05b0c0 added inout port declaration for verilog conversion 2015-07-27 10:31:58 -05:00
Keerthan Jaic
f93d92a43a make waiter a property of Instantiators
Rather than storing the waiter as an attribute, store it as a property.
This reduces unnecessary computation while converting.
2015-07-24 10:19:23 -04:00
Keerthan Jaic
c5bf122133 centralize ast acces as an attr of instantiators 2015-07-24 10:19:23 -04:00
Keerthan Jaic
a402480c7b make always_seq inherit from always 2015-07-24 10:19:23 -04:00
Keerthan Jaic
9fda87bbec make always_comb inherit from always 2015-07-24 10:19:23 -04:00
Keerthan Jaic
63d7fce2af reuse _Instantiator init in _Always 2015-07-24 10:19:23 -04:00
Keerthan Jaic
91fff9974a use old style set definition for py2.6 2015-07-24 10:19:23 -04:00
Keerthan Jaic
2db353b0d0 always_seq: reuse SigNameVisitor from _visitors 2015-07-24 10:19:23 -04:00
Keerthan Jaic
6bd068632a custom raises kind
__tracebackhide__ does not work with the contextmanager decorator.
This custom raises_kind implementation uses __tracebackhide__ to provide
better reporting when tests fail.
2015-07-24 10:19:23 -04:00
Keerthan Jaic
cf0267c8ef move exception raising out of SigNameVisitor
Raise the exceptions in always_comb instead. This allows SigNameVisitor
to be shared with always_seq
2015-07-24 10:19:23 -04:00
Keerthan Jaic
c4ca71f40f remove use of adhoc input,output,inout enum 2015-07-22 05:23:13 -04:00
Keerthan Jaic
61047c189c move SigNameVisitor out of always_comb 2015-07-22 05:23:00 -04:00
jandecaluwe
983a169b16 Merge pull request #112 from josyb/TristateWarnings
Added Code to remove inappropriate warnings on Tristate Ports and TristateDrivers
2015-07-20 08:42:00 +02:00
Josy Boelen
bdef4c0d4e Replaced 'checking of presence of attributes' by 'isinstance' checks 2015-07-19 22:50:36 +02:00
jandecaluwe
7a104698f4 Merge pull request #111 from jck/simulators
Various HDL simulator,  conversion test improvements
2015-07-19 21:36:27 +02:00
Josy Boelen
efce467d1f Removed warnings on Tristate ports being read, and TristateDrivers being driven but not read 2015-07-19 21:09:53 +02:00
Keerthan Jaic
ffaa33acf9 pytest: provide more useful simulator info
* reuse registered simulators from _verify
* warn if simulator isn't found in PATH
2015-07-18 19:29:27 -04:00
Keerthan Jaic
41ce35f3dc simplify _verify
Rather than using many global dictionaries, just use a namedtuple
for each simulator.
2015-07-18 19:29:19 -04:00
Keerthan Jaic
dedc1ae3e0 rename icarus to iverilog, GHDL to ghdl
This matches the name of the corresponding simulator's binary.
py.test can use this to verify is a simulator is installed before
running conversion tests
2015-07-18 13:48:16 -04:00
Keerthan Jaic
c1e0c8edad Use pytest cli option to choose simulator in general conv tests 2015-07-18 13:48:16 -04:00
Keerthan Jaic
1ae78baadf test_interfaces4: remove unused imports 2015-07-18 13:48:16 -04:00
Keerthan Jaic
a61daab43f add support for nvc for VHDL verification
https://github.com/nickg/nvc
2015-07-18 13:48:16 -04:00
Keerthan Jaic
9725ec59ca move set_inheritable to _compat 2015-07-18 13:48:16 -04:00
Keerthan Jaic
5514c254bc clean up modelsim cosim makefile 2015-07-18 13:48:03 -04:00
Keerthan Jaic
1a8ff95a78 Support verification for modelsim 10.4 2015-07-18 12:54:29 -04:00
Jan Decaluwe
7c531fc097 Get rid of aggregates and their issues #107 2015-07-18 15:31:58 +02:00
Jan Decaluwe
9ce3a25fa2 Improve term_op signature #107 2015-07-18 15:23:48 +02:00
Jan Decaluwe
cf3f1af80c Fix tab issue 2015-07-18 10:51:13 +02:00
Jan Decaluwe
9bc72cc9dc Support ternary operator without VHDL 2008 #107 2015-07-18 10:33:17 +02:00
Jan Decaluwe
9820fca461 Version 1.0dev 2015-07-18 09:59:05 +02:00
Jan Decaluwe
c038d1275c Make toVerilog & toVHDL name attribute work with verify 2015-07-18 09:50:57 +02:00
Jan Decaluwe
88021ca2ee Merge branch '0.9-maintenance' 2015-07-18 09:18:04 +02:00
Jan Decaluwe
4e4d3a06fd Fix test to do what it was supposed to do 2015-07-18 09:13:44 +02:00
jandecaluwe
80b1864200 Merge pull request #103 from gitter-badger/gitter-badge
Add a Gitter chat badge to README.md
2015-07-14 18:12:32 +02:00
The Gitter Badger
143ab48c19 Added Gitter badge 2015-07-14 16:07:19 +00:00
jandecaluwe
5360783bf8 Merge pull request #89 from iscgar/cosim_windows_support
Windows support for co-simulation
2015-07-14 16:15:25 +02:00
jandecaluwe
494014c687 Merge pull request #93 from cfelton/test_interfaces4
fixed VHDL variable conversion issue in test_interface4
0.9.0
2015-07-12 19:58:25 +02:00
Jan Decaluwe
14dc28f798 Attempt to address #98 and related issues 2015-07-12 18:21:36 +02:00