26 Commits

Author	SHA1	Message	Date
jand	bc8aa99816	version number	2006-10-04 15:15:32 +00:00
jand	77e2887c47	to 0.5.1	2006-04-27 11:01:34 +00:00
jand	d96efbcb3f	before going to svn	2006-03-08 16:04:18 +00:00
jand	fb3b4393bc	0.5	2005-12-27 16:55:12 +00:00
jand	a351bf27a2	0.5c1	2005-12-27 14:48:54 +00:00
jand	e06395abe6	beta	2005-12-19 13:00:25 +00:00
jand	93440598e9	error reporting with user defined verilog	2005-11-22 21:00:48 +00:00
jand	f707d0024a	dev5	2005-11-21 11:07:14 +00:00
jand	26a43394c4	user-defined verilog ... bug fixes with hierarchical naming	2005-11-13 21:09:42 +00:00
jand	acc510f5ba	signed arithmetic	2005-11-04 09:07:13 +00:00
jand	0e564e672d	decorators	2005-10-21 09:37:50 +00:00
jand	2584fa6b59	at least 2.4	2005-10-06 20:08:06 +00:00
jand	b4b6415a34	0.4.1	2004-03-03 09:56:04 +00:00
jand	b4057b2ee7	toVerilog package	2004-02-04 17:13:07 +00:00
jand	0acccaa497	0.4	2004-01-07 21:36:05 +00:00
jand	7d68a65274	0.4	2004-01-07 21:28:04 +00:00
jand	7ce730cb30	adapted for register	2003-09-08 07:45:10 +00:00
jand	3464205194	new version	2003-09-08 07:15:41 +00:00
jand	66de4f10e9	prepare release	2003-07-31 10:21:48 +00:00
jand	f2bf4c33f3	added	2003-07-22 22:02:20 +00:00
jand	64b7252ec5	adapted MANIFEST.in for future release	2003-06-02 15:20:42 +00:00
jand	ecb8d1d0bb	license	2003-05-17 15:41:33 +00:00
jand	eec897efdc	started with 0.2	2003-04-01 19:44:13 +00:00
jand	b8d77aca7b	version check	2003-01-30 17:19:02 +00:00
jand	c2813f5d6e	Top-level test	2003-01-30 12:19:52 +00:00
jand	45b4e25be4	Put into a project	2003-01-23 23:21:31 +00:00