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Author SHA1 Message Date
Keerthan Jaic
f750688630 test_signal: rename setup, teardown for pytest 2015-06-24 16:14:50 -04:00
Keerthan Jaic
6da1f50b85 Create tmpfile fixture for tracesignals test 
This ensures that the generated VCDs don't  clutter the project tree,
and allows us to do parallel testing using pytest-xdist.
 2015-06-24 16:12:56 -04:00
Keerthan Jaic
4e13aa1daa Convert most core unittests to pytest 
These tests can be directly converted now since they don't use
setup/teardowns
 2015-06-24 15:58:15 -04:00
Keerthan Jaic
758e172f92 tox: install pytest-xdist, set pytest basetemp dir 2015-06-24 13:04:23 -04:00
Keerthan Jaic
8f70de0895 change core test assertions to pytest style 2015-06-24 13:04:07 -04:00
Keerthan Jaic
3adb53a046 test_cosim: use abspath in the exe 
This ensures that this test will run from anywhere instead of just
test/core.
tox now works for all core tests
 2015-06-24 11:20:10 -04:00
Keerthan Jaic
cdf2b1aa68 move perf_inferwaiter to benchmarks dir 2015-06-24 11:20:10 -04:00
jandecaluwe
254e458917 Merge pull request #87 from josyb/std_logic_ports-ShadowSignals 
std_logic_ports and ShadowSignals (revisited)
 2015-05-31 14:52:58 +02:00
jandecaluwe
47522facc3 Merge pull request #85 from cfelton/test_interfaces 
fixed convertible testbench issues
 2015-05-31 10:35:45 +02:00
Christopher Felton
5a2e113b07 fixed convertible testbench issues 2015-05-30 08:50:09 -05:00
Josy Boelen
06f1e208f4 added the (instructed) code to rename ShadowSignals of std_logic_ports 2015-05-30 10:58:09 +02:00
jandecaluwe
846f7ad444 Merge pull request #83 from cfelton/test_interfaces 
Added test for issue #82
 2015-05-28 19:40:53 +02:00
Christopher Felton
9c33b91292 removed unused import and change to convertible print format 2015-05-27 21:44:42 -05:00
Christopher Felton
39098a3193 added test for issue #82 2015-05-27 21:27:30 -05:00
Jan Decaluwe
06be75b9b4 Remove toVHDL.numeric_ports 2015-05-25 22:18:24 +02:00
jandecaluwe
dc1deff069 Merge pull request #80 from josyb/ConcatSignal-constant-intbv-width-of-1 
ConcatSignal
 2015-05-25 18:43:47 +02:00
Josy Boelen
e9b78d6647 removed _numeric check 2015-05-25 18:38:45 +02:00
Josy Boelen
84712ab7f2 ConcatSignal: added support for intbv with width of 1, added cast to unsigned if Signal is a port of type std_logic_vector 2015-05-25 15:37:12 +02:00
Jan Decaluwe
f4e1b996c9 Propose better solution for std_logic ports 2015-05-25 13:39:28 +02:00
Jan Decaluwe
d38a452ae6 Fix 'long' compatiblity 2015-05-23 22:48:02 +02:00
Jan Decaluwe
082847ee3a a test for the fix 2015-05-23 22:15:08 +02:00
Jan Decaluwe
ea48e0f049 Merge branch 'josyb-ConcatSignal_with_constants' 2015-05-23 22:13:47 +02:00
Josy Boelen
b7050d3b14 Update _ShadowSignal.py 
removed dangling ']' in toVerilog()
 2015-05-23 16:19:00 +02:00
Josy Boelen
9287256714 replaced call to buitl-in 'bin'function with call to 'bin function from _bin.py 2015-05-23 14:38:16 +02:00
Jan Decaluwe
33943723b8 Support for conversion of constants in ConcatSignal interface 2015-05-23 03:59:19 +02:00
Jan Decaluwe
fb9255bfa2 Added support for constants in ConcatSignal interface 2015-05-23 01:13:39 +02:00
jandecaluwe
9c605db9f1 Merge pull request #74 from josyb/TristateSignal-VHDL-conversion 
_toVHDL: Added correct tristate assignment for std_logic signal
 2015-05-23 00:12:59 +02:00
Josy Boelen
f9651328f6 _toVHDL: Added correct tristate assignment for std_logic signal 2015-05-19 17:38:37 +02:00
jandecaluwe
890202329c Merge pull request #71 from cfelton/test_always_seq 
Test always seq
 2015-05-06 08:39:52 +02:00
Christopher Felton
319175adf4 py.test is used as the test runner 2015-05-05 10:42:04 -05:00
Christopher Felton
0ddca7e29a moved test_always_seq.py to the core directory 2015-05-05 10:38:18 -05:00
jandecaluwe
b36217af8e Merge pull request #69 from Bystroushaak/patch-1 
Readability improvements in README.md.
 2015-05-04 22:12:33 +02:00
jandecaluwe
f366006aea Merge pull request #56 from iamsrinivas/iamsrinivas-patch-2 
test_always_seq.py
 2015-05-04 22:12:20 +02:00
Bystroushaak
d3762b947a Readability improvements in README.md. 
Also fixed link to whats new from version 0.8 to 0.9.
 2015-05-04 11:19:02 +02:00
jandecaluwe
6af8fa0b60 Merge pull request #66 from jck/cleanup 
How did you fix this one? Seems there were no new commits?
 2015-04-28 21:29:39 +02:00
Keerthan Jaic
115b9c8184 add .so to gitignore 2015-04-27 16:09:24 -04:00
Keerthan Jaic
0c30e0c830 remove olddoc 2015-04-27 16:09:24 -04:00
Keerthan Jaic
55df36f4bb Convert olddoc whatsnew to rst and move to doc 2015-04-27 16:09:24 -04:00
Keerthan Jaic
fcf450dcaa move ci.sh to scripts folder 2015-04-27 16:09:24 -04:00
Keerthan Jaic
905cc11298 move benchmarks to scripts folder 2015-04-27 16:09:24 -04:00
Keerthan Jaic
f8825dd92c added tox.ini, autobuild target for docs makefile 2015-04-27 16:09:23 -04:00
jandecaluwe
7c7bb58184 Merge pull request #64 from jck/attr-naming 
Rename attribute references in the AST before analysis
 2015-04-26 15:12:59 +02:00
jandecaluwe
f4706661bc Merge pull request #63 from jck/cosim-experiments 
Various cosimulation and testing improvements.
 2015-04-26 14:48:44 +02:00
Jan Decaluwe
decff56c3c Merge branch 'jck-property' 2015-04-26 13:47:18 +02:00
iamsrinivas
6fe06849a4 Update test_always_seq.py 
Fixed bugs
 2015-04-17 11:10:16 -05:00
Keerthan Jaic
08519b452f Rename attribute references in the AST before analysis 
fixes #33
 2015-04-15 23:24:57 -04:00
Keerthan Jaic
88cb76b5c3 mark test_Cosimulation as expected failure on pypy 2015-04-14 14:24:49 -04:00
Keerthan Jaic
e40e301764 make test_cosimulation py3 compatible 2015-04-14 12:49:36 -04:00
Keerthan Jaic
3e4a2119d9 travis: move bugs to icarus, ghdl targets 2015-04-14 12:11:43 -04:00
Keerthan Jaic
9a7d8796b3 remove test of non existant unparse 2015-04-14 12:11:43 -04:00