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mirror of https://github.com/myhdl/myhdl.git synced 2025-01-24 21:52:56 +08:00

1471 Commits

Author SHA1 Message Date
Oscar Diaz
538043b6c7 add support for "func" and "argdict" members to _Instance object
"func": reference to called function
"argdict" : all other arguments and values not in sigdict or memdict
2013-04-15 22:08:00 +02:00
Jan Decaluwe
f968ce0ba1 Added missing operator import
--HG--
branch : 0.8-dev
2013-04-14 17:47:49 +02:00
Jan Decaluwe
b120807ffb Support for dedicated use clauses in VHDL output
--HG--
branch : 0.8-dev
2013-04-14 17:33:05 +02:00
Jan Decaluwe
4ce3a37368 Experimental support for inferring symbolic constants for readibility
VHDL only for now

--HG--
branch : 0.8-dev
2013-04-11 22:20:37 +02:00
Jan Decaluwe
15dd688663 Experimental support to infer a package only when really necessary
--HG--
branch : 0.8-dev
2013-04-10 22:16:46 +02:00
Jan Decaluwe
8b57fe9a2f experimental support for optional non-numeric ports (std_logic_vector)
--HG--
branch : 0.8-dev
2013-04-10 21:30:42 +02:00
Jan Decaluwe
b08ddffbaf Merged from 0.7
--HG--
branch : 0.8-dev
2013-04-10 14:33:28 +02:00
Jan Decaluwe
6e3df2c439 Solved bug 28 2013-04-10 14:30:45 +02:00
Jan Decaluwe
7db84e321b Merge doc update
--HG--
branch : 0.8-dev
2013-04-10 14:04:06 +02:00
Jan Decaluwe
241a499960 Added first test for nonlocal
--HG--
branch : 0.8-dev
2013-04-10 13:55:24 +02:00
Christopher Felton
fd025a806a changed delay to delay_taps in docs
--HG--
branch : 0.8-dev
2013-04-10 05:59:13 -05:00
Jan Decaluwe
d371e1e075 Merged in Chris' doc updates
--HG--
branch : 0.8-dev
2013-04-10 10:29:09 +02:00
Jan Decaluwe
071eea0566 Experimental support for nonlocal intbv's
--HG--
branch : 0.8-dev
2013-04-10 10:27:27 +02:00
Christopher Felton
1a9e8e0603 updated the whatsnew0.8 documentation
--HG--
branch : 0.8-dev
2013-04-09 21:42:10 -05:00
Jan Decaluwe
bc1a676420 Corrected ResetSignal type check error message
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branch : 0.8-dev
2013-04-08 18:32:57 +02:00
Jan Decaluwe
7e2fdba7bc doc for other improvements
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branch : 0.8-dev
2013-03-10 22:25:20 +01:00
Jan Decaluwe
f04d53a0fa small corrections
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branch : 0.8-dev
2013-03-10 21:33:26 +01:00
Jan Decaluwe
74292f1bd8 @always_seq documentation
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branch : 0.8-dev
2013-03-10 18:11:08 +01:00
Jan Decaluwe
c9f850508c Factored out hardware-oriented types in separate chapter
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branch : 0.8-dev
2013-03-10 16:35:24 +01:00
Jan Decaluwe
e3879ef878 whatsnew for 0.8 doc, modbv description
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branch : 0.8-dev
2013-03-10 15:48:59 +01:00
Jan Decaluwe
b23d787b63 Solved bug 39 (mixed sized operands)
--HG--
branch : 0.8-dev
2013-02-24 21:31:12 +01:00
Jan Decaluwe
e3a07b3969 Solved bug 3553444
--HG--
branch : 0.8-dev
2013-02-17 17:06:47 +01:00
Jan Decaluwe
471cc57193 Fixed bug 3577799
--HG--
branch : 0.8-dev
2013-02-17 16:44:43 +01:00
Jan Decaluwe
72c3200b62 Small improvement to type inference
--HG--
branch : 0.8-dev
2013-02-17 15:58:57 +01:00
Jan Decaluwe
8e2966d719 Make sure strings are interpreted as unsigned literals in concat
--HG--
branch : 0.8-dev
2013-01-13 21:47:09 +01:00
Jan Decaluwe
e51da60524 add @always_seq and modbv to conversion examples
--HG--
branch : 0.8-dev
2012-12-21 17:08:50 +01:00
Jan Decaluwe
45a769d82d use modbv
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branch : 0.8-dev
2012-12-21 15:06:18 +01:00
Jan Decaluwe
bc9ca05f5d run with 0.8
--HG--
branch : 0.8-dev
2012-12-21 14:36:07 +01:00
Jan Decaluwe
be79683f63 modbv reference info, refactored data types and function sections
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branch : 0.8-dev
2012-12-21 12:57:41 +01:00
Jan Decaluwe
f97a43e72f reference info for @always_seq
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branch : 0.8-dev
2012-12-21 12:34:31 +01:00
Jan Decaluwe
30795da796 reference info for ResetSignal
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branch : 0.8-dev
2012-12-21 12:29:34 +01:00
Jan Decaluwe
1bf2501665 migrate to sphinx 1.1.3
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branch : 0.8-dev
2012-12-19 18:22:20 +01:00
Jan Decaluwe
ff2f86dab9 Solved bug with modbv initialization - should be like intbv
--HG--
branch : 0.8-dev
2012-09-05 16:07:13 +02:00
Jan Decaluwe
1006dbe564 Major refactoring of type inference for toVerilog
Put the code in _toVerilog instead of _analyze

--HG--
branch : 0.8-dev
2012-08-28 17:23:17 +02:00
Jan Decaluwe
951d0d53ae Solved bug in always_seq conversion to Verilog
--HG--
branch : 0.8-dev
2012-08-28 10:59:51 +02:00
Jan Decaluwe
64b9f4d359 Solved bug with boolop, added test case in bugs
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branch : 0.8-dev
2012-08-28 10:32:41 +02:00
Jan Decaluwe
636bc815c6 Solved a number of issues: large integer representaion, version number handling
--HG--
branch : 0.8-dev
2012-08-16 14:11:03 +02:00
Jan Decaluwe
5a6351f370 Made VHDL architecture parameterizable with toVHDL.architecture
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branch : 0.8-dev
2012-08-08 16:49:36 +02:00
Jan Decaluwe
c75e762158 use shortened version name for package
--HG--
branch : 0.8-dev
2012-07-19 13:33:04 +02:00
Jan Decaluwe
f29f8f1fe1 Support for top-level bound methods, starting from existing
code for the top-level visitor in _analyze.py

--HG--
branch : 0.8-dev
2012-07-16 13:40:08 +02:00
Jan Decaluwe
59744e5901 added top-level method test
--HG--
branch : 0.8-dev
2012-07-16 13:18:01 +02:00
Jan Decaluwe
3735d5f0f4 Create a failing test on bound methods by explicit checks
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branch : 0.8-dev
2012-07-16 11:55:34 +02:00
Jan Decaluwe
b94cb790d5 solved issue with negative number representation
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branch : 0.8-dev
2012-07-07 22:33:49 +02:00
Jan Decaluwe
35c6bb3190 Solved random bug due VHDL's 32 bit integer limit
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branch : 0.8-dev
2012-07-07 21:18:08 +02:00
Jan Decaluwe
f83ef51ff7 No defaults in ResetSignal args
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branch : 0.8-dev
2012-07-07 20:22:40 +02:00
Jan Decaluwe
29e7136a6d Write MyHDL package always during development, it may change
--HG--
branch : 0.8-dev
2012-07-05 13:08:31 +02:00
Jan Decaluwe
74f98fee99 Shorter boolean cast functions for cleaner VHDL code
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branch : 0.8-dev
2012-07-05 10:25:35 +02:00
Jan Decaluwe
af0d4a32a9 cleaner 'not' on std_logic
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branch : 0.8-dev
2012-07-04 23:36:15 +02:00
Jan Decaluwe
64b125a8cf Support for toVHDL.library
--HG--
branch : 0.8-dev
2012-07-04 14:02:02 +02:00
Jan Decaluwe
5352e7971d always_seq support for Verilog conversion
--HG--
branch : 0.8-dev
2012-07-02 22:34:08 +02:00