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21 lines
211 B
Verilog
21 lines
211 B
Verilog
module tb_inc_comb;
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wire [7:0] nextCount;
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reg [7:0] count;
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initial begin
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$from_myhdl(
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count
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);
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$to_myhdl(
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nextCount
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);
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end
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inc_comb dut(
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nextCount,
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count
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);
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endmodule
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