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https://github.com/myhdl/myhdl.git
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32c8b7f3e8
- Use myhdl_vpi.so from parent directory - Automatically delete and create work library - Add test target to main makefile
36 lines
798 B
Makefile
36 lines
798 B
Makefile
# could add to CFLAGS to turn on warnings if you are using gcc
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WARNS=-Wall
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# change this path to point to the pli include files directory for cver
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INCS=-I $(shell dirname `which vsim`)/../include
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# maybe want -O<something> and/or -g
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# 32bit for Altera ASE/PE on Ubuntu Natty Narwhal
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CFLAGS= -fPIC -Wall -g -m32 $(INCS) -fno-stack-protector
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LFLAGS= -G -shared -export-dynamic -melf_i386
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# 64bit for SE
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#CFLAGS= -fPIC -Wall -c -g $(INCS)
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#LFLAGS= -shared -E
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# change to your compiler
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CC=gcc
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all: myhdl_vpi.so
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myhdl_vpi.o: myhdl_vpi.c
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$(CC) $(CFLAGS) -c myhdl_vpi.c
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# make rules for dynamic libaries
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myhdl_vpi.so: myhdl_vpi.o
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$(LD) $(LFLAGS) myhdl_vpi.o -o myhdl_vpi.so
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clean:
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-rm *.o *.so
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.PHONY: test
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test: myhdl_vpi.so
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rm -rf test/work
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cd test && vlib work && python test_all.py
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