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32c8b7f3e8
- Use myhdl_vpi.so from parent directory - Automatically delete and create work library - Add test target to main makefile
13 lines
359 B
Python
13 lines
359 B
Python
import os
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from myhdl import Cosimulation
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cmd = 'vsim -c -quiet -pli ../myhdl_vpi.so -do cosim.do dut_inc'
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def inc(count, enable, clock, reset, n):
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os.system('vlog -quiet +define+n=%s ../../test/verilog/inc.v' % (n))
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os.system('vlog -quiet +define+n=%s ../../test/verilog/dut_inc.v' % (n))
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return Cosimulation(cmd, **locals())
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