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https://github.com/myhdl/myhdl.git
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66 lines
1.4 KiB
Python
66 lines
1.4 KiB
Python
from __future__ import generators
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from random import randrange
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from myhdl import Signal, Simulation, StopSimulation
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from myhdl import intbv, delay, posedge, negedge, now
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ACTIVE_LOW, INACTIVE_HIGH = 0, 1
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def Inc(count, enable, clock, reset, n):
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""" Incrementer with enable.
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count -- output
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enable -- control input, increment when 1
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clock -- clock input
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reset -- asynchronous reset input
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n -- counter max value
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"""
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while 1:
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yield posedge(clock), negedge(reset)
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if reset == ACTIVE_LOW:
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count.next = 0
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else:
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if enable:
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count.next = (count + 1) % n
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count, enable, clock, reset = [Signal(intbv(0)) for i in range(4)]
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INC_1 = Inc(count, enable, clock, reset, n=4)
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def clockGen():
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while 1:
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yield delay(10)
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clock.next = not clock
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def stimulus():
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reset.next = ACTIVE_LOW
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yield negedge(clock)
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reset.next = INACTIVE_HIGH
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for i in range(12):
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enable.next = min(1, randrange(3))
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yield negedge(clock)
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raise StopSimulation
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def monitor():
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print "enable count"
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yield posedge(reset)
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while 1:
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yield posedge(clock)
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yield delay(1)
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print " %s %s" % (enable, count)
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if __name__ == "__main__":
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Simulation(clockGen(), stimulus(), INC_1, monitor(), INC_1).run()
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