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45a769d82d
--HG-- branch : 0.8-dev
33 lines
455 B
VHDL
33 lines
455 B
VHDL
-- File: inc_comb.vhd
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-- Generated by MyHDL 0.8dev
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-- Date: Fri Dec 21 15:02:39 2012
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library IEEE;
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use IEEE.std_logic_1164.all;
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use IEEE.numeric_std.all;
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use std.textio.all;
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use work.pck_myhdl_08.all;
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entity inc_comb is
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port (
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nextCount: out unsigned(7 downto 0);
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count: in unsigned(7 downto 0)
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);
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end entity inc_comb;
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architecture MyHDL of inc_comb is
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begin
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nextCount <= (count + 1) mod 256;
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end architecture MyHDL;
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