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29 lines
440 B
Systemverilog
29 lines
440 B
Systemverilog
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module oh_pmos #(parameter MODEL = "pmos",
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parameter W = "0",
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parameter L = "0",
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parameter M = "0",
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parameter NF = "0"
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)
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(
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input bulk,
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input g,
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input s,
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inout d
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);
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//out,in,ctrlr
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pmos p (d,s,g);
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// Debug information
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`ifdef OH_DEBUG
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initial
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begin
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$display("inst=%m model=%s w=%0d l=%0d m=%0d nf=%0d",
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MODEL,W,L,M,NF);
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end
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`endif
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endmodule
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