diff --git a/src/common/hdl/oh_buffer.v b/src/common/hdl/oh_buffer.v
index 6676e66..ada08f5 100644
--- a/src/common/hdl/oh_buffer.v
+++ b/src/common/hdl/oh_buffer.v
@@ -11,6 +11,9 @@ module oh_buffer #(parameter N    = 1,  // number of inputs
      output [N-1:0] out // output
     );
 
+`ifndef CFG_ASIC
+ `define CFG_ASIC 0
+`endif
    localparam ASIC = `CFG_ASIC;
 
    generate
diff --git a/src/common/hdl/oh_clockgate.v b/src/common/hdl/oh_clockgate.v
index da41d40..d91e789 100644
--- a/src/common/hdl/oh_clockgate.v
+++ b/src/common/hdl/oh_clockgate.v
@@ -12,6 +12,9 @@ module oh_clockgate (
      output eclk // enabled clock output
      );
 
+`ifndef CFG_ASIC
+ `define CFG_ASIC 0
+`endif
    localparam ASIC = `CFG_ASIC;  // use ASIC lib
 
    generate
diff --git a/src/common/hdl/oh_clockmux.v b/src/common/hdl/oh_clockmux.v
index 10ca1b3..d36228f 100644
--- a/src/common/hdl/oh_clockmux.v
+++ b/src/common/hdl/oh_clockmux.v
@@ -12,6 +12,9 @@ module oh_clockmux #(parameter N    = 1)    // number of clock inputs
     output 	  clkout 
     );
 
+`ifndef CFG_ASIC
+ `define CFG_ASIC 0
+`endif
     localparam ASIC = `CFG_ASIC;
 
     generate
diff --git a/src/common/hdl/oh_clockor.v b/src/common/hdl/oh_clockor.v
index e0975bb..f56b19e 100644
--- a/src/common/hdl/oh_clockor.v
+++ b/src/common/hdl/oh_clockor.v
@@ -11,6 +11,9 @@ module oh_clockor #(parameter N    = 1)    // number of clock inputs
     output 	  clkout 
     );
 
+`ifndef CFG_ASIC
+ `define CFG_ASIC 0
+`endif
    localparam ASIC = `CFG_ASIC;
 
    generate
diff --git a/src/common/hdl/oh_csa32.v b/src/common/hdl/oh_csa32.v
index 3195e0b..1720e9e 100644
--- a/src/common/hdl/oh_csa32.v
+++ b/src/common/hdl/oh_csa32.v
@@ -14,6 +14,9 @@ module oh_csa32 #(parameter DW   = 1 // data width
      output [DW-1:0] c   //carry
      );
 
+`ifndef CFG_ASIC
+ `define CFG_ASIC 0
+`endif
    localparam ASIC = `CFG_ASIC;  // use asic library
 
    generate
diff --git a/src/common/hdl/oh_csa42.v b/src/common/hdl/oh_csa42.v
index c7a3047..1cfeefe 100644
--- a/src/common/hdl/oh_csa42.v
+++ b/src/common/hdl/oh_csa42.v
@@ -17,6 +17,9 @@ module oh_csa42 #( parameter DW    = 1 // data width
      output [DW-1:0] cout  //carry out
      );
 
+`ifndef CFG_ASIC
+ `define CFG_ASIC 0
+`endif
    localparam ASIC = `CFG_ASIC;  // use asic library
 
    generate
diff --git a/src/common/hdl/oh_delay.v b/src/common/hdl/oh_delay.v
index 2e20744..7865014 100644
--- a/src/common/hdl/oh_delay.v
+++ b/src/common/hdl/oh_delay.v
@@ -13,6 +13,9 @@ module oh_delay  #(parameter DW   = 1, // width of data
     output [DW-1:0] out // output
     );
 
+`ifndef CFG_ASIC
+ `define CFG_ASIC 0
+`endif
    localparam ASIC = `CFG_ASIC;  // use asic library
    
    generate
diff --git a/src/common/hdl/oh_dsync.v b/src/common/hdl/oh_dsync.v
index cc61051..9985b0b 100644
--- a/src/common/hdl/oh_dsync.v
+++ b/src/common/hdl/oh_dsync.v
@@ -15,6 +15,9 @@ module oh_dsync  #(parameter PS    = 2,        // number of sync stages
     output dout    // synchronized data
     );
    
+`ifndef CFG_ASIC
+ `define CFG_ASIC 0
+`endif
    localparam ASIC = `CFG_ASIC;  // use asic library
 
    generate
diff --git a/src/common/hdl/oh_lat0.v b/src/common/hdl/oh_lat0.v
index 000f781..f2a24cc 100644
--- a/src/common/hdl/oh_lat0.v
+++ b/src/common/hdl/oh_lat0.v
@@ -12,6 +12,9 @@ module oh_lat0 #(parameter DW = 1            // data width
      output [DW-1:0] out  // output data (stable/latched when clk=1)
      );
 
+`ifndef CFG_ASIC
+ `define CFG_ASIC 0
+`endif
    localparam ASIC = `CFG_ASIC;  // use ASIC lib
    
    generate
diff --git a/src/common/hdl/oh_lat1.v b/src/common/hdl/oh_lat1.v
index 170939b..291a578 100644
--- a/src/common/hdl/oh_lat1.v
+++ b/src/common/hdl/oh_lat1.v
@@ -12,6 +12,9 @@ module oh_lat1 #(parameter DW    = 1         //data width
      output [DW-1:0] out  // output data (stable/latched when clk=0)
      );
 
+`ifndef CFG_ASIC
+ `define CFG_ASIC 0
+`endif
    localparam ASIC = `CFG_ASIC;  // use ASIC lib
 
    generate
diff --git a/src/common/hdl/oh_memory_dp.v b/src/common/hdl/oh_memory_dp.v
index 6d1b1f9..9818436 100644
--- a/src/common/hdl/oh_memory_dp.v
+++ b/src/common/hdl/oh_memory_dp.v
@@ -33,6 +33,9 @@ module oh_memory_dp # (parameter DW    = 104,      //memory width
     input [DW-1:0]  bist_din  // data input
     );
 
+`ifndef CFG_ASIC
+ `define CFG_ASIC 0
+`endif
    localparam ASIC = `CFG_ASIC;  // use asic library
    
    generate
diff --git a/src/common/hdl/oh_memory_sp.v b/src/common/hdl/oh_memory_sp.v
index 3be4e8f..2a443ef 100644
--- a/src/common/hdl/oh_memory_sp.v
+++ b/src/common/hdl/oh_memory_sp.v
@@ -33,6 +33,9 @@ module oh_memory_sp  # (parameter DW    = 104,          // memory width
     input [DW-1:0]  bist_din  // data input
     );
 
+`ifndef CFG_ASIC
+ `define CFG_ASIC 0
+`endif
    localparam ASIC = `CFG_ASIC;  // use ASIC lib
 
    generate
diff --git a/src/common/hdl/oh_pwr_gate.v b/src/common/hdl/oh_pwr_gate.v
index bc1d485..2847c99 100644
--- a/src/common/hdl/oh_pwr_gate.v
+++ b/src/common/hdl/oh_pwr_gate.v
@@ -11,6 +11,9 @@ module oh_pwr_gate (
     output vddg     // gated output supply
     );
 
+`ifndef CFG_ASIC
+ `define CFG_ASIC 0
+`endif
    localparam ASIC = `CFG_ASIC;  // use asic library
 
 `ifdef TARGET_SIM
diff --git a/src/common/hdl/oh_pwr_isohi.v b/src/common/hdl/oh_pwr_isohi.v
index 83b7ef9..1631f9a 100644
--- a/src/common/hdl/oh_pwr_isohi.v
+++ b/src/common/hdl/oh_pwr_isohi.v
@@ -13,6 +13,9 @@ module oh_pwr_isohi #(parameter DW   = 1        // width of data inputs
     output [DW-1:0] out // out = iso | in
     );
 
+`ifndef CFG_ASIC
+ `define CFG_ASIC 0
+`endif
    localparam ASIC = `CFG_ASIC;  // use ASIC lib
 
    generate
diff --git a/src/common/hdl/oh_pwr_isolo.v b/src/common/hdl/oh_pwr_isolo.v
index 1474c13..8e28b6c 100644
--- a/src/common/hdl/oh_pwr_isolo.v
+++ b/src/common/hdl/oh_pwr_isolo.v
@@ -13,6 +13,9 @@ module oh_pwr_isolo #(parameter DW   = 1        // width of data inputs
     output [DW-1:0] out  // out = ~iso & in
     );
 
+`ifndef CFG_ASIC
+ `define CFG_ASIC 0
+`endif
    localparam ASIC = `CFG_ASIC;  // use ASIC lib
    
    generate
diff --git a/src/common/hdl/oh_reg0.v b/src/common/hdl/oh_reg0.v
index 636d99f..f5f6e0d 100644
--- a/src/common/hdl/oh_reg0.v
+++ b/src/common/hdl/oh_reg0.v
@@ -13,6 +13,9 @@ module ohr_reg0 #(parameter DW = 1            // data width
      output [DW-1:0] out  // output data (stable/latched when clk=1)
      );
 
+`ifndef CFG_ASIC
+ `define CFG_ASIC 0
+`endif
    localparam ASIC = `CFG_ASIC;  // use ASIC lib
 
    generate
diff --git a/src/common/hdl/oh_reg1.v b/src/common/hdl/oh_reg1.v
index 34edb7c..100e1b5 100644
--- a/src/common/hdl/oh_reg1.v
+++ b/src/common/hdl/oh_reg1.v
@@ -13,6 +13,9 @@ module oh_reg1 #(parameter DW = 1            // data width
      output [DW-1:0] out  // output data (stable/latched when clk=1)
      );
 
+`ifndef CFG_ASIC
+ `define CFG_ASIC 0
+`endif
    localparam ASIC = `CFG_ASIC;
    
    generate
diff --git a/src/common/hdl/oh_rsync.v b/src/common/hdl/oh_rsync.v
index 06c0a8b..6175e19 100644
--- a/src/common/hdl/oh_rsync.v
+++ b/src/common/hdl/oh_rsync.v
@@ -13,6 +13,9 @@ module oh_rsync #(parameter PS = 2          // number of sync stages
     output nrst_out
     );
 
+`ifndef CFG_ASIC
+ `define CFG_ASIC 0
+`endif
    localparam ASIC = `CFG_ASIC;  // use ASIC lib
 
    generate