From 144f452cbaccb9f9db80bfa8ec05964a8ba8430d Mon Sep 17 00:00:00 2001
From: Andreas Olofsson <andreas@adapteva.com>
Date: Tue, 16 Feb 2016 11:41:50 -0500
Subject: [PATCH] Moving help to top README

---
 chip/README.md | 65 +++++++++++++++++++++++++++++++++++++++++++++++---
 1 file changed, 62 insertions(+), 3 deletions(-)

diff --git a/chip/README.md b/chip/README.md
index 226e6d1..9c34cd5 100644
--- a/chip/README.md
+++ b/chip/README.md
@@ -19,8 +19,9 @@ The structure is designed to simplify implementation scripts and maximize portab
 |----------------------------|-----------------------------------------------|
 | docs                       | open source documents and design guidelines   |
 | synthesis                  | open source synthesis scripts                 |
-| pnr                        | open source place&route scripts               |
+| pnr                        | open source place & route scripts             |
 | signoff                    | open source signoff scripts                   |
+| eda                        | eda proprietary scripts                       |
 | foundry ("foundry1")       | tsmc, gf, tower, smic, umc, etc               |
 |   process ("process1")     | 28slp, 65g, etc                               |
 |   IP types("ip1")          | pdk, stdlib, io, sram, serdes, etc            |
@@ -34,7 +35,65 @@ Description of contents inside each folder can be found in the local README.md f
 
 To visualize the directory structure, use the 'tree' utility. 
 
-## CONTRIBUTION NEEDED
-Non-disclosure agreements prevent populating the directory with exact script and process details. If you have access to an open process, then please do subnmit a PR with a populated technology tree
+## Required Shell Variables
 
+| SHELL VARIABLE   | DESCRIPTION                            |
+|------------------|----------------------------------------|
+| $PROCESS_HOME    | Path to foundry process                |
+| $OH_HOME         | Path to OH repo home                   |
+| $EDA_HOME        | Path to private repo or "$OH_HOME/eda" |
+
+## Required TCL Variables ("Designer API")
+
+| TCL VARIABLE     | DESCRIPTION                         |
+|------------------|-------------------------------------|
+| $OH_VENDOR       | synopsys, cadence, etc              |
+| $OH_TOOL         | dc, rc, etc                         |
+| $OH_DESIGN       | Name of top level module            |
+| $OH_FILES        | Design files "-f commands"          |
+| $OH_LIBS         | Synthesis libraries (ex: my_svtlib) |
+| $OH_MACROS       | Hard macros in design (ex: my_sram) |
+| $OH_FLOORPLAN    | Floorplanning file (tcl)            |
+| $OH_CONSTRAINTS  | Timing constraints file             |
+
+## Example Design
+
+```tcl
+set OH_VENDOR     "synopsys"
+
+set OH_TOOl       "dc"
+
+set OH_DESIGN     "ecore"
+
+set OH_LIBS       ""
+
+set OH_MACROS     ""
+
+set OH_FILES      "../../../hdl/$OH_DESIGN.v             \
+                   -y $env(OH_HOME)/emesh/hdl            \
+                   -y $env(OH_HOME)/common/hdl           \
+                   -y $env(EPIPHANY_HOME)/chip/hdl       \
+                   -y $env(EPIPHANY_HOME)/ecore/hdl      \
+                   -y $env(EPIPHANY_HOME)/emesh/hdl      \
+                   -y $env(EPIPHANY_HOME)/edma/hdl       \
+                   -y $env(EPIPHANY_HOME)/compute/hdl    \
+                   -y $env(EPIPHANY_HOME)/memory/hdl     \
+                   -y $env(EPIPHANY_HOME)/fpumm/hdl      \
+                   +incdir+$env(EPIPHANY_HOME)/emesh/hdl \
+                   +incdir+$env(EPIPHANY_HOME)/ecore/hdl \
+                   +incdir+$env(EPIPHANY_HOME)/edma/hdl"
+
+set OH_CONSTRAINTS       ${OH_DESIGN}.sdc
+
+set OH_FLOORPLAN         ${OH_DESIGN}_floorplan.tcl
+
+```
+
+## Usage Example ("synthesis step")
+
+```
+>> cd 
+>> dc_shell -topographical_mode
+dc_shell> source $OH_HOME/synthesis/example.tcl
+```