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Merge branch 'master' of github.com:parallella/oh
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@ -92,18 +92,19 @@ Nets correspond to physical wires that connect instances. The default range of a
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**Net types**
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**Net types**
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|--------|-------|
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| TYPE | NOTES |
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| wire | |
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|--------|---------|
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| tri | |
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| wire | |
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| wand | |
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| tri | |
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| triand | |
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| wand | |
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| wor | |
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| triand | |
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| trior | |
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| wor | |
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| tri0 | |
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| trior | |
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| tri1 | |
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| tri0 | |
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| supply0| |
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| tri1 | |
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| supply1| |
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| supply0| |
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| trireg | |
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| supply1| |
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| trireg | |
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For a wire, if all the drivers have the same value then the wire resolves to this value. If all the drivers except one have a value of z then the wire resolves to the non z value. If two or more non z drivers have different drive strength, then the wire resolves to the stronger driver. If two drivers of equal strength have different values, then the wire resolves to x. A trireg net behaves like a wire except that when all the drivers of the net are in high impedance (z) state, then the net retains its last driven value. trireg ’s are used to model capacitive networks.
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For a wire, if all the drivers have the same value then the wire resolves to this value. If all the drivers except one have a value of z then the wire resolves to the non z value. If two or more non z drivers have different drive strength, then the wire resolves to the stronger driver. If two drivers of equal strength have different values, then the wire resolves to x. A trireg net behaves like a wire except that when all the drivers of the net are in high impedance (z) state, then the net retains its last driven value. trireg ’s are used to model capacitive networks.
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@ -156,6 +157,7 @@ If ‘‘SYNTH’’ is a defined macro, then the Verilog code until ‘endif is
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The code in <Verilog file> is inserted for the next processing phase. Other standard compiler directives are listed below:
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The code in <Verilog file> is inserted for the next processing phase. Other standard compiler directives are listed below:
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| DIRECTIVE | NOTES |
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|-----------------------------|------------------------------------------|
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|-----------------------------|------------------------------------------|
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| ‘resetall | resets all compiler directives to default|
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| ‘resetall | resets all compiler directives to default|
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| ‘define | text-macro substitution |
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| ‘define | text-macro substitution |
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@ -182,26 +184,27 @@ System taska are tool specific tasks and functions..
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```
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```
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A list of standard system tasks and functions are listed below:
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A list of standard system tasks and functions are listed below:
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| COMMAND | NOTES |
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| $display, $write | utility to display information
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|-------------------------|---------------------------------------------|
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| $fdisplay, $fwrite | write to file
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| $display, $write | utility to display information |
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| $strobe, $fstrobe | display/write simulation data
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| $fdisplay, $fwrite | write to file |
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| $monitor, $fmonitor | monitor, display/write information to file
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| $strobe, $fstrobe | display/write simulation data |
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| $time, $realtime | current simulation time
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| $monitor, $fmonitor | monitor, display/write information to file |
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| $finish | exit the simulator
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| $time, $realtime | current simulation time |
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| $stop | stop the simulator
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| $finish | exit the simulator |
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| $setup | setup timing check
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| $stop | stop the simulator |
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| $hold, $width | hold/width timing check
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| $setup | setup timing check |
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| $setuphold | combines hold and setup
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| $hold, $width | hold/width timing check |
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| $readmemb/$readmemh | read stimulus patterns into memory
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| $setuphold | combines hold and setup |
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| $sreadmemb/$sreadmemh | load data into memory
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| $readmemb/$readmemh | read stimulus patterns into memory |
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| $getpattern | fast processing of stimulus patterns
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| $sreadmemb/$sreadmemh | load data into memory |
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| $history | print command history
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| $getpattern | fast processing of stimulus patterns |
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| $save,$restart,$incsave | saving, restarting, incremental saving
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| $history | print command history |
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| $scale | scaling timeunits from another module
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| $save,$restart,$incsave | saving, restarting, incremental saving |
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| $scope | descend to a particular hierarchy level
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| $scale | scaling timeunits from another module |
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| $showscopes | complete list of named blocks, tasks, modules...
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| $scope | descend to a particular hierarchy level |
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| $showvars | show variables at scope
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| $showscopes | list of named blocks, tasks, modules |
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| $showvars | show variables at scope |
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## 5.0 Reserved Keywords
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## 5.0 Reserved Keywords
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