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mirror of https://github.com/aolofsson/oh.git synced 2025-01-30 02:32:53 +08:00

Merge branch 'master' of github.com:parallella/oh

This commit is contained in:
Andreas Olofsson 2016-02-15 16:39:01 -05:00
commit 158edee578

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@ -92,18 +92,19 @@ Nets correspond to physical wires that connect instances. The default range of a
**Net types** **Net types**
|--------|-------| | TYPE | NOTES |
| wire | | |--------|---------|
| tri | | | wire | |
| wand | | | tri | |
| triand | | | wand | |
| wor | | | triand | |
| trior | | | wor | |
| tri0 | | | trior | |
| tri1 | | | tri0 | |
| supply0| | | tri1 | |
| supply1| | | supply0| |
| trireg | | | supply1| |
| trireg | |
For a wire, if all the drivers have the same value then the wire resolves to this value. If all the drivers except one have a value of z then the wire resolves to the non z value. If two or more non z drivers have different drive strength, then the wire resolves to the stronger driver. If two drivers of equal strength have different values, then the wire resolves to x. A trireg net behaves like a wire except that when all the drivers of the net are in high impedance (z) state, then the net retains its last driven value. trireg s are used to model capacitive networks. For a wire, if all the drivers have the same value then the wire resolves to this value. If all the drivers except one have a value of z then the wire resolves to the non z value. If two or more non z drivers have different drive strength, then the wire resolves to the stronger driver. If two drivers of equal strength have different values, then the wire resolves to x. A trireg net behaves like a wire except that when all the drivers of the net are in high impedance (z) state, then the net retains its last driven value. trireg s are used to model capacitive networks.
@ -156,6 +157,7 @@ If SYNTH is a defined macro, then the Verilog code until endif is
The code in <Verilog file> is inserted for the next processing phase. Other standard compiler directives are listed below: The code in <Verilog file> is inserted for the next processing phase. Other standard compiler directives are listed below:
| DIRECTIVE | NOTES |
|-----------------------------|------------------------------------------| |-----------------------------|------------------------------------------|
| resetall | resets all compiler directives to default| | resetall | resets all compiler directives to default|
| define | text-macro substitution | | define | text-macro substitution |
@ -182,26 +184,27 @@ System taska are tool specific tasks and functions..
``` ```
A list of standard system tasks and functions are listed below: A list of standard system tasks and functions are listed below:
| COMMAND | NOTES |
| $display, $write | utility to display information |-------------------------|---------------------------------------------|
| $fdisplay, $fwrite | write to file | $display, $write | utility to display information |
| $strobe, $fstrobe | display/write simulation data | $fdisplay, $fwrite | write to file |
| $monitor, $fmonitor | monitor, display/write information to file | $strobe, $fstrobe | display/write simulation data |
| $time, $realtime | current simulation time | $monitor, $fmonitor | monitor, display/write information to file |
| $finish | exit the simulator | $time, $realtime | current simulation time |
| $stop | stop the simulator | $finish | exit the simulator |
| $setup | setup timing check | $stop | stop the simulator |
| $hold, $width | hold/width timing check | $setup | setup timing check |
| $setuphold | combines hold and setup | $hold, $width | hold/width timing check |
| $readmemb/$readmemh | read stimulus patterns into memory | $setuphold | combines hold and setup |
| $sreadmemb/$sreadmemh | load data into memory | $readmemb/$readmemh | read stimulus patterns into memory |
| $getpattern | fast processing of stimulus patterns | $sreadmemb/$sreadmemh | load data into memory |
| $history | print command history | $getpattern | fast processing of stimulus patterns |
| $save,$restart,$incsave | saving, restarting, incremental saving | $history | print command history |
| $scale | scaling timeunits from another module | $save,$restart,$incsave | saving, restarting, incremental saving |
| $scope | descend to a particular hierarchy level | $scale | scaling timeunits from another module |
| $showscopes | complete list of named blocks, tasks, modules... | $scope | descend to a particular hierarchy level |
| $showvars | show variables at scope | $showscopes | list of named blocks, tasks, modules |
| $showvars | show variables at scope |
## 5.0 Reserved Keywords ## 5.0 Reserved Keywords