From 1d540e7b499c481d605ec9a8685b0339f5879ebe Mon Sep 17 00:00:00 2001 From: Andreas Olofsson Date: Sun, 10 Jan 2016 17:06:08 -0500 Subject: [PATCH] Adding comments to table --- common/README.md | 81 ++++++++++++++++++------------------------------ 1 file changed, 31 insertions(+), 50 deletions(-) diff --git a/common/README.md b/common/README.md index b3306cc..79d5b4e 100644 --- a/common/README.md +++ b/common/README.md @@ -1,54 +1,35 @@ - | Name | Done | Function | - |-----------------|------|-------------------------------------| - | oh_rsync | Y | | - | oh_dsync | Y | | - | oh_muxN | Y | | - | oh_edgealign | Y | | - | oh_pulse2pulse | Y | | - | oh_stretcher | Y | | - | oh_clockdiv | Y | | - | oh_arbiter | Y | | - | oh_fifo_sync | Y | | - | oh_fifo_async | Y | | - | oh_memory_sp | Y | | - | oh_memory_dp | Y | | - | oh_add | Y | | - | oh_muxN | Y | | - | oh_standby | Y | | - | oh_clockgate | Y | | - | oh_datagate | Y | | - | oh_lat0 | Y | | - | oh_lat1 | Y | | - | oh_fifo_cdc | Y | | - | oh_add | Y | | - | oh_csa32 | Y | | - | oh_csa42 | Y | | - | oh_abs | Y | | - | oh_shifter | Y | | - | oh_bin2gray | Y | | - | oh_gray2bin | Y | | - | oh_counter | Y | | - | oh_crc | Y | | - | oh_ecc | Y | | - | oh_parity | Y | | - | oh_8b10b_dec | Y | | - | oh_8b10b_enc | Y | | - | oh_pll | Y | | - | oh_par2ser | Y | | - | oh_ser2par | Y | | - - - -## **MODULES** --dma, i2c, jtag, uart, gpio - - - - - - - +| Name | Done | Function | +|-----------------|------|-------------------------------------| +| oh_rsync | Y | Reset synchronzation circuit | +| oh_dsync | Y | Data synchronizizer | +| oh_mux{N} | Y | Various one-hot muxes | +| oh_edgealign | Y | Aligns slow pulse to fast clock | +| oh_pulse2pulse | Y | Converts fast pulse to slow pulse | +| oh_stretcher | Y | Stetches a pulse | +| oh_clockdiv | N | Clock divider | +| oh_arbiter | N | Configurable arbiter | +| oh_fifo_sync | Y | FIFO with same rd/wr clocks | +| oh_fifo_async | Y | FIFO with seaprate rd/wr clocks | +| oh_fifo_cdc | Y | Clock domain crossing FIFO | +| oh_memory_sp | Y | Single ported memory | +| oh_memory_dp | Y | Dual ported memory | +| oh_standby | Y | Low power standby circuit | +| oh_clockgate | Y | Low power clock gating circuit | +| oh_datagate | Y | Low power data gating circuit | +| oh_lat0 | Y | Latch (active low) | +| oh_lat1 | Y | Latch (active high) | +| oh_add | Y | Binary adder | +| oh_csa32 | Y | Full adder | +| oh_csa42 | Y | CSA4:2 Compressor | +| oh_abs | N | Absolute value circuit | +| oh_shifter | N | Bonary shifter | +| oh_bin2gray | N | Binary to gray converter | +| oh_gray2bin | N | Gray to binary converter | +| oh_counter | N | Multi-type counter | +| oh_crc | N | CRC generator | +| oh_par2ser | N | Parallel to serial converter | +| oh_ser2par | N | Serial to parallel converter |