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Updated simulation instructions

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This commit is contained in:
Andreas Olofsson 2015-11-02 19:28:00 -05:00
parent 96abfe3105
commit 2b67e0007a
1 changed files with 3 additions and 2 deletions
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5
elink/README.md
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@ -9,7 +9,8 @@ The "elink" is a low-latency/high-speed interface for communicating between FPGA
$ sudo apt-get install gtkwave iverilog
$ git clone https://github.com/parallella/oh.git
$ cd oh/elink/dv
$ ./run.sh
$ ./build.sh
$ ./run.sh test/test_basic.memh
$ gtkwave test.vcd
```
@ -273,7 +274,7 @@ FIELD | DESCRIPTION
[5:2] | Column chip ID for Epiphany chip
[11:8] | Row chip ID for Epiphany chip
###E_VERSION
###E_VERSION (0xF020C)
Platform and revision number.
FIELD | DESCRIPTION