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Adding place holder for open source tools

- Keep dreaming....
This commit is contained in:
Andreas Olofsson 2016-02-16 14:25:44 -05:00
parent d33f7f3c17
commit 2de2dc3fd6
3 changed files with 31 additions and 0 deletions

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## CONTENTS
* EDA specific scripts
* Some companies don't allow sharing, in that case you probably want to have a private repo of scripts and include a symbolic link here to that repo.
* For example "ln -s /home/synopsys ."

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#CONTENT
* Various open source tools
* front end: yosys
* analog simulator: spice
* verilog simulator: iverilog, verilator
* pnr: n/a
* lvs: n/a
* drc: n/a
* schmatic entry: n/a
* polygon-push: n/a
* analog circuit generators: n/a
* logical equivalence : n/a
* dft compiler : n/a
* power compiler: n/a
* power grid analysis: n/a
* extraction tool: n/a
* signal integrity: n/a
* cell characterization: n/a
* transistor level STA: n/a
* signoff STA: n/a
* scan pattern generator: n/a
* memory compiler: n/a
* generic standard cell library: n/a
* generic io library: n/a

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## CONTENTS
* place holder for yosys synthesis tool...