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Adding dummy vector to testbench
-All zeroes is ignored by stimulus -Easy to remember...
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@ -115,7 +115,7 @@ always @ (posedge clkstim)
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ext_srcaddr[31:0] <= transaction[103:72];
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stim_addr[MAW-1:0] <= stim_addr[MAW-1:0] + 1'b1;
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`else
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ext_access <= 1'b1;
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ext_access <= |(transaction[103:0]);
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ext_data[31:0] <= ext_data[31:0] + 32'b1;
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ext_dstaddr[31:0] <= ext_dstaddr[31:0] + 32'd8;//(32'b1<<datamode)
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ext_datamode[1:0] <= datamode[1:0];
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