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Updating gpio for new emesh packet format
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@ -7,9 +7,9 @@
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//#############################################################################
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//#############################################################################
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`include "gpio_regmap.vh"
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`include "gpio_regmap.vh"
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module gpio #(
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module gpio #( parameter integer N = 24, // number of gpio pins
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parameter integer N = 24, // number of gpio pins
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parameter integer AW = 32, // architecture address width
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parameter integer AW = 32 // architecture address width
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parameter integer PW = 104 // packet width
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)
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)
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(
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(
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input nreset, // asynchronous active low reset
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input nreset, // asynchronous active low reset
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@ -29,9 +29,6 @@ module gpio #(
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//################################
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//################################
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//# wires/regs/ params
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//# wires/regs/ params
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//################################
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//################################
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//local parameters
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localparam integer PW = 2*AW+40; // packet width
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//registers
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//registers
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reg [N-1:0] gpio_dir;
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reg [N-1:0] gpio_dir;
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@ -66,7 +63,8 @@ module gpio #(
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//# DECODE LOGIC
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//# DECODE LOGIC
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//################################
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//################################
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packet2emesh #(.AW(AW))
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packet2emesh #(.AW(AW),
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.PW(PW))
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p2e(
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p2e(
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/*AUTOINST*/
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/*AUTOINST*/
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// Outputs
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// Outputs
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@ -212,7 +210,8 @@ module gpio #(
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default : read_data[AW-1:0] <='b0;
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default : read_data[AW-1:0] <='b0;
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endcase // case (dstaddr_in[7:3])
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endcase // case (dstaddr_in[7:3])
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emesh_readback #(.AW(AW))
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emesh_readback #(.AW(AW),
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.PW(PW))
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emesh_readback (/*AUTOINST*/
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emesh_readback (/*AUTOINST*/
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// Outputs
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// Outputs
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.wait_out (wait_out),
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.wait_out (wait_out),
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@ -223,7 +222,7 @@ module gpio #(
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.clk (clk),
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.clk (clk),
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.access_in (access_in),
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.access_in (access_in),
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.packet_in (packet_in[PW-1:0]),
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.packet_in (packet_in[PW-1:0]),
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.read_data (read_data[AW-1:0]),
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.read_data (read_data[63:0]),
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.wait_in (wait_in));
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.wait_in (wait_in));
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endmodule // gpio
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endmodule // gpio
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