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Linking in clocking diagram

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Andreas Olofsson 2015-09-25 15:40:52 -04:00
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commit 36f9764b07
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elink/README.md
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@ -123,7 +123,7 @@ The elink has the following clock domains:
* txo_lclk: Used by the etx_io for transmitting dual rate data at pins
* txo_lclk90: The txo_lclk phase shifted by 90 degrees. Used by RX to sample the dual data rate data.
![alt tag](docs/clocking.svg)
![alt tag](docs/clocking.png)
###INTERFACE SIGNALS