mirror of
https://github.com/aolofsson/oh.git
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MILESTONE! Working test with new memory map and 2 link system
This commit is contained in:
Andreas Olofsson
parent
6b2d479692
commit
4ae2c1ecbf
@ -1,48 +1,87 @@
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00000000_00000001_810e0000_0b //assert reset
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00000000_00000001_810e0004_0b //clocks on full speed
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00000000_00000111_810e0004_0b //clk/2
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00000000_00000221_810e0004_0b //clk/4
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00000000_00000331_810e0004_0b //clk/8
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00000000_00000441_810e0004_0b //clk/16
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00000000_00000551_810e0004_0b //clk/32
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00000000_00000661_810e0004_0b //clk/64
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00000000_00000000_810e0004_0b //stop cclk
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00000000_00000000_810e0000_0b //deassert reset
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00000000_00000213_810e0004_0b //ELINK0: start cclk and lclk
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00000000_00000001_810d0000_0b //ELINK0: enable tx
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00000000_00000001_820d0000_0b //ELINK1: enable tx
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00000000_00000213_820e0004_0b //ELINK1: start cclk and lclk
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00000000_00000001_810e000c_0b //assert reset
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00000000_00000001_810e0010_0b //clocks on full speed
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00000000_00000111_810e0010_0b //clk/2
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00000000_00000221_810e0010_0b //clk/4
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00000000_00000331_810e0010_0b //clk/8
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00000000_00000441_810e0010_0b //clk/16
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00000000_00000551_810e0010_0b //clk/32
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00000000_00000661_810e0010_0b //clk/64
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00000000_00000000_810e0010_0b //stop cclk
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00000000_00000000_810e000c_0b //deassert reset
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00000000_00000213_810e0010_0b //start cclk and lclk
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00000000_00000001_810e0000_0b //enable tx
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00000000_00000001_820e0000_0b //ELINK1: enable tx
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00000000_00000213_820e0010_0b //ELINK1: start cclk and lclk
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00000000_00000810_810ec080_0b //write to TX MMU(810)
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00000000_00000820_810ec100_0b //write to TX MMU(820)
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00000000_00000408_810ec040_0b //write to TX MMU(808)
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00000000_00000810_820dc080_0b //ELINK1: write to RX MMU(810)
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00000000_00000820_820dc100_0b //ELINK1: write to RX MMU(820)
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00000000_00000608_820da040_0b //ELINK1: write to RX MMU(408)
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00000000_AAAA0000_80800000_0b //write to epiphany
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00000000_AAAA0001_80800004_0b //write to epiphany
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00000000_AAAA0002_80800008_0b //write to epiphany
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00000000_AAAA0003_8080000c_0b //write to epiphany
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00000000_AAAA0004_80800010_0b //write to epiphany
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810B0000_00000000_80800010_09 //read from epiphany
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810B0000_00000000_8080000c_09 //read from epiphany
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810B0000_00000000_80800008_09 //read from epiphany
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810B0000_00000000_80800004_09 //read from epiphany
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810B0000_00000000_80800000_09 //read from epiphany
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000005_810d0000_0b //enable tx remap
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00000000_0508fff5_810c0000_0b //enable rx remap
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00000000_BBBB0000_10100000_0b //write to epiphany
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00000000_BBBB0001_10100004_0b //write to epiphany
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00000000_BBBB0002_10100008_0b //write to epiphany
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00000000_BBBB0003_1010000c_0b //write to epiphany
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00000000_BBBB0004_10100010_0b //write to epiphany
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810B0000_00000000_10100010_09 //read from epiphany
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810B0000_00000000_1010000c_09 //read from epiphany
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810B0000_00000000_10100008_09 //read from epiphany
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810B0000_00000000_10100004_09 //read from epiphany
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810B0000_00000000_10100000_09 //read from epiphany
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810D000c_00000000_80800010_09 //read from epiphany
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810D000c_00000000_8080000c_09 //read from epiphany
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810D000c_00000000_80800008_09 //read from epiphany
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810D000c_00000000_80800004_09 //read from epiphany
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810D000c_00000000_80800000_09 //read from epiphany
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_0508fff5_820d0000_0b //ELINK1:enable rx remap
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000005_810e0000_0b //enable tx remap
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_BBBB0000_20200000_0b //write to epiphany
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00000000_BBBB0001_20200004_0b //write to epiphany
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00000000_BBBB0002_20200008_0b //write to epiphany
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00000000_BBBB0003_2020000c_0b //write to epiphany
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00000000_BBBB0004_20200010_0b //write to epiphany
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810D000C_00000000_20200010_09 //read from epiphany
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810D000C_00000000_2020000c_09 //read from epiphany
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810D000C_00000000_20200008_09 //read from epiphany
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810D000C_00000000_20200004_09 //read from epiphany
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810D000C_00000000_20200000_09 //read from epiphany
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000003_810e0000_0b //enable TX MMU
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00000000_00000003_820d0000_0b //ELINK1: enable RX MMU***
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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@ -53,26 +92,16 @@
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000001_810d0000_0b //enable TX-NORMAL
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00000000_00000001_810c0000_0b //enable RX-NORMAL
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00000000_00000810_810dc080_0b //write to TX MMU(810)
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00000000_00000820_810dc100_0b //write to TX MMU(820)
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00000000_00000408_810dc040_0b //write to TX MMU(808)
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00000000_00000810_810cc080_0b //write to RX MMU(810)
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00000000_00000820_810cc100_0b //write to RX MMU(820)
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00000000_00000608_810ca040_0b //write to RX MMU(408)
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00000000_00000003_810d0000_0b //enable TX MMU
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00000000_00000003_810c0000_0b //enable RX MMU
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00000000_CCCC0000_80800000_0b //write to epiphany
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00000000_CCCC0001_80800004_0b //write to epiphany
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00000000_CCCC0002_80800008_0b //write to epiphany
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00000000_CCCC0003_8080000c_0b //write to epiphany
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00000000_CCCC0004_80800010_0b //write to epiphany
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810B0000_00000000_80800010_09 //read from epiphany
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810B0000_00000000_8080000c_09 //read from epiphany
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810B0000_00000000_80800008_09 //read from epiphany
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810B0000_00000000_80800004_09 //read from epiphany
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810B0000_00000000_80800000_09 //read from epiphany
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810D000C_00000000_80800010_09 //read from epiphany
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810D000C_00000000_8080000c_09 //read from epiphany
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810D000C_00000000_80800008_09 //read from epiphany
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810D000C_00000000_80800004_09 //read from epiphany
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810D000C_00000000_80800000_09 //read from epiphany
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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@ -82,8 +111,8 @@
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000001_810d0000_0b //enable tx (normal mode)
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00000000_00000001_810c0000_0b //enable rx (normal mode)
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810c0010_AAAAAAAA_810c0010_0d //write to mailbox (hack due to loopback)
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BBBBBBBB_AAAAAAAA_810c0010_09 //write to read from mailbox (low)
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BBBBBBBB_AAAAAAAA_810c0014_09 //read from mailbox (high
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000000_00000000_00 //WAIT
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00000000_00000001_810e0000_0b //enable tx (normal mode)
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00000000_00000001_820d0000_0b //ELINK1: enable rx (normal mode)
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