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Fixing Icarus compile error
-multi dimensional parameters not working -trying with regs
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@ -7,18 +7,32 @@ module erx_io (/*AUTOARG*/
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rx_lclk_pll, rxo_wr_wait_p, rxo_wr_wait_n, rxo_rd_wait_p,
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rxo_rd_wait_n, rx_access, rx_burst, rx_packet,
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// Inputs
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reset, rx_lclk, rx_lclk_div4, rxi_lclk_p, rxi_lclk_n,
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rxi_frame_p, rxi_frame_n, rxi_data_p, rxi_data_n, rx_wr_wait,
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rx_rd_wait
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reset, rx_lclk, rx_lclk_div4, rxi_lclk_p, rxi_lclk_n, rxi_frame_p,
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rxi_frame_n, rxi_data_p, rxi_data_n, rx_wr_wait, rx_rd_wait
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);
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parameter IOSTD_ELINK = "LVDS_25";
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parameter PW = 104;
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// Can we do this in a better way?
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parameter [8:0] RX_TAP_DELAY [8:0] = {14,15,14,15,14,15,15,15,15};
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//parameter [8:0] RX_TAP_DELAY [8:0];
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reg [3:0] RX_TAP_DELAY[8:0];
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initial
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begin
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RX_TAP_DELAY[0]=4'd15;
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RX_TAP_DELAY[1]=4'd15;
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RX_TAP_DELAY[2]=4'd15;
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RX_TAP_DELAY[3]=4'd15;
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RX_TAP_DELAY[4]=4'd14;
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RX_TAP_DELAY[5]=4'd15;
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RX_TAP_DELAY[6]=4'd14;
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RX_TAP_DELAY[7]=4'd15;
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RX_TAP_DELAY[8]=4'd14;
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end
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//#########################
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//# reset, clocks
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//#########################
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@ -267,11 +281,12 @@ module erx_io (/*AUTOARG*/
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generate for(j=0; j<9; j=j+1)
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begin : gen_idelay
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(* IODELAY_GROUP = "IDELAY_GROUP" *) // Group name for IDELAYCTRL
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IDELAYE2 #(.CINVCTRL_SEL("FALSE"),
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.DELAY_SRC("IDATAIN"),
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.HIGH_PERFORMANCE_MODE("FALSE"),
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.IDELAY_TYPE("FIXED"),
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.IDELAY_VALUE(RX_TAP_DELAY[j]),
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.IDELAY_VALUE(0), //(RX_TAP_DELAY[j]
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.PIPE_SEL("FALSE"),
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.REFCLK_FREQUENCY(200.0),
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.SIGNAL_PATTERN("DATA"))
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