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Added test/dv for gpio block
-note: with the number of blocks growing, there really needs to be more common iinfrastructure around the builds -every block should be independent, yet you don't want to repeat the scripts
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@ -2,7 +2,8 @@
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DV="../../common/dv/dv_top.v"
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DUT="dut_gpio.v"
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iverilog -g2005 -DTARGET_SIM=1 \
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ROOT="gpio"
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iverilog -o $ROOT.bin -g2005 -DTARGET_SIM=1 \
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$DV \
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$DUT \
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-y ../hdl \
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@ -2,7 +2,7 @@ module dut(/*AUTOARG*/
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// Outputs
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dut_active, clkout, wait_out, access_out, packet_out,
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// Inputs
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clk, clk1, clk2, nreset, vdd, vss, access_in, packet_in, wait_in
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clk1, clk2, nreset, vdd, vss, access_in, packet_in, wait_in
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);
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parameter AW = 32;
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@ -40,9 +40,6 @@ module dut(/*AUTOARG*/
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input [N-1:0] wait_in;
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/*AUTOINPUT*/
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// Beginning of automatic inputs (from unused autoinst inputs)
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input clk; // To gpio of gpio.v
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// End of automatics
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/*AUTOWIRE*/
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// Beginning of automatic wires (for undeclared instantiated-module outputs)
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wire [AW-1:0] gpio_data; // From gpio of gpio.v
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@ -52,6 +49,7 @@ module dut(/*AUTOARG*/
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wire [31:0] reg_rdata; // From gpio of gpio.v
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// End of automatics
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wire clk;
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wire [AW-1:0] gpio_in; // To gpio of gpio.v
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reg [N-1:0] access_out;
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@ -59,7 +57,6 @@ module dut(/*AUTOARG*/
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//DUT
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//######################################################################
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assign gpio_in[AW-1:0] = 32'h87654321;
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assign wait_out[N-1:0] = 'b0;
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assign dut_active = 1'b1;
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assign clkout = clk1;
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@ -79,24 +76,27 @@ module dut(/*AUTOARG*/
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.srcaddr_out ({(AW){1'b0}})
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);
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/*gpio AUTO_TEMPLATE(.gpio_irq (gpio_irq),
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/*gpio AUTO_TEMPLATE(
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.gpio_irq (gpio_irq),
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.gpio_\(.*\) (gpio_\1[AW-1:0]),
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.reg_rdata (reg_rdata[31:0]),
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.reg_\(.*\) (\1_in[]),
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);
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*/
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gpio #(.N(AW))
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gpio (.reg_access (access_in[0]),
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.reg_packet (packet_in[PW-1:0]),
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.gpio_in (gpio_in[AW-1:0]),
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gpio (.gpio_in (gpio_out[AW-1:0]),
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/*AUTOINST*/
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// Outputs
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.reg_rdata (reg_rdata[31:0]),
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.reg_rdata (reg_rdata[31:0]), // Templated
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.gpio_out (gpio_out[AW-1:0]), // Templated
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.gpio_oen (gpio_oen[AW-1:0]), // Templated
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.gpio_irq (gpio_irq), // Templated
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.gpio_data (gpio_data[AW-1:0]), // Templated
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// Inputs
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.nreset (nreset),
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.clk (clk));
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.clk (clk),
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.reg_access (access_in), // Templated
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.reg_packet (packet_in[PW-1:0])); // Templated
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endmodule // dut
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@ -4,4 +4,4 @@ then
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rm test_0.emf
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fi
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cp $1 test_0.emf
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./gpio.vvp
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./gpio.bin
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@ -1,5 +1,14 @@
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DEADBEEF_76543210_00000000_05_0010 //write odata
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DEADBEEF_fedcba98_00000010_05_0010 //write oen
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DEADBEEF_DEADBEEF_00000010_04_0010 //read oen
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DEADBEEF_99999999_00000000_05_0010 //write gpio_oen
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DEADBEEF_FFFFFFFF_00000008_05_0010 //write gpio_out
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DEADBEEF_BBBBBBBB_00000010_05_0010 //write gpio_ien
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DEADBEEF_CCCCCCCC_00000018_05_0010 //write gpio_in
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DEADBEEF_11111111_00000020_05_0010 //write gpio_outand
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DEADBEEF_22222222_00000028_05_0010 //write gpio_outorr
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DEADBEEF_FFFFFFFF_00000030_05_0010 //write gpio_outxor
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DEADBEEF_55555555_00000038_05_0010 //write gpio_irqmask
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