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Directory strcuture change

-hdl-->rtl (more common...)
This commit is contained in:
aolofsson 2022-06-21 14:59:53 -04:00
parent 289024fd89
commit 62e519b52a
4 changed files with 14 additions and 20 deletions

View File

@ -31,14 +31,13 @@ module oh_padring
parameter WE_VDD = 8,
parameter WE_VSS = 8,
parameter ENABLE_CUT = 1,
parameter ENABLE_POC = 1,
parameter TECH_CFG_WIDTH = 16,
parameter ENABLE_POC = 1,
parameter TECH_CFG_WIDTH = 16,
parameter TECH_RING_WIDTH = 8
)
(
//CONTINUOUS GROUND
inout vss,
inout vdd,
//NORTH
inout [NO_DOMAINS-1:0] no_vddio,
@ -82,7 +81,6 @@ module oh_padring
inout [WE_GPIO*TECH_CFG_WIDTH-1:0] we_tech_cfg
);
//Local wires
wire [NO_DOMAINS-1:0] no_poc;
wire [SO_DOMAINS-1:0] so_poc;

View File

@ -19,22 +19,21 @@ module oh_pads_domain
parameter TECH_RING_WIDTH = 8
)
(//pad
inout [NGPIO-1:0] pad, // pad
inout [NGPIO-1:0] pad, // pad
//feed through signals
inout vddio, // io supply
inout vssio, // io ground
inout vdd, // core supply
inout vss, // common ground
inout poc, // power-on-ctrl
inout [TECH_RING_WIDTH-1:0] ring,
inout vddio, // io supply
inout vssio, // io ground
inout vdd, // core supply
inout vss, // common ground
inout poc, // power-on-ctrl
inout [TECH_RING_WIDTH-1:0] ring,
//core facing signals
input [NGPIO-1:0] dout, // data to drive to pad
output [NGPIO-1:0] din, // data from pad
input [NGPIO-1:0] oen, // output enable (bar)
input [NGPIO-1:0] ie, // input enable
input [NGPIO*8-1:0] cfg, // io config
input [NGPIO-1:0] dout, // data to drive to pad
output [NGPIO-1:0] din, // data from pad
input [NGPIO-1:0] oen, // output enable (bar)
input [NGPIO-1:0] ie, // input enable
input [NGPIO*8-1:0] cfg, // io config
inout [NGPIO*TECH_CFG_WIDTH-1:0] tech_cfg // technology-specific config
);
@ -179,6 +178,3 @@ endmodule
// Local Variables:
// verilog-library-directories:("." )
// End: