From 634b1f81f01d98eb169bbd038987c7589fc8b454 Mon Sep 17 00:00:00 2001
From: Andreas Olofsson <andreas@adapteva.com>
Date: Wed, 7 Oct 2015 12:06:30 -0400
Subject: [PATCH] Making reset async

---
 emmu/hdl/emmu.v | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/emmu/hdl/emmu.v b/emmu/hdl/emmu.v
index 8890fec..43f29ff 100644
--- a/emmu/hdl/emmu.v
+++ b/emmu/hdl/emmu.v
@@ -125,7 +125,7 @@ module emmu (/*AUTOARG*/
    //assumes one cycle memory access!     
 
 
-    always @ (posedge  rd_clk)     
+    always @ (posedge  rd_clk or posedge reset)     
      if (reset)
        begin
 	  emesh_access_out         <= 1'b0;