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Merge branch 'master' of github.com:parallella/oh
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643c48b6e1
@ -48,6 +48,7 @@ Chip Design Glossary
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* [LAN](https://en.wikipedia.org/wiki/Local_area_network): Local area network
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* [LAN](https://en.wikipedia.org/wiki/Local_area_network): Local area network
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* [LFSR](https://en.wikipedia.org/wiki/Linear_feedback_shift_register): Linear feedback shift register
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* [LFSR](https://en.wikipedia.org/wiki/Linear_feedback_shift_register): Linear feedback shift register
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* [LSB](https://en.wikipedia.org/wiki/Least_significant_bit): Least significant bit
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* [LSB](https://en.wikipedia.org/wiki/Least_significant_bit): Least significant bit
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* [LUT] (https://en.wikipedia.org/wiki/Lookup_table): An array that replaces runtime computation with a simpler array indexing operation
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* [LVDS](https://en.wikipedia.org/wiki/Low-voltage_differential_signaling): Low-voltage differential signaling (also TIA/EIA-644)
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* [LVDS](https://en.wikipedia.org/wiki/Low-voltage_differential_signaling): Low-voltage differential signaling (also TIA/EIA-644)
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* [MII](https://en.wikipedia.org/wiki/Media-independent_interface): Media independent interface for PHY chips
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* [MII](https://en.wikipedia.org/wiki/Media-independent_interface): Media independent interface for PHY chips
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* [MIMD](https://en.wikipedia.org/wiki/MIMD): Multiple instructions multiple data architecture
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* [MIMD](https://en.wikipedia.org/wiki/MIMD): Multiple instructions multiple data architecture
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@ -61,6 +62,7 @@ Chip Design Glossary
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* [PCM](https://en.wikipedia.org/wiki/Phase-change_memory): Phase change memory
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* [PCM](https://en.wikipedia.org/wiki/Phase-change_memory): Phase change memory
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* [PCIe](https://en.wikipedia.org/wiki/PCI_Express): High Speed serial computer expansion bus
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* [PCIe](https://en.wikipedia.org/wiki/PCI_Express): High Speed serial computer expansion bus
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* [PIC](https://en.wikipedia.org/wiki/Programmable_Interrupt_Controller): Programmable interrupt controller
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* [PIC](https://en.wikipedia.org/wiki/Programmable_Interrupt_Controller): Programmable interrupt controller
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* [Priority Encoder](https://en.wikipedia.org/wiki/Priority_encoder): A circuit or algorithm that compresses multiple binary inputs into a smaller number of outputs
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* [PLL](https://en.wikipedia.org/wiki/Phase-locked_loop): Phase locked loop
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* [PLL](https://en.wikipedia.org/wiki/Phase-locked_loop): Phase locked loop
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* [PWM](https://en.wikipedia.org/wiki/Pulse-width_modulation): Pulse width modulation
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* [PWM](https://en.wikipedia.org/wiki/Pulse-width_modulation): Pulse width modulation
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* [Q](https://en.wikipedia.org/wiki/Q_%28number_format%29): Q fixed point number format
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* [Q](https://en.wikipedia.org/wiki/Q_%28number_format%29): Q fixed point number format
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