diff --git a/README.md b/README.md index 3fff4b7..06d18e7 100644 --- a/README.md +++ b/README.md @@ -1,7 +1,7 @@ ======= # OH! Open Hardware for Chip Designers -## Introduction +## Introduction OH! is an open-source library of hardware building blocks based on silicon proven design practices at 0.35um to 28nm. The library is being used by Adapteva in designing its next generation ASIC. @@ -193,6 +193,8 @@ TBD * [GTKWave](http://gtkwave.sourceforge.net) * [Wavedrom](http://wavedrom.com/editor.html) * [FuseSoC](https://github.com/olofk/fusesoc) +* [OpenROAD](https://github.com/The-OpenROAD-Project/OpenROAD) + ## License The OH! repository source code is licensed under the MIT license unless otherwise specified. See [LICENSE](LICENSE) for MIT copyright terms. Design specific licenses can be found in the folder root (eg: aes/LICENSE) diff --git a/src/axi/README.md b/axi/README.md similarity index 100% rename from src/axi/README.md rename to axi/README.md diff --git a/src/axi/dv/aximaster_stub.v b/axi/dv/aximaster_stub.v similarity index 100% rename from src/axi/dv/aximaster_stub.v rename to axi/dv/aximaster_stub.v diff --git a/src/axi/dv/axislave_stub.v b/axi/dv/axislave_stub.v similarity index 100% rename from src/axi/dv/axislave_stub.v rename to axi/dv/axislave_stub.v diff --git a/src/axi/hdl/emaxi.v b/axi/hdl/emaxi.v similarity index 100% rename from src/axi/hdl/emaxi.v rename to axi/hdl/emaxi.v diff --git a/src/axi/hdl/esaxi.v b/axi/hdl/esaxi.v similarity index 100% rename from src/axi/hdl/esaxi.v rename to axi/hdl/esaxi.v diff --git a/boards/README.md b/boards/README.md deleted file mode 100644 index caaf48e..0000000 --- a/boards/README.md +++ /dev/null @@ -1,52 +0,0 @@ -LIST OF OPEN SOURCE PRINTED CIRCUIT BOARDS -====================================================== - ->> Open source means that the original source code and design files are provided under a copyleft or permissive open source license. - -1. [List of Single Board Computers (SBCs)](#single-board-computers) -2. [List of RF Boards](#rf-boards) -3. [List of Camera Boards](#camera-boards) -4. [List of Other Boards](#other-boards) -5. [How to Add a Board](#how-to-add-a-board) - ---------------------------------------------------------------------- - -# Single Board Computers - -| Name | Type | Tool | Author | Description | -|-------------------------------------------|--------|---------| -----------------| ---------------------------------------| -| [Arduino Uno](./arduino-uno.md) | SBC | SBC | Arduino | Arduino | -| [Beaglebone Black](./beaglebone-black.md) | SBC | Allegro | CircuitCo | TI processor SBC | -| [Olinuxino](./olinuxino.md) | SBC | KiCad | Olimex | Industrial grade SBC | -| [Parallella](./parallella.md) | SBC | Allegro | Adapteva | SBC with Zynq FPGA + Epiphany | -| [Rascal Micro](./rascal-micro.md) | SBC | Altium | Brandon Stafford | SBC that works with Arduino shields | - -# RF Boards - -| Name | Type | Tool | Author | Description | -|----------------------------------------|--------|---------| --------------------| ---------------------------------------------| -| [Hack RF](./hackrf.md) | RF | KiCad | Great Scott Gadgets | 1MHz-6GHz Half Duplex RF board | -| [Parallella Lime](./parallella-lime.md)| RF | KiCad | Lime Micro | Parallella 300MHz-3.8GHz Parallella SDR board | - -# Camera Boards -| Name | Type | Tool | Author | Description | -|---------------------------------------|--------|---------| -----------| ------------------------------------------------| -| [KVision](./kvision.md) | Camera | Altium | Emil Fresk | Parallella Stero camera board | - -# Other Boards -| Name | Type | Tool | Author | Description | -|-----------------------------------------|--------|---------|------------|-------------------------------------------------| -| [AAFM ](./aafm.md) | FMC | Allegro | BittWare | FMC board with 4 Epiphany-III chips | -| [OpenLog](./openlog.md) | Adapter| Eagle | SparkFun | Data logger | -| [MicroSD Adapter](./microsd-adapter.md) | Adapter| Eagle | Adafruit | MicroSD to SD card adapter for RPI | -| [Porcupine](./porcupine.md) | Adapter| KiCad | Adapteva | Parallella breakout board | - -# How to Add a Board -1. Fork this repository to your personal github account using the 'fork' button above -2. Clone your "OH" fork to a local computer using 'git clone' -3. Create a file "your_board".md in the "boards" directory -4. Update the table in this README.md file with a link to that new description -5. Use git add-->git commit-->git push to add changes to your fork of 'parallella-examples' -6. Submit a pull request by clicking the 'pull request' button on YOUR github 'OH' repo - - diff --git a/boards/aafm.md b/boards/aafm.md deleted file mode 100644 index d425a1c..0000000 --- a/boards/aafm.md +++ /dev/null @@ -1,9 +0,0 @@ -## AAFM -* Description: FMC board with 4 Epiphany-III chips -* Type: FMC -* CAD Tool: Allegro/Orcad -* Author: BittWare -* License: Creative Commons Attribution-Share Alike 3.0 Unprotected License -* [Schematic](https://github.com/parallella/parallella-hw/tree/master/aafm) -* [Layout](https://github.com/parallella/parallella-hw/tree/master/aafm) - diff --git a/boards/arduino-uno.md b/boards/arduino-uno.md deleted file mode 100644 index 3c7ca76..0000000 --- a/boards/arduino-uno.md +++ /dev/null @@ -1,9 +0,0 @@ -## Arduino Uno -* Description: Arduino Computer -* Type: SBC -* CAD Tool: Eagle -* Author: Arduino -* License: Creative Commons -* [Schematic](https://www.arduino.cc/en/uploads/Main/arduino_Uno_Rev3-02-TH.zip) -* [Layout](https://www.arduino.cc/en/uploads/Main/arduino_Uno_Rev3-02-TH.zip) - diff --git a/boards/beaglebone-black.md b/boards/beaglebone-black.md deleted file mode 100644 index 7a87090..0000000 --- a/boards/beaglebone-black.md +++ /dev/null @@ -1,9 +0,0 @@ - -## Beaglebone Black -* Description: Credit card sized single board computer -* Type: SBC -* CAD Tool: Allegro/Orcad -* Author: CircuitCo -* [Schematic](https://github.com/CircuitCo/BeagleBone-Black) -* [Layout](https://github.com/CircuitCo/BeagleBone-Black) - diff --git a/boards/hackrf.md b/boards/hackrf.md deleted file mode 100644 index 8cc28ac..0000000 --- a/boards/hackrf.md +++ /dev/null @@ -1,11 +0,0 @@ - - -## Hack RF -* Description: Credit card sized single board computer -* Type: SBC -* CAD Tool: KiCad -* Author: Great Scott Gadgets -* [Schematic](https://github.com/mossmann/hackrf/tree/master/doc/hardware) -* [Layout](https://github.com/mossmann/hackrf/tree/master/doc/hardware) - - diff --git a/boards/kvision.md b/boards/kvision.md deleted file mode 100644 index 857f653..0000000 --- a/boards/kvision.md +++ /dev/null @@ -1,9 +0,0 @@ -## KVison -* Description: Stereo camera board for parallella -* Type: Adapter -* CAD Tool: Altium -* Author: Emil Fresk -* License: Creative Commons Attribution-Share Alike 3.0 Unprotected License -* [Schematic](https://github.com/parallella/parallella-hw/tree/master/kvision) -* [Layout](https://github.com/parallella/parallella-hw/tree/master/kvision) - diff --git a/boards/microsd-adapter.md b/boards/microsd-adapter.md deleted file mode 100644 index 8d61cc2..0000000 --- a/boards/microsd-adapter.md +++ /dev/null @@ -1,10 +0,0 @@ - -## MicroSD Adapter -* Description: MicroSD to SD card adapter for RPI -* Type: Adapter -* CAD Tool: eagle -* Author: Adafruit -* License: Creative Commons Attribution, Share-Alike license -* [Schematic](https://github.com/adafruit/Adafruit-Low-profile-microSD-to-SD-Adapter-PCB) -* [Layout](https://github.com/adafruit/Adafruit-Low-profile-microSD-to-SD-Adapter-PCB) - diff --git a/boards/olinuxino.md b/boards/olinuxino.md deleted file mode 100644 index 59fc591..0000000 --- a/boards/olinuxino.md +++ /dev/null @@ -1,12 +0,0 @@ - - -## Olinuxino -* Description: AM3352 (TI) based single board computer -* Type: Single Board Computer -* Tool: KiCad -* Author: Olimex -* License: Creative Commons Attribution-Share Alike 3.0 United States License -* [Schematic](https://github.com/OLIMEX/OLINUXINO/tree/master/HARDWARE/A64-OLinuXino/A64-OLinuXino_Rev_B) -* [Layout](https://github.com/OLIMEX/OLINUXINO/tree/master/HARDWARE/A64-OLinuXino/A64-OLinuXino_Rev_B) - - diff --git a/boards/openlog.md b/boards/openlog.md deleted file mode 100644 index fea2072..0000000 --- a/boards/openlog.md +++ /dev/null @@ -1,11 +0,0 @@ - - -## OpenLog -* Type: Other -* Tool: Eagle -* Author: SparkFun -* Description: Data logger -* License: Creative Commons Attribution-Share Alike 3.0 United States License -* [Schematic](https://github.com/sparkfun/OpenLog) -* [Layout](https://github.com/sparkfun/OpenLog) - diff --git a/boards/parallella-lime.md b/boards/parallella-lime.md deleted file mode 100644 index 35128ca..0000000 --- a/boards/parallella-lime.md +++ /dev/null @@ -1,11 +0,0 @@ - -## Parallella Lime -* Description: 300MHz-3.8GHz Parallella SDR board -* Type: RF -* Tool: KiCad -* Author: Lime Micro -* License: Creative Commons Attribution 3.0 Unported licence -* [Schematic](https://github.com/parallella/parallella-hw/tree/master/parallella-lime) -* [Layout](https://github.com/parallella/parallella-hw/tree/master/parallella-lime) - - diff --git a/boards/parallella.md b/boards/parallella.md deleted file mode 100644 index d1628f0..0000000 --- a/boards/parallella.md +++ /dev/null @@ -1,11 +0,0 @@ -## Parallella -* Description: Credit card sized computer with Zynq FPGA and 16-core Epiphany coprocessor -* Type: SBC -* Tool: Allegro -* Author: Adapteva -* License: Creative Commons Attribution 3.0 Unported licence -* Docs: [http://parallella.org/docs/parallella_manual.pdf](http://parallella.org/docs/parallella_manual.pdf) -* Schematic: [https://github.com/parallella/parallella-hw/tree/master/parallella](https://github.com/parallella/parallella-hw/tree/master/parallella) -* Layout: [https://github.com/parallella/parallella-hw/tree/master/parallella](https://github.com/parallella/parallella-hw/tree/master/parallella) - - diff --git a/boards/porcupine.md b/boards/porcupine.md deleted file mode 100644 index 4e9f3d5..0000000 --- a/boards/porcupine.md +++ /dev/null @@ -1,12 +0,0 @@ - - -## Porcupine -* Description: Parallella breakout board -* Type: Adapter -* Tool: KiCad -* Author: Adapteva -* License: Creative Commons Attribution 3.0 Unported licence -* [Schematic](https://github.com/parallella/parallella-hw/tree/master/porcupine) -* [Layout](https://github.com/parallella/parallella-hw/tree/master/porcupine) - - diff --git a/boards/rascal-micro.md b/boards/rascal-micro.md deleted file mode 100644 index c3b11d4..0000000 --- a/boards/rascal-micro.md +++ /dev/null @@ -1,9 +0,0 @@ - -## Rascal Micro -* Description: Small, open source computer that works with Arduino shields -* Type: SBC -* Tool: Altium -* Author: Brandon Stafford -* License: Creative Commons Attribution 3.0 Unported licence -* [Schematic](http://rascalmicro.com/files/rascal-1.2.schdoc) -* [Layout](http://rascalmicro.com/files/rascal-1.2.pcbdoc) diff --git a/src/common/README.md b/common/README.md similarity index 100% rename from src/common/README.md rename to common/README.md diff --git a/src/common/dv/README.md b/common/dv/README.md similarity index 100% rename from src/common/dv/README.md rename to common/dv/README.md diff --git a/src/common/dv/cfg_random.v b/common/dv/cfg_random.v similarity index 100% rename from src/common/dv/cfg_random.v rename to common/dv/cfg_random.v diff --git a/src/common/dv/dut_clockdiv.v b/common/dv/dut_clockdiv.v similarity index 100% rename from src/common/dv/dut_clockdiv.v rename to common/dv/dut_clockdiv.v diff --git a/src/common/dv/dut_debouncer.v b/common/dv/dut_debouncer.v similarity index 100% rename from src/common/dv/dut_debouncer.v rename to common/dv/dut_debouncer.v diff --git a/src/common/dv/dut_fifo_generic.v b/common/dv/dut_fifo_generic.v similarity index 100% rename from src/common/dv/dut_fifo_generic.v rename to common/dv/dut_fifo_generic.v diff --git a/src/common/dv/dut_gray.v b/common/dv/dut_gray.v similarity index 100% rename from src/common/dv/dut_gray.v rename to common/dv/dut_gray.v diff --git a/src/common/dv/dut_template.v b/common/dv/dut_template.v similarity index 100% rename from src/common/dv/dut_template.v rename to common/dv/dut_template.v diff --git a/src/common/dv/dv_driver.v b/common/dv/dv_driver.v similarity index 100% rename from src/common/dv/dv_driver.v rename to common/dv/dv_driver.v diff --git a/src/common/dv/dv_random.v b/common/dv/dv_random.v similarity index 100% rename from src/common/dv/dv_random.v rename to common/dv/dv_random.v diff --git a/common/dv/dv_stimulus.v b/common/dv/dv_stimulus.v new file mode 100644 index 0000000..b7bf498 --- /dev/null +++ b/common/dv/dv_stimulus.v @@ -0,0 +1,60 @@ +module dv_top (); + parameter DW = 64; // Memory width + parameter MAW = 15; // Memory address width + + //regs/wires + reg [1023:0] filename; + wire [DW-1:0] ext_packet; + + /*AUTOWIRE*/ + // Beginning of automatic wires (for undeclared instantiated-module outputs) + wire nreset; // From dv_ctrl of dv_ctrl.v + wire start; // From dv_ctrl of dv_ctrl.v + wire stim_access; // From stimulus of stimulus.v + wire stim_done; // From stimulus of stimulus.v + wire [DW-1:0] stim_packet; // From stimulus of stimulus.v + wire vdd; // From dv_ctrl of dv_ctrl.v + wire vss; // From dv_ctrl of dv_ctrl.v + // End of automatics + + assign test_done = 1'b1; + assign dut_active = 1'b1; + //Reset and clocks + dv_ctrl dv_ctrl(.clk1 (ext_clk), + .clk2 (dut_clk), + /*AUTOINST*/ + // Outputs + .nreset (nreset), + .start (start), + .vdd (vdd), + .vss (vss), + // Inputs + .dut_active (dut_active), + .stim_done (stim_done), + .test_done (test_done)); + + //Stimulus + assign ext_start = start; + assign ext_access = 'b0; + assign ext_packet = 'b0; + assign dut_wait = 'b0; + + + stimulus #(.DW(DW),.MAW(MAW),.HEXFILE("firmware.hex")) + stimulus( + /*AUTOINST*/ + // Outputs + .stim_access (stim_access), + .stim_packet (stim_packet[DW-1:0]), + .stim_done (stim_done), + // Inputs + .nreset (nreset), + .ext_start (ext_start), + .ext_clk (ext_clk), + .ext_access (ext_access), + .ext_packet (ext_packet[DW-1:0]), + .dut_clk (dut_clk), + .dut_wait (dut_wait)); + + +endmodule // unmatched end(function|task|module|primitive|interface|package|class|clocking) diff --git a/src/common/dv/dv_top.v b/common/dv/dv_top.v similarity index 100% rename from src/common/dv/dv_top.v rename to common/dv/dv_top.v diff --git a/common/dv/firmware_example.hex b/common/dv/firmware_example.hex new file mode 100644 index 0000000..2cd9092 --- /dev/null +++ b/common/dv/firmware_example.hex @@ -0,0 +1,3 @@ +7766554433221101 //first line +FFEEDDCCBBEE9901 //second line +0000000000000000 //end of stimulus [0]=0 \ No newline at end of file diff --git a/src/common/dv/libs.cmd b/common/dv/libs.cmd similarity index 99% rename from src/common/dv/libs.cmd rename to common/dv/libs.cmd index 70ec6c1..c06357a 100644 --- a/src/common/dv/libs.cmd +++ b/common/dv/libs.cmd @@ -1,4 +1,5 @@ --y . + + -y ../../common/dv -y ../../emesh/dv -y ../../memory/dv @@ -29,3 +30,4 @@ +incdir+../../gpio/hdl +incdir+../../spi/hdl +incdir+../../mio/hdl + diff --git a/src/common/dv/oh.gtkw b/common/dv/oh.gtkw similarity index 100% rename from src/common/dv/oh.gtkw rename to common/dv/oh.gtkw diff --git a/common/dv/oh_simchecker.v b/common/dv/oh_simchecker.v new file mode 100644 index 0000000..4c8f9be --- /dev/null +++ b/common/dv/oh_simchecker.v @@ -0,0 +1,26 @@ +module oh_simchecker #(parameter DW = 32 // Datapath width + ) + ( + //Inputs + input clk, + input nreset, + input [DW-1:0] result, // result to check + input [DW-1:0] reference, // reference result + output reg diff //fail indicator + ); + + always @ (negedge clk or negedge nreset) + if(~nreset) + diff <= 1'b0; + else if(result!==reference) + begin + diff <= 1'b1; +`ifdef CFG_SIM + $display("ERROR(%0t): result= %d(%h) reference= %d(%h)", $time, result,result, reference, reference); +`endif + end + else + diff <= 1'b0; + +endmodule // oh_simchecker + diff --git a/common/dv/oh_simctrl.v b/common/dv/oh_simctrl.v new file mode 100644 index 0000000..4b6a391 --- /dev/null +++ b/common/dv/oh_simctrl.v @@ -0,0 +1,148 @@ +/* verilator lint_off STMTDLY */ +module oh_simctrl #( parameter CFG_CLK1_PERIOD = 10, + parameter CFG_CLK2_PERIOD = 20, + parameter CFG_TIMEOUT = 500 + ) + ( + //control signals to drive + output nreset, // async active low reset + output clk1, // main clock + output clk2, // secondary clock + output start, // start test (level) + output vdd, // driving vdd + output vss, // driving vss + //input from testbench + input dut_active, // dut reset sequence is done + input stim_done, // stimulus is done + input test_done, // test is done + input test_diff // diff between dut and reference + ); + + + localparam CFG_CLK1_PHASE = CFG_CLK1_PERIOD/2; + localparam CFG_CLK2_PHASE = CFG_CLK2_PERIOD/2; + + //signal declarations + reg vdd; + reg vss; + reg nreset; + reg start; + reg clk1=0; + reg clk2=0; + reg [6:0] clk1_phase; + reg [6:0] clk2_phase; + reg test_fail; + integer seed,r; + reg [1023:0] testname; + + //################################# + // CONFIGURATION + //################################# + initial + begin + r=$value$plusargs("TESTNAME=%s", testname[1023:0]); + $timeformat(-9, 0, " ns", 20); + end + +`ifndef VERILATOR + initial + begin + $dumpfile("waveform.vcd"); + $dumpvars(0, testbench); + end +`endif + + //################################# + // RANDOM NUMBER GENERATOR + // (SEED SUPPLIED EXERNALLY) + //################################# + initial + begin + r=$value$plusargs("SEED=%s", seed); + //$display("SEED=%d", seed); +`ifdef CFG_RANDOM + clk1_phase = 1 + {$random(seed)}; //generate random values + clk2_phase = 1 + {$random(seed)}; //generate random values +`else + clk1_phase = CFG_CLK1_PHASE; + clk2_phase = CFG_CLK2_PHASE; +`endif + //$display("clk1_phase=%d clk2_phase=%d", clk1_phase,clk2_phase); + end + + //################################# + //CLK GENERATORS + //################################# + + always + #(clk1_phase) clk1 = ~clk1; + + always + #(clk2_phase) clk2 = ~clk2; + + //################################# + //ASYNC + //################################# + + initial + begin + #(1) + nreset = 'b0; + vdd = 'b0; + vss = 'b0; + #(clk1_phase * 10 + 10) //ramping voltage + vdd = 'bx; + #(clk1_phase * 10 + 10) //voltage is safe + vdd = 'b1; + #(clk1_phase * 40 + 10) //hold reset for 20 clk cycles + nreset = 'b1; + end + + //################################# + //SYNCHRONOUS STIMULUS + //################################# + + //START TEST + always @ (posedge clk1 or negedge nreset) + if(!nreset) + start <= 1'b0; + else if(dut_active & ~start) + begin + $display("-------------------"); + $display("TEST %0s STARTED", testname); + start <= 1'b1; + end + + //STOP SIMULATION ON END + always @ (posedge clk1 or negedge nreset) + if(!nreset) + test_fail <= 1'b0; + else if(stim_done & test_done) + begin + #500 + $display("-------------------"); + if(test_fail | test_diff) + $display("TEST %0s FAILED", testname); + else + $display("TEST %0s PASSED", testname); + $finish; + end + else if (test_diff) + test_fail <= 1'b1; + + //################################# + // TIMEOUT + //################################# + initial + begin + #(CFG_TIMEOUT) + $display("TEST %0s FAILED ON TIMEOUT",testname); + $finish; + end + +endmodule // oh_simctrl + + + + + diff --git a/src/common/dv/run.sh b/common/dv/run.sh similarity index 100% rename from src/common/dv/run.sh rename to common/dv/run.sh diff --git a/common/dv/stimulus.v b/common/dv/stimulus.v new file mode 100644 index 0000000..fc6f993 --- /dev/null +++ b/common/dv/stimulus.v @@ -0,0 +1,143 @@ +// A stimulus file provides inputs signals to the design under test (DUT). +// This stimulus module is designed to be compatible with verilog simulators, +// emulators, and FPGA prototyping. This is akin to a simple test vector generator +// No looping supported! +// +// Memory format: +// b0 = valid, +// b1-7 = wait time +// b8-bxxx = packet +// +// Test Process: +// 1. Zero out memory (or write program) +// 2. Set go signal +// +module stimulus #( parameter DW = 32, // Memory width=DW+ + parameter MAW = 15, // Memory address width + parameter HEXFILE = "NONE" // Name of hex file + ) + ( + //Asynchronous Stimulus Reset + input nreset, + input ext_start, // Start driving stimulus + input use_timestamps,//b1-7 used for timestamps + input ignore_valid,//b0 valid bit ignored + //External Load port + input ext_clk,// External clock for write path + input ext_access, // Valid packet for memory + input [DW-1:0] ext_packet, // Packet for memory + //DUT Drive port + input dut_clk, // DUT side clock + input dut_wait, // DUT stall signal + output stim_access, // Access signal + output [DW-1:0] stim_packet, // Packet + output stim_done // Stimulus program done + ); + + localparam MD = 1<io output emesh_access_out; output [PW-1:0] emesh_packet_out; - input emesh_wait_in; + input emesh_ready_in; //##################################################### //# EMESH-->(RMESH/XMESH/CMESH) @@ -65,16 +65,16 @@ module emesh_if (/*AUTOARG*/ assign xmesh_packet_out[PW-1:0] = emesh_packet_in[PW-1:0]; - assign emesh_wait_out = cmesh_wait_in | - rmesh_wait_in | - xmesh_wait_in; + assign emesh_ready_out = cmesh_ready_in & + rmesh_ready_in & + xmesh_ready_in; //##################################################### //# (RMESH/XMESH/CMESH)-->EMESH //##################################################### - assign emesh_access_out = cmesh_access_in | - rmesh_access_in | + assign emesh_access_out = cmesh_access_in & + rmesh_access_in & xmesh_access_in; @@ -83,15 +83,14 @@ module emesh_if (/*AUTOARG*/ rmesh_access_in ? rmesh_packet_in[PW-1:0] : xmesh_packet_in[PW-1:0]; - assign cmesh_wait_out = (cmesh_access_in & emesh_wait_in); + assign cmesh_ready_out = ~(cmesh_access_in & ~emesh_ready_in); - assign rmesh_wait_out = rmesh_access_in & - (emesh_wait_in | cmesh_access_in); - + assign rmesh_ready_out = ~(rmesh_access_in & + (~emesh_ready_in | ~cmesh_ready_in)); - assign xmesh_wait_out = xmesh_access_in & - (emesh_wait_in | cmesh_access_in | rmesh_access_in); + assign xmesh_ready_out = ~(xmesh_access_in & + (~emesh_ready_in | ~cmesh_access_in | ~rmesh_access_in)); endmodule // emesh_if diff --git a/src/emesh/hdl/emesh_mux.v b/enoc/hdl/emesh_mux.v similarity index 88% rename from src/emesh/hdl/emesh_mux.v rename to enoc/hdl/emesh_mux.v index 80a3582..54d5e20 100644 --- a/src/emesh/hdl/emesh_mux.v +++ b/enoc/hdl/emesh_mux.v @@ -1,8 +1,8 @@ module emesh_mux (/*AUTOARG*/ // Outputs - wait_out, access_out, packet_out, + ready_out, access_out, packet_out, // Inputs - access_in, packet_in, wait_in + access_in, packet_in, ready_in ); //##################################################################### @@ -22,12 +22,12 @@ module emesh_mux (/*AUTOARG*/ //Incoming transaction input [N-1:0] access_in; input [N*PW-1:0] packet_in; - output [N-1:0] wait_out; + output [N-1:0] ready_out; //Outgoing transaction output access_out; output [PW-1:0] packet_out; - input wait_in; + input ready_in; //##################################################################### //# BODY @@ -61,8 +61,8 @@ module emesh_mux (/*AUTOARG*/ //access signal assign access_out = |(access_in[N-1:0]); - //raise wait signals - assign wait_out[N-1:0] = access_in[N-1:0] & (~grants[N-1:0] | {(N){wait_in}}); + //raise ready signals + assign ready_out[N-1:0] = ~(access_in[N-1:0] & ~grants[N-1:0]) & {(N){ready_in}}); //parametrized mux always @* diff --git a/src/emesh/hdl/emesh_rdalign.v b/enoc/hdl/emesh_rdalign.v similarity index 100% rename from src/emesh/hdl/emesh_rdalign.v rename to enoc/hdl/emesh_rdalign.v diff --git a/src/emesh/hdl/emesh_readback.v b/enoc/hdl/emesh_readback.v similarity index 85% rename from src/emesh/hdl/emesh_readback.v rename to enoc/hdl/emesh_readback.v index b16e372..a6d5a34 100644 --- a/src/emesh/hdl/emesh_readback.v +++ b/enoc/hdl/emesh_readback.v @@ -1,8 +1,8 @@ module emesh_readback (/*AUTOARG*/ // Outputs - wait_out, access_out, packet_out, + ready_out, access_out, packet_out, // Inputs - nreset, clk, access_in, packet_in, read_data, wait_in + nreset, clk, access_in, packet_in, read_data, ready_in ); parameter AW = 32; // address width parameter PW = 104; // packet width @@ -14,7 +14,7 @@ module emesh_readback (/*AUTOARG*/ // input transaction input access_in; // register access input [PW-1:0] packet_in; // data/address - output wait_out; // pushback from mesh + output ready_out; // pushback from mesh // register/memory data (already pipelined) input [63:0] read_data; // data from register/memory @@ -22,11 +22,11 @@ module emesh_readback (/*AUTOARG*/ // output transaction output access_out; // register access output [PW-1:0] packet_out; // data/address - input wait_in; // pushback from mesh + input ready_in; // pushback from mesh /*AUTOWIRE*/ // Beginning of automatic wires (for undeclared instantiated-module outputs) - wire [4:0] ctrlmode_in; // From p2e of packet2emesh.v + wire [12:0] ctrlmode_in; // From p2e of packet2emesh.v wire [AW-1:0] data_in; // From p2e of packet2emesh.v wire [1:0] datamode_in; // From p2e of packet2emesh.v wire [AW-1:0] dstaddr_in; // From p2e of packet2emesh.v @@ -51,7 +51,7 @@ module emesh_readback (/*AUTOARG*/ // Outputs .write_in (write_in), .datamode_in (datamode_in[1:0]), - .ctrlmode_in (ctrlmode_in[4:0]), + .ctrlmode_in (ctrlmode_in[12:0]), .dstaddr_in (dstaddr_in[AW-1:0]), .srcaddr_in (srcaddr_in[AW-1:0]), .data_in (data_in[AW-1:0]), @@ -66,12 +66,12 @@ module emesh_readback (/*AUTOARG*/ always @ (posedge clk or negedge nreset) if(!nreset) access_out <= 1'b0; - else if(~wait_in) + else if(ready_in) access_out <= access_in & ~write_in; //packet always @ (posedge clk) - if(~wait_in & access_in & ~write_in) + if(ready_in & access_in & ~write_in) begin datamode_out[1:0] <= datamode_in[1:0]; ctrlmode_out[4:0] <= ctrlmode_in[4:0]; @@ -81,8 +81,8 @@ module emesh_readback (/*AUTOARG*/ assign data_out[AW-1:0] = read_data[31:0]; assign srcaddr_out[AW-1:0] = read_data[63:32]; - //wait signal - assign wait_out = wait_in; + //ready signal + assign ready_out = ready_in; //######################################## //# Convert to Packet @@ -96,7 +96,7 @@ module emesh_readback (/*AUTOARG*/ .packet_out (packet_out[PW-1:0]), // Inputs .datamode_out (datamode_out[1:0]), - .ctrlmode_out (ctrlmode_out[4:0]), + .ctrlmode_out (ctrlmode_out[12:0]), .dstaddr_out (dstaddr_out[AW-1:0]), .data_out (data_out[AW-1:0]), .srcaddr_out (srcaddr_out[AW-1:0])); diff --git a/src/emesh/hdl/emesh_wralign.v b/enoc/hdl/emesh_wralign.v similarity index 100% rename from src/emesh/hdl/emesh_wralign.v rename to enoc/hdl/emesh_wralign.v diff --git a/enoc/hdl/enoc_decode.v b/enoc/hdl/enoc_decode.v new file mode 100644 index 0000000..2b134f3 --- /dev/null +++ b/enoc/hdl/enoc_decode.v @@ -0,0 +1,55 @@ +/******************************************************************************* + * Function: ENOC Command Decoder + * Author: Andreas Olofsson + * License: MIT (see LICENSE file in OH! repository) + * + * see ./enoc_pack.v + * + ******************************************************************************/ +module enoc_decode + ( + //Packet Command + input [15:0] cmd_in, + //Write + output cmd_write, + output cmd_write_stop, + //Read + output cmd_read, + output cmd_atomic_add, + output cmd_atomic_and, + output cmd_atomic_or, + output cmd_atomic_xor, + output cmd_cas, + //Fields + output [3:0] cmd_opcode, + output [3:0] cmd_length, + output [2:0] cmd_size, + output [7:0] cmd_user + ); + + //############################################ + // Command Decode + //############################################ + + //Writes + assign cmd_write = ~cmd_in[3]; + assign cmd_write_stop = cmd_in[3:0]==1001; + + //Reads/atomics + assign cmd_read = cmd_in[3:0]==1000; + assign cmd_atomic_cas = cmd_in[3:0]==1011; + assign cmd_atomic_add = cmd_in[3:0]==1100; + assign cmd_atomic_and = cmd_in[3:0]==1101; + assign cmd_atomic_or = cmd_in[3:0]==1110; + assign cmd_atomic_xor = cmd_in[3:0]==1111; + + //Field Decode + assign cmd_opcode[3:0] = cmd_in[3:0]; + assign cmd_length[3:0] = cmd_in[7:4]; + assign cmd_size[2:0] = cmd_in[10:8]; + assign cmd_user[7:0] = cmd_in[15:8]; + +endmodule // enoc_decode + + + diff --git a/enoc/hdl/enoc_pack.v b/enoc/hdl/enoc_pack.v new file mode 100644 index 0000000..06042c2 --- /dev/null +++ b/enoc/hdl/enoc_pack.v @@ -0,0 +1,219 @@ +/******************************************************************************* + * Function: Memory Mapped Transaction --> Packet Converter + * Author: Andreas Olofsson + * License: MIT (see LICENSE file in OH! repository) + * + * Documentation: + * + * The following table shows the field mapping for different AW's: + * + * | Packet | AW16 | AW32 | AW64 | AW128 | + * |---------|---------|----------|--------|---------| + * | 15:0 | DA,CMD | CMD | CMD | CMD | + * | 47:16 | D/SA,DA | DA0 | DA0 | DA0 | + * | 79:48 | **** | D0/SA0 | D0/SA0 | D0/SA0 | + * | 111:80 | **** | D1/0 | D1/SA1 | D1/SA1 | + * |---------|---------|----------|--------|---------| + * | 143:112 | **** | *** | DA1 | DA1 | + * |---------|---------|----------|--------|---------| + * | 167:144 | **** | *** | D2 | D2/SA2 | + * | 207:176 | *** | **** | D3 | D3/SA3 | + * | 239:208 | **** | **** | **** | DA2 | + * | 271:240 | **** | **** | **** | DA3 | + * |---------|---------|----------|--------|---------| + * | 303:272 | **** | **** | *** | D4 | + * | 335:304 | **** | **** | **** | D5 | + * | 367:336 | **** | **** | **** | D6 | + * | 399:368 | **** | **** | **** | D7 | + * + * The following list shows the widths supported for each AW + * + * |Packet | AW16 | AW32 | AW64 | AW128 | + * |---------------|-------|--------|--------|--------| + * |minimum | 40 | 72+8 | 136+8 | 264+8 | + * |double/atomics | -- | 104+8 | 200+8 | 392+8 | + * + * The command field has the following options: + * + * + * | Command[15:0] | 15:11 | 10:8 | 7:4 | 3:0 | + * |-----------------|-----------|-----------|----------|------| + * | WRITE-START | USER[7:3] | SIZE[2:0] | LEN[3:0] | 0000 | + * | WRITE-STOP | USER[7:3] | SIZE[2:0] | LEN[3:0] | 0001 | + * | WRITE-MULTICAST | USER[7:3] | SIZE[2:0] | LEN[3:0] | 0010 | + * | TBD | USER[7:3] | SIZE[2:0] | LEN[3:0] | 0011 | + * | TBD | USER[7:3] | SIZE[2:0] | LEN[3:0] | 0100 | + * | TBD | USER[7:3] | SIZE[2:0] | LEN[3:0] | 0101 | + * | TBD | USER[7:3] | SIZE[2:0] | LEN[3:0] | 0110 | + * | TBD | USER[7:3] | SIZE[2:0] | LEN[3:0] | 0111 | + * |-----------------|-----------|-----------|----------|------| + * | READ | USER[7:3] | SIZE[2:0] | LEN[3:0] | 1000 | + * | TBD | USER[7:3] | SIZE[2:0] | LEN[3:0] | 1010 | + * | TBD | USER[7:3] | SIZE[2:0] | LEN[3:0] | 1010 | + * | CAS | USER[7:3] | SIZE[2:0] | LEN[3:0] | 1011 | + * | ATOMIC-ADD | USER[7:3] | SIZE[2:0] | LEN[3:0] | 1100 | + * | ATOMIC-AND | USER[7:3] | SIZE[2:0] | LEN[3:0] | 1101 | + * | ATOMIC-OR | USER[7:3] | SIZE[2:0] | LEN[3:0] | 1110 | + * | ATOMIC-XOR | USER[7:3] | SIZE[2:0] | LEN[3:0] | 1111 | + * + * SIZE DECODE: + * 000=8b + * 001=16b + * 010=32b + * 011=64b + * 100=128b + * 101=256b + * 110=512b + * 111=1024b + * + * LENGTH DECODE: + * 0000=1 beat (single transaction) + * 0001=2 beat + * ... + * 1111=16 beats + * + * AW32/AW64/AW128 formats are compatible + * AW16 format is a standalone format not compatible with any other + * All transactions are LSB aligned + * No return address for AW16 (point to point) + * + ******************************************************************************/ +module enoc_pack + #(parameter AW = 64, + parameter PW = 144) + ( + //Command Inputs + input [3:0] opcode_in, + input [3:0] length_in,//burst length(1-16) + input [2:0] size_in,//size of each transfer + input [7:3] user_in, //user control field + //Address/Data + input [AW-1:0] dstaddr_in, //destination address + input [AW-1:0] srcaddr_in, //source address (for reads) + input [2*AW-1:0] data_in, //data + //Output packet + output [PW-1:0] packet_out + ); + + //############################################ + // Command Field + //############################################ + wire [15:0] cmd_out; + + assign cmd_out[3:0] = opcode_in[3:0]; + assign cmd_out[7:4] = length_in[3:0]; + assign cmd_out[10:8] = size_in[2:0]; + assign cmd_out[15:11] = user_in[7:3]; + + //Decode (only write indicator needed) + enoc_decode enoc_decode (//Inputs + .cmd_in (cmd_out[15:0]), + // Outputs + .cmd_write (cmd_write), + .cmd_write_stop (), + .cmd_read (), + .cmd_atomic_add (), + .cmd_atomic_and (), + .cmd_atomic_or (), + .cmd_atomic_xor (), + .cmd_cas (), + .cmd_opcode (), + .cmd_length (), + .cmd_size (), + .cmd_user ()); + + generate + //############################ + // 16-Bit ("lite/apb like") + //############################ + if(AW==16) begin : aw16 + if(PW==40) begin : p40 + assign packet_out[7:0] = cmd_out[7:0]; + assign packet_out[23:8] = dstaddr_in[15:0]; + assign packet_out[39:24] = cmd_write ? data_in[15:0]: + srcaddr_in[15:0]; + end + else begin: perror + initial + $display ("Combo not supported (PW=%ds AW==%ds)", PW,AW); + end + end // block: aw16 + //###################### + // 32-Bit + //###################### + if(AW==32) begin : aw32 + if(PW==80) begin: p80 + assign packet_out[15:0] = cmd_out[15:0]; + assign packet_out[47:16] = dstaddr_in[31:0]; + assign packet_out[79:48] = cmd_write ? data_in[31:0] : + srcaddr_in[31:0]; + end + else if(PW==112) begin: p112 + assign packet_out[15:0] = cmd_out[15:0]; + assign packet_out[47:16] = dstaddr_in[31:0]; + assign packet_out[79:48] = cmd_write ? data_in[31:0] : + srcaddr_in[31:0]; + assign packet_out[111:80] = data_in[63:32]; + end + else begin: perror + initial + $display ("Combo not supported (PW=%ds AW==%ds)", PW,AW); + end + end // block: aw32 + //###################### + // 64-Bit + //###################### + if(AW==64) begin : aw64 + if(PW==144) begin: p144 + assign packet_out[15:0] = cmd_out[15:0]; + assign packet_out[47:16] = dstaddr_in[31:0]; + assign packet_out[111:48] = cmd_write ? data_in[63:0] : + srcaddr_in[63:0]; + assign packet_out[143:112] = dstaddr_in[63:32]; + end + else if(PW==208) begin: p208 + assign packet_out[15:0] = cmd_out[15:0]; + assign packet_out[47:16] = dstaddr_in[31:0]; + assign packet_out[111:48] = cmd_write ? data_in[63:0] : + srcaddr_in[63:0]; + assign packet_out[143:112] = dstaddr_in[63:32]; + assign packet_out[207:144] = data_in[127:64]; + end + else begin: perror + initial + $display ("Combo not supported (PW=%ds AW==%ds)", PW,AW); + end + end // block: aw64 + //###################### + // 128-Bit + //###################### + if(AW==128) begin : aw128 + if(PW==272) begin: p272 + assign packet_out[15:0] = cmd_out[15:0]; + assign packet_out[47:16] = dstaddr_in[31:0]; + assign packet_out[111:48] = cmd_write ? data_in[63:0] : + srcaddr_in[63:0]; + assign packet_out[143:112] = dstaddr_in[63:32]; + assign packet_out[207:144] = cmd_write ? data_in[127:64] : + srcaddr_in[127:64]; + assign packet_out[271:208] = dstaddr_in[127:64]; + end + else if(PW==400) begin: p400 + assign packet_out[15:0] = cmd_out[15:0]; + assign packet_out[47:16] = dstaddr_in[31:0]; + assign packet_out[111:48] = cmd_write ? data_in[63:0] : + srcaddr_in[63:0]; + assign packet_out[143:112] = dstaddr_in[63:32]; + assign packet_out[207:144] = cmd_write ? data_in[127:64] : + srcaddr_in[127:64]; + assign packet_out[271:208] = dstaddr_in[127:64]; + assign packet_out[399:272] = data_in[255:128]; + end + else begin: perror + initial + $display ("Combo not supported (PW=%ds AW==%ds)", PW,AW); + end + end // block: aw128 + endgenerate +endmodule // emesh2packet + diff --git a/enoc/hdl/enoc_unpack.v b/enoc/hdl/enoc_unpack.v new file mode 100644 index 0000000..7792d60 --- /dev/null +++ b/enoc/hdl/enoc_unpack.v @@ -0,0 +1,161 @@ +/******************************************************************************* + * Function: Packet-->Memory Mapped Transaction Converter + * Author: Andreas Olofsson + * License: MIT (see LICENSE file in OH! repository) + * + * Documentation: + * + * see ./enoc_pack.v for packet formatting + * + ******************************************************************************/ +module enoc_unpack + #(parameter AW = 32, // address width + parameter PW = 104) // packet width + ( + //Input packet + input [PW-1:0] packet_in, + //Write + output cmd_write,//start write + output cmd_write_stop,//stop burst + //Read + output cmd_read, + //Atomic read/write + output cmd_atomic_add, + output cmd_atomic_and, + output cmd_atomic_or, + output cmd_atomic_xor, + output cmd_cas, + //Command Fields + output [3:0] cmd_opcode,//raw opcode + output [3:0] cmd_length,//bust length(up to 16) + output [2:0] cmd_size,//size of each transfer + output [7:0] cmd_user, //user field + //Address/Data + output [AW-1:0] dstaddr, // read/write target address + output [AW-1:0] srcaddr, // read return address + output [2*AW-1:0] data // write data + ); + + wire [15:0] cmd; + + //############################################ + // Command Decode + //############################################ + + enoc_decode enoc_decode (//Input + .cmd_in (cmd[15:0]), + // Outputs + .cmd_write (cmd_write), + .cmd_write_stop (cmd_write_stop), + .cmd_read (cmd_read), + .cmd_cas (cmd_cas), + .cmd_atomic_add (cmd_atomic_add), + .cmd_atomic_and (cmd_atomic_and), + .cmd_atomic_or (cmd_atomic_or), + .cmd_atomic_xor (cmd_atomic_xor), + .cmd_opcode (cmd_opcode[3:0]), + .cmd_user (cmd_user[7:0]), + .cmd_length (cmd_length[3:0]), + .cmd_size (cmd_size[2:0])); + generate + //###################### + // 16-Bit ("lite/apb like") + //###################### + if(AW==16) begin : aw16 + if(PW==40) begin : p40 + assign cmd[7:0] = packet_in[7:0]; + assign cmd[15:8] = 8'b0; + assign dstaddr[15:0] = packet_in[23:8]; + assign srcaddr[15:0] = packet_in[39:24]; + assign data[31:0] = {16'b0,packet_in[39:24]}; + end + else begin: perror + initial + $display ("Combo not supported (PW=%ds AW==%ds)", PW,AW); + end + end // block: aw16 + //###################### + // 32-Bit + //###################### + if(AW==32) begin : aw32 + if(PW==80) begin: p80 + assign cmd[15:0] = packet_in[15:0]; + assign dstaddr[31:0] = packet_in[47:16]; + assign srcaddr[31:0] = packet_in[79:48]; + assign data[31:0] = packet_in[79:48]; + assign data[63:32] = 32'b0; + end + else if(PW==112) begin: p112 + assign cmd[15:0] = packet_in[15:0]; + assign dstaddr[31:0] = packet_in[47:16]; + assign srcaddr[31:0] = packet_in[79:48]; + assign data[63:0] = packet_in[111:48]; + end + else begin: perror + initial + $display ("Combo not supported (PW=%ds AW==%ds)", PW,AW); + end + end // block: aw32 + //###################### + // 64-Bit + //###################### + if(AW==64) begin : aw64 + if(PW==144) begin: p144 + assign cmd[15:0] = packet_in[15:0]; + assign dstaddr[31:0] = packet_in[47:16]; + assign srcaddr[63:0] = packet_in[111:48]; + assign data[127:0] = packet_in[111:48]; + assign dstaddr[63:32] = packet_in[143:112]; + assign data[127:64] = 64'b0; + end + else if(PW==208) begin: p208 + assign cmd[15:0] = packet_in[15:0]; + assign dstaddr[31:0] = packet_in[47:16]; + assign srcaddr[63:0] = packet_in[111:48]; + assign data[63:0] = packet_in[111:48]; + assign dstaddr[63:32] = packet_in[143:112]; + assign data[127:64] = packet_in[207:144]; + end + else begin: perror + initial + $display ("Combo not supported (PW=%ds AW==%ds)", PW,AW); + end + end // block: aw64 + //###################### + // 128-Bit + //###################### + if(AW==128) begin : aw128 + if(PW==272) begin: p272 + assign cmd[15:0] = packet_in[15:0]; + assign dstaddr[31:0] = packet_in[47:16]; + assign srcaddr[63:0] = packet_in[111:48]; + assign data[63:0] = packet_in[111:48]; + assign dstaddr[63:32] = packet_in[143:112]; + assign data[127:64] = packet_in[207:144]; + assign srcaddr[127:64] = packet_in[207:144]; + assign dstaddr[127:64] = packet_in[271:208]; + assign data[255:128] = 128'b0; + end + else if(PW==400) begin: p400 + assign cmd[15:0] = packet_in[15:0]; + assign dstaddr[31:0] = packet_in[47:16]; + assign srcaddr[63:0] = packet_in[111:48]; + assign data[63:0] = packet_in[111:48]; + assign dstaddr[63:32] = packet_in[143:112]; + assign data[127:64] = packet_in[207:144]; + assign srcaddr[127:64] = packet_in[207:144]; + assign dstaddr[127:64] = packet_in[271:208]; + assign data[255:128] = packet_in[399:272]; + end + else begin: perror + initial + $display ("Combo not supported (PW=%ds AW==%ds)", PW,AW); + end + end // block: aw128 + endgenerate + +endmodule // enoc_unpack + + + + diff --git a/src/etrace/README.md b/etrace/README.md similarity index 100% rename from src/etrace/README.md rename to etrace/README.md diff --git a/src/etrace/dv/dut_etrace.v b/etrace/dv/dut_etrace.v similarity index 100% rename from src/etrace/dv/dut_etrace.v rename to etrace/dv/dut_etrace.v diff --git a/src/etrace/dv/test/test_trace.memh b/etrace/dv/test/test_trace.memh similarity index 100% rename from src/etrace/dv/test/test_trace.memh rename to etrace/dv/test/test_trace.memh diff --git a/src/etrace/hdl/axi_etrace.v b/etrace/hdl/axi_etrace.v similarity index 100% rename from src/etrace/hdl/axi_etrace.v rename to etrace/hdl/axi_etrace.v diff --git a/src/etrace/hdl/etrace.v b/etrace/hdl/etrace.v similarity index 100% rename from src/etrace/hdl/etrace.v rename to etrace/hdl/etrace.v diff --git a/src/etrace/hdl/etrace_regmap.v b/etrace/hdl/etrace_regmap.v similarity index 100% rename from src/etrace/hdl/etrace_regmap.v rename to etrace/hdl/etrace_regmap.v diff --git a/src/etrace/hdl/etrace_regmap.vh b/etrace/hdl/etrace_regmap.vh similarity index 100% rename from src/etrace/hdl/etrace_regmap.vh rename to etrace/hdl/etrace_regmap.vh diff --git a/src/gpio/README.md b/gpio/README.md similarity index 100% rename from src/gpio/README.md rename to gpio/README.md diff --git a/src/gpio/driver/gpiolib/README.md b/gpio/driver/gpiolib/README.md similarity index 100% rename from src/gpio/driver/gpiolib/README.md rename to gpio/driver/gpiolib/README.md diff --git a/src/gpio/driver/gpiolib/gpio-epiphany.h b/gpio/driver/gpiolib/gpio-epiphany.h similarity index 100% rename from src/gpio/driver/gpiolib/gpio-epiphany.h rename to gpio/driver/gpiolib/gpio-epiphany.h diff --git a/src/gpio/driver/gpiolib/gpio-generic.h b/gpio/driver/gpiolib/gpio-generic.h similarity index 100% rename from src/gpio/driver/gpiolib/gpio-generic.h rename to gpio/driver/gpiolib/gpio-generic.h diff --git a/src/gpio/driver/gpiolib/gpio-simple.h b/gpio/driver/gpiolib/gpio-simple.h similarity index 100% rename from src/gpio/driver/gpiolib/gpio-simple.h rename to gpio/driver/gpiolib/gpio-simple.h diff --git a/src/gpio/driver/gpiolib/gpio.h b/gpio/driver/gpiolib/gpio.h similarity index 100% rename from src/gpio/driver/gpiolib/gpio.h rename to gpio/driver/gpiolib/gpio.h diff --git a/src/gpio/driver/gpiolib/gpio_example.c b/gpio/driver/gpiolib/gpio_example.c similarity index 100% rename from src/gpio/driver/gpiolib/gpio_example.c rename to gpio/driver/gpiolib/gpio_example.c diff --git a/src/gpio/driver/gpiolib/test.c b/gpio/driver/gpiolib/test.c similarity index 100% rename from src/gpio/driver/gpiolib/test.c rename to gpio/driver/gpiolib/test.c diff --git a/src/gpio/driver/linux/Documentation/devicetree/bindings/gpio/gpio-oh.txt b/gpio/driver/linux/Documentation/devicetree/bindings/gpio/gpio-oh.txt similarity index 100% rename from src/gpio/driver/linux/Documentation/devicetree/bindings/gpio/gpio-oh.txt rename to gpio/driver/linux/Documentation/devicetree/bindings/gpio/gpio-oh.txt diff --git a/src/gpio/driver/linux/Kbuild b/gpio/driver/linux/Kbuild similarity index 100% rename from src/gpio/driver/linux/Kbuild rename to gpio/driver/linux/Kbuild diff --git a/src/gpio/driver/linux/Makefile b/gpio/driver/linux/Makefile similarity index 100% rename from src/gpio/driver/linux/Makefile rename to gpio/driver/linux/Makefile diff --git a/src/gpio/driver/linux/README.md b/gpio/driver/linux/README.md similarity index 100% rename from src/gpio/driver/linux/README.md rename to gpio/driver/linux/README.md diff --git a/src/gpio/driver/linux/gpio-oh.c b/gpio/driver/linux/gpio-oh.c similarity index 100% rename from src/gpio/driver/linux/gpio-oh.c rename to gpio/driver/linux/gpio-oh.c diff --git a/src/gpio/dv/dut_gpio.v b/gpio/dv/dut_gpio.v similarity index 100% rename from src/gpio/dv/dut_gpio.v rename to gpio/dv/dut_gpio.v diff --git a/src/gpio/dv/tests/test_basic.emf b/gpio/dv/tests/test_basic.emf similarity index 100% rename from src/gpio/dv/tests/test_basic.emf rename to gpio/dv/tests/test_basic.emf diff --git a/src/accelerator/fpga/bit2bin.bif b/gpio/fpga/bit2bin.bif similarity index 100% rename from src/accelerator/fpga/bit2bin.bif rename to gpio/fpga/bit2bin.bif diff --git a/src/accelerator/fpga/build.sh b/gpio/fpga/build.sh similarity index 100% rename from src/accelerator/fpga/build.sh rename to gpio/fpga/build.sh diff --git a/src/accelerator/fpga/dummy.elf b/gpio/fpga/dummy.elf similarity index 100% rename from src/accelerator/fpga/dummy.elf rename to gpio/fpga/dummy.elf diff --git a/src/gpio/fpga/ip_params.tcl b/gpio/fpga/ip_params.tcl similarity index 100% rename from src/gpio/fpga/ip_params.tcl rename to gpio/fpga/ip_params.tcl diff --git a/src/accelerator/fpga/package.tcl b/gpio/fpga/package.tcl similarity index 100% rename from src/accelerator/fpga/package.tcl rename to gpio/fpga/package.tcl diff --git a/src/accelerator/fpga/run.tcl b/gpio/fpga/run.tcl similarity index 100% rename from src/accelerator/fpga/run.tcl rename to gpio/fpga/run.tcl diff --git a/src/gpio/fpga/run_params.tcl b/gpio/fpga/run_params.tcl similarity index 100% rename from src/gpio/fpga/run_params.tcl rename to gpio/fpga/run_params.tcl diff --git a/src/gpio/fpga/system_bd.tcl b/gpio/fpga/system_bd.tcl similarity index 100% rename from src/gpio/fpga/system_bd.tcl rename to gpio/fpga/system_bd.tcl diff --git a/src/gpio/fpga/system_params.tcl b/gpio/fpga/system_params.tcl similarity index 100% rename from src/gpio/fpga/system_params.tcl rename to gpio/fpga/system_params.tcl diff --git a/src/gpio/hdl/axi_gpio.v b/gpio/hdl/axi_gpio.v similarity index 100% rename from src/gpio/hdl/axi_gpio.v rename to gpio/hdl/axi_gpio.v diff --git a/src/gpio/hdl/gpio.v b/gpio/hdl/gpio.v similarity index 100% rename from src/gpio/hdl/gpio.v rename to gpio/hdl/gpio.v diff --git a/src/gpio/hdl/gpio_regmap.vh b/gpio/hdl/gpio_regmap.vh similarity index 100% rename from src/gpio/hdl/gpio_regmap.vh rename to gpio/hdl/gpio_regmap.vh diff --git a/src/gpio/hdl/parallella_gpio.v b/gpio/hdl/parallella_gpio.v similarity index 100% rename from src/gpio/hdl/parallella_gpio.v rename to gpio/hdl/parallella_gpio.v diff --git a/src/mio/README.md b/mio/README.md similarity index 100% rename from src/mio/README.md rename to mio/README.md diff --git a/src/mio/docs/c2c_waveform.png b/mio/docs/c2c_waveform.png similarity index 100% rename from src/mio/docs/c2c_waveform.png rename to mio/docs/c2c_waveform.png diff --git a/src/mio/driver/hello-mio/Makefile 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similarity index 100% rename from src/mio/driver/linux-uio/uio_pdrv_genirq.ko rename to mio/driver/linux-uio/uio_pdrv_genirq.ko diff --git a/src/mio/driver/linux-uio/zynq-parallella-oh-mio.dtb b/mio/driver/linux-uio/zynq-parallella-oh-mio.dtb similarity index 100% rename from src/mio/driver/linux-uio/zynq-parallella-oh-mio.dtb rename to mio/driver/linux-uio/zynq-parallella-oh-mio.dtb diff --git a/src/mio/driver/linux-uio/zynq-parallella-oh-mio.dts b/mio/driver/linux-uio/zynq-parallella-oh-mio.dts similarity index 100% rename from src/mio/driver/linux-uio/zynq-parallella-oh-mio.dts rename to mio/driver/linux-uio/zynq-parallella-oh-mio.dts diff --git a/src/mio/dv/dut_mio.v b/mio/dv/dut_mio.v similarity index 100% rename from src/mio/dv/dut_mio.v rename to mio/dv/dut_mio.v diff --git a/src/mio/dv/tests/test_basic.emf b/mio/dv/tests/test_basic.emf similarity index 100% rename from src/mio/dv/tests/test_basic.emf rename to mio/dv/tests/test_basic.emf diff --git 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src/parallella/fpga/headless_e16_z7020/system_params.tcl rename to parallella/fpga/headless_e16_z7020/system_params.tcl diff --git a/src/parallella/fpga/parallella_7020_io.xdc b/parallella/fpga/parallella_7020_io.xdc similarity index 100% rename from src/parallella/fpga/parallella_7020_io.xdc rename to parallella/fpga/parallella_7020_io.xdc diff --git a/src/parallella/fpga/parallella_accelerator/Makefile b/parallella/fpga/parallella_accelerator/Makefile similarity index 100% rename from src/parallella/fpga/parallella_accelerator/Makefile rename to parallella/fpga/parallella_accelerator/Makefile diff --git a/src/parallella/fpga/parallella_accelerator/build.sh b/parallella/fpga/parallella_accelerator/build.sh similarity index 100% rename from src/parallella/fpga/parallella_accelerator/build.sh rename to parallella/fpga/parallella_accelerator/build.sh diff --git a/src/parallella/fpga/parallella_accelerator/run.tcl b/parallella/fpga/parallella_accelerator/run.tcl similarity index 100% rename from src/parallella/fpga/parallella_accelerator/run.tcl rename to parallella/fpga/parallella_accelerator/run.tcl diff --git a/src/parallella/fpga/parallella_accelerator/system_params.tcl b/parallella/fpga/parallella_accelerator/system_params.tcl similarity index 100% rename from src/parallella/fpga/parallella_accelerator/system_params.tcl rename to parallella/fpga/parallella_accelerator/system_params.tcl diff --git a/src/parallella/fpga/parallella_base/Makefile b/parallella/fpga/parallella_base/Makefile similarity index 100% rename from src/parallella/fpga/parallella_base/Makefile rename to parallella/fpga/parallella_base/Makefile diff --git a/src/parallella/fpga/parallella_base/build.sh b/parallella/fpga/parallella_base/build.sh similarity index 100% rename from src/parallella/fpga/parallella_base/build.sh rename to parallella/fpga/parallella_base/build.sh diff --git a/src/parallella/fpga/parallella_base/run.tcl b/parallella/fpga/parallella_base/run.tcl similarity index 100% rename from src/parallella/fpga/parallella_base/run.tcl rename to parallella/fpga/parallella_base/run.tcl diff --git a/src/parallella/fpga/parallella_base/system_params.tcl b/parallella/fpga/parallella_base/system_params.tcl similarity index 100% rename from src/parallella/fpga/parallella_base/system_params.tcl rename to parallella/fpga/parallella_base/system_params.tcl diff --git a/src/parallella/fpga/parallella_io.xdc b/parallella/fpga/parallella_io.xdc similarity index 100% rename from src/parallella/fpga/parallella_io.xdc rename to parallella/fpga/parallella_io.xdc diff --git a/src/parallella/fpga/parallella_timing.xdc b/parallella/fpga/parallella_timing.xdc similarity index 100% rename from src/parallella/fpga/parallella_timing.xdc rename to parallella/fpga/parallella_timing.xdc diff --git a/src/parallella/fpga/sdr_fmcomms/build.sh b/parallella/fpga/sdr_fmcomms/build.sh similarity index 100% rename from src/parallella/fpga/sdr_fmcomms/build.sh rename to parallella/fpga/sdr_fmcomms/build.sh diff --git a/src/parallella/fpga/sdr_fmcomms/run.tcl b/parallella/fpga/sdr_fmcomms/run.tcl similarity index 100% rename from src/parallella/fpga/sdr_fmcomms/run.tcl rename to parallella/fpga/sdr_fmcomms/run.tcl diff --git a/src/parallella/fpga/sdr_fmcomms/system_bd.tcl b/parallella/fpga/sdr_fmcomms/system_bd.tcl similarity index 100% rename from src/parallella/fpga/sdr_fmcomms/system_bd.tcl rename to parallella/fpga/sdr_fmcomms/system_bd.tcl diff --git a/src/parallella/fpga/sdr_fmcomms/system_params.tcl b/parallella/fpga/sdr_fmcomms/system_params.tcl similarity index 100% rename from src/parallella/fpga/sdr_fmcomms/system_params.tcl rename to parallella/fpga/sdr_fmcomms/system_params.tcl diff --git a/src/parallella/hdl/parallella_base.v b/parallella/hdl/parallella_base.v similarity index 100% rename from src/parallella/hdl/parallella_base.v rename to parallella/hdl/parallella_base.v diff --git a/src/parallella/hdl/pgpio.v b/parallella/hdl/pgpio.v similarity index 100% rename from src/parallella/hdl/pgpio.v rename to parallella/hdl/pgpio.v diff --git a/src/parallella/hdl/pi2c.v b/parallella/hdl/pi2c.v similarity index 100% rename from src/parallella/hdl/pi2c.v rename to parallella/hdl/pi2c.v diff --git a/scripts/asm2elf b/scripts/asm2elf new file mode 100755 index 0000000..23f7dc7 --- /dev/null +++ b/scripts/asm2elf @@ -0,0 +1,87 @@ +#!/usr/bin/env python3 +############################################################################# +# asm2elf +# +# Uses gcc +# +# Simple utility for converting assembly to hex, example below: +# +# .globl _start +# _start: +# lui a0,0x1 +# +############################################################################# +import subprocess +import sys +import re +import os + +ARCH = sys.argv[1] +ASM = sys.argv[2] +ELF = sys.argv[3] + +############################################# +#SETUP + +LINKERSCRIPT="tmp.ld" + +if(ARCH=="rv32i"): + GCC="riscv64-unknown-elf-gcc -march=rv32i -mabi=ilp32" + GCCOPT=" -static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles" + OUTPUT="riscv" +else: + GCC="e-gcc" + GCCOPT=" -static -fvisibility=hidden -nostdlib -nostartfiles" + OUTPUT="epiphany" + +############################################# +#PRINT LINKER FILE +f=open("tmp.ld",'w') +f.write("OUTPUT_ARCH( \"" + OUTPUT + "\" )\n") +if(ARCH=="rv32i"): + f.write("""ENTRY(_start) + SECTIONS + { + . = 0x80000000; + .text.trap : { *(.text.trap) } + + . = 0x00000000; + .text.init : { *(.text.init) } + + . = ALIGN(0x1000); + .tohost : { *(.tohost) } + . = ALIGN(0x1000); + .text : { *(.text) } + . = ALIGN(0x1000); + .data : { *(.data) } + .data.string : { *(.data.string)} + .bss : { *(.bss) } + _end = .; + }""") +else: + f.write("""ENTRY(_start) + SECTIONS + { + . = 0x00000000; + .text.init : { *(.text.init) } + . = ALIGN(0x1000); + .tohost : { *(.tohost) } + . = ALIGN(0x1000); + .text : { *(.text) } + . = ALIGN(0x1000); + .data : { *(.data) } + .bss : { *(.bss) } + _end = .; + }""") +f.close() + +############################################# +#RUN GCC +CMD = GCC + GCCOPT + " -T" + LINKERSCRIPT + " -o " + ELF + " " + ASM +print(CMD) +os.system(CMD) + + + + + diff --git a/scripts/c2elf b/scripts/c2elf new file mode 100755 index 0000000..240cb54 --- /dev/null +++ b/scripts/c2elf @@ -0,0 +1,104 @@ +#!/usr/bin/env python3 +############################################################################# +# celf +# +# Uses gcc +# +# Simple utility for compiling c into an elf +# +# .globl _start +# _start: +# lui a0,0x1 +# +############################################################################# +import subprocess +import sys +import re +import os + +ARCH = sys.argv[1] +ASM = sys.argv[2] +ELF = sys.argv[3] + +############################################# +#SETUP + +LINKERSCRIPT="tmp.ld" + +if(ARCH=="rv32i"): + GCC="riscv64-unknown-elf-gcc -march=rv32i -mabi=ilp32" + GCCOPT=" -O2 -static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles" + OUTPUT="riscv" + OBJDUMP="riscv64-unknown-elf-objdump" +elif(ARCH=="rv32gc"): + GCC="riscv64-unknown-elf-gcc -O2 -march=rv32gc -mabi=ilp32" + GCCOPT=" -O2 -static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles" + OUTPUT="riscv" + OBJDUMP="riscv64-unknown-elf-objdump" +elif(ARCH=="rv64gc"): + GCC="riscv64-unknown-elf-gcc -O2 -march=rv64gc -mabi=lp64d" + GCCOPT=" -O2 -static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles" + OUTPUT="riscv" + OBJDUMP="riscv64-unknown-elf-objdump" +else: + GCC="e-gcc" + GCCOPT=" -O2 -static -fvisibility=hidden -nostdlib -nostartfiles" + OUTPUT="epiphany" + OBJDUMP="e-objdump" + +############################################# +#PRINT LINKER FILE +f=open("tmp.ld",'w') +f.write("OUTPUT_ARCH( \"" + OUTPUT + "\" )\n") +if(ARCH=="rv32i"): + f.write("""ENTRY(_start) + SECTIONS + { + . = 0x80000000; + .text.trap : { *(.text.trap) } + + . = 0x00000000; + .text.init : { *(.text.init) } + + . = ALIGN(0x1000); + .tohost : { *(.tohost) } + . = ALIGN(0x1000); + .text : { *(.text) } + . = ALIGN(0x1000); + .data : { *(.data) } + .data.string : { *(.data.string)} + .bss : { *(.bss) } + _end = .; + }""") +else: + f.write("""ENTRY(_start) + SECTIONS + { + . = 0x00000000; + .text.init : { *(.text.init) } + . = ALIGN(0x1000); + .tohost : { *(.tohost) } + . = ALIGN(0x1000); + .text : { *(.text) } + . = ALIGN(0x1000); + .data : { *(.data) } + .bss : { *(.bss) } + _end = .; + }""") +f.close() + +############################################# +#RUN GCC +CMD = GCC + GCCOPT + " -T" + LINKERSCRIPT + " -o " + ELF + " " + ASM +print(CMD) +os.system(CMD) +#RUN OBJDUMP +CMD = OBJDUMP+ " -d " + ELF + " > " + ELF + ".objdump" +print(CMD) +os.system(CMD) + + + + + + diff --git a/scripts/elf2hex b/scripts/elf2hex new file mode 100755 index 0000000..0fab49e --- /dev/null +++ b/scripts/elf2hex @@ -0,0 +1,36 @@ +#!/usr/bin/env python3 +############################################################################# +# elf2hex +# +# Arch: e (for epiphany) +# rv32i/rv64i/etc (for riscv) +# +############################################################################# +import os +import sys + +ARCH = sys.argv[1] +ELF = sys.argv[2] +HEX = sys.argv[3] + +############################################# +#SETUP +if(ARCH=="e"): + GCCROOT="e-" +else: + GCCROOT="riscv64-unknown-elf-" + +############################################## +#RUN OBJCOPY +CMD=GCCROOT + "objcopy -Overilog" + " " + ELF + " " + HEX +print(CMD) +os.system(CMD) +#RUN OBJDUMP +CMD=GCCROOT + "objdump -D" + " " + ELF + " > " + HEX + ".dump" +print(CMD) +os.system(CMD) + + + + + diff --git a/scripts/hex2hex b/scripts/hex2hex new file mode 100755 index 0000000..8776c5a --- /dev/null +++ b/scripts/hex2hex @@ -0,0 +1,51 @@ +#!/usr/bin/env python3 +############################################################################# +# hex2hex +# +# Script uses objcopy to dump a Verilog comptatible hex file +# +# The script assumes the hex file has max 16 byte entries per line +# +# Script also supports creating EMF transactions with one address per data +# +# Offset to remove from all hex addresses +# +############################################################################# +import sys +import re + +hexin = sys.argv[1] +hexout = sys.argv[2] +width = int(int(sys.argv[3])/8) #needed for both +offset = int(sys.argv[4],16) +emf = 0 # emf + +################################################### +# Read file into list and strip off trail junk +list = [line.rstrip(' \n') for line in open(hexin)] + +################################################### +# Loop through byte list and print to output file +fileout=open(hexout,"w") +for line in list: + if (~line.find('@')): #detects new memory section + address = int((int(line.replace('@','',1),16)-offset)/8) + if(emf): + print ("Not Implemented") + else: + fileout.write("@"+format(address, 'x')+"\n") + else: #write out data byte stream + bytes=line.split(' ') + length=len(bytes) + for i in range(0,(16-length)): # zero extend buffer for simplicity + bytes.append("00") + for i in range(0,16,width): + sublist=bytes[i:i+width] + sublist.reverse() + word="" + word=word.join(sublist) + if(emf): + print ("Not Implemented") + else : + fileout.write(word+"\n") +fileout.close() diff --git a/scripts/profile_spike.sh b/scripts/profile_spike.sh new file mode 100755 index 0000000..3c99534 --- /dev/null +++ b/scripts/profile_spike.sh @@ -0,0 +1,59 @@ +#!/bin/bash +#FUNCTIONS +echo -n "ret," ; grep "ret " $1 | wc -l +echo -n "jalr," ; grep "jalr " $1 | wc -l +echo -n "jal," ; grep "jal " $1 | wc -l +#BRANCHES +echo -n "beqz," ; grep "beqz " $1 | wc -l +echo -n "beq," ; grep "beq " $1 | wc -l +echo -n "bnez," ; grep "bnez " $1 | wc -l +echo -n "bne," ; grep "bne " $1 | wc -l +echo -n "bltu," ; grep "bltu " $1 | wc -l +echo -n "blt," ; grep "blt " $1 | wc -l +#MOV +echo -n "mv," ; grep "mv " $1 | wc -l +echo -n "li," ; grep "li " $1 | wc -l +echo -n "lui," ; grep "lui " $1 | wc -l +#INT +echo -n "add," ; grep "add " $1 | wc -l +echo -n "addw," ; grep "addw " $1 | wc -l +echo -n "sub," ; grep "sub " $1 | wc -l +echo -n "subw," ; grep "subw " $1 | wc -l +echo -n "addi," ; grep "addi " $1 | wc -l +echo -n "addiw," ; grep "addiw " $1 | wc -l +echo -n "or," ; grep " or " $1 | wc -l +echo -n "ori," ; grep " ori " $1 | wc -l +echo -n "and," ; grep " and " $1 | wc -l +echo -n "andi," ; grep " andi " $1 | wc -l +echo -n "xor," ; grep " xor " $1 | wc -l +echo -n "srli," ; grep "srli " $1 | wc -l +echo -n "slli," ; grep "slli " $1 | wc -l +#MUL +echo -n "mulw," ; grep "mulw " $1 | wc -l +echo -n "mul," ; grep "mul " $1 | wc -l +echo -n "mulu," ; grep "mulu " $1 | wc -l +#L/S +echo -n "lb," ; grep "lb " $1 | wc -l +echo -n "lbu," ; grep "lbu " $1 | wc -l +echo -n "lh," ; grep "lh " $1 | wc -l +echo -n "lhu," ; grep "lhu " $1 | wc -l +echo -n "ld," ; grep "ld " $1 | wc -l +echo -n "ldsp," ; grep "ldsp " $1 | wc -l +echo -n "sb," ; grep "sb " $1 | wc -l +echo -n "sbu," ; grep "sbu " $1 | wc -l +echo -n "sh," ; grep "sh " $1 | wc -l +echo -n "shu," ; grep "shu " $1 | wc -l +echo -n "sd," ; grep "sd " $1 | wc -l +echo -n "sdsp," ; grep "sdsp " $1 | wc -l +##FLOAT +echo -n "fmv," ; grep "fmv" $1 | wc -l +##TOTAL +echo -n "total" ; wc -l $1 + + + + + + + + diff --git a/scripts/trace2trace b/scripts/trace2trace new file mode 100755 index 0000000..2ff32d0 --- /dev/null +++ b/scripts/trace2trace @@ -0,0 +1,112 @@ +#!/usr/bin/env python3 +############################################################################# +# trace2trace +# +# Converts a simulator trace file to the epiphany trace format +# +# Formats: spike, cgen +# +############################################################################# +import re +import sys + +simulator="spike" +offset=0xffffffff00000000 + +#Input Arguments +with open(sys.argv[1], 'r') as f: + file_content = f.read() + +fileout=open(sys.argv[2],"w") + +#RISC-V ABI dictionary +regs={ + "zero":"r0", + "ra":"r1", + "sp":"r2", + "gp":"r3", + "tp":"r4", + "t0":"r5", + "t1":"r6", + "t2":"r7", + "s0":"r8", + "s1":"r9", + "a0":"r10", + "a1":"r11", + "a2":"r12", + "a3":"r13", + "a4":"r14", + "a5":"r15", + "a6":"r16", + "a7":"r17", + "s2":"r18", + "s3":"r19", + "s4":"r20", + "s5":"r21", + "s6":"r22", + "s7":"r23", + "s8":"r24", + "s9":"r25", + "s10":"r26", + "s11":"r27", + "t3":"r28", + "t4":"r29", + "t5":"r30", + "t6":"r31", + "mtvec":"mtvec", + "pmpaddr0":"pmpaddr0", + "pmpcfg0":"pmpcfg0", + "mstatus":"mstatus", + "mepc":"mepc", + "mcause":"mcause", +} + + +#Reading input file into buffer +if(simulator=="spike") : + trap=0 + list=file_content.split('core 0: ') #split based on core 0 + for i in list: + i=re.sub(r'\n', ' ', i) #combine lines + i=re.sub(r'x (\d{1})',r'x\1', i) #fix brain dead spike print for regs + i=re.sub(r'^0x0000000000001(.*)',r'', i) #remove spike boot rom + if(bool(re.search('trap_user_ecall',i))):#filter out everything after ecall + trap=1 + #filter empty instructions + if((bool(re.search('0x',i))) & (trap==0)): + fields=i.split() + pc=int(fields[0],16) + opcode=fields[1] + asm=fields[2] + #for j in fields: + # print (j) + if(re.search('0x',fields[-2])): + memaddr="--" + memdata="--" + reg="--" + regdata="--" + elif(re.search('mem',i)): + memaddr=fields[-2] + memdata=fields[-1] + reg="--" + regdata="--" + else: + reg="x{0:02}".format(int(re.sub(r'x',r'', fields[-2]))) + regdata=fields[-1] + memaddr="--" + memdata="--" + #Remove offsets + if(pc>=offset): + pc=pc-offset + #List of entires + flist=["0x{0:08x}".format(pc), + opcode, + "{:<8}".format(asm), + "{:<3}".format(reg), + "{:<10}".format(regdata), + "{:<10}".format(memaddr), + "{:<10}".format(memdata)] + outputstring=' , '.join(flist) + fileout.write(outputstring + "\n") +fileout.close() + diff --git a/setup.py b/setup.py new file mode 100644 index 0000000..73f3401 --- /dev/null +++ b/setup.py @@ -0,0 +1,16 @@ +from setuptools import setup + +setup( + name='vsim', + version='0.0.1', + description='Open Source Verilog Module Library', + url='https://github.com/aolofsson/oh', + author='Andreas Olofsson', + package_dir={'': 'src'}, + python_requires='>=3.7', + scripts=[], + packages=[ + 'vsim' + ], + license='Apache License 2.0', +) diff --git a/src/spi/README.md b/spi/README.md similarity index 100% rename from src/spi/README.md rename to spi/README.md diff --git a/src/spi/dv/dut_spi.v b/spi/dv/dut_spi.v similarity index 100% rename from src/spi/dv/dut_spi.v rename to spi/dv/dut_spi.v diff --git a/src/spi/dv/tests/test_basic.emf b/spi/dv/tests/test_basic.emf similarity index 100% rename from src/spi/dv/tests/test_basic.emf rename to spi/dv/tests/test_basic.emf diff --git a/src/spi/dv/tests/test_write.emf b/spi/dv/tests/test_write.emf similarity index 100% rename from src/spi/dv/tests/test_write.emf rename to spi/dv/tests/test_write.emf diff --git a/src/spi/fpga/axi_spi_timing.xdc b/spi/fpga/axi_spi_timing.xdc similarity index 100% rename from src/spi/fpga/axi_spi_timing.xdc rename to spi/fpga/axi_spi_timing.xdc diff --git a/src/parallella/fpga/headless_e16_z7020/bit2bin.bif b/spi/fpga/bit2bin.bif similarity index 100% rename from src/parallella/fpga/headless_e16_z7020/bit2bin.bif rename to spi/fpga/bit2bin.bif diff --git a/src/gpio/fpga/build.sh b/spi/fpga/build.sh similarity index 100% rename from src/gpio/fpga/build.sh rename to spi/fpga/build.sh diff --git a/src/spi/fpga/clean.sh b/spi/fpga/clean.sh similarity index 100% rename from src/spi/fpga/clean.sh rename to spi/fpga/clean.sh diff --git a/src/parallella/fpga/headless_e16_z7020/dummy.elf b/spi/fpga/dummy.elf similarity index 100% rename from src/parallella/fpga/headless_e16_z7020/dummy.elf rename to spi/fpga/dummy.elf diff --git a/src/spi/fpga/ip_params.tcl b/spi/fpga/ip_params.tcl similarity index 100% rename from src/spi/fpga/ip_params.tcl rename to spi/fpga/ip_params.tcl diff --git a/src/gpio/fpga/package.tcl b/spi/fpga/package.tcl similarity index 100% rename from src/gpio/fpga/package.tcl rename to spi/fpga/package.tcl diff --git a/src/gpio/fpga/run.tcl b/spi/fpga/run.tcl similarity index 100% rename from src/gpio/fpga/run.tcl rename to spi/fpga/run.tcl diff --git a/src/spi/fpga/run_params.tcl b/spi/fpga/run_params.tcl similarity index 100% rename from src/spi/fpga/run_params.tcl rename to spi/fpga/run_params.tcl diff --git a/src/spi/fpga/system_bd.tcl b/spi/fpga/system_bd.tcl similarity index 100% rename from src/spi/fpga/system_bd.tcl rename to spi/fpga/system_bd.tcl diff --git a/src/spi/fpga/system_params.tcl b/spi/fpga/system_params.tcl similarity index 100% rename from src/spi/fpga/system_params.tcl rename to spi/fpga/system_params.tcl diff --git a/src/spi/hdl/axi_spi.v b/spi/hdl/axi_spi.v similarity index 100% rename from src/spi/hdl/axi_spi.v rename to spi/hdl/axi_spi.v diff --git a/src/spi/hdl/parallella_spi.v b/spi/hdl/parallella_spi.v similarity index 100% rename from src/spi/hdl/parallella_spi.v rename to spi/hdl/parallella_spi.v diff --git a/src/spi/hdl/spi.v b/spi/hdl/spi.v similarity index 100% rename from src/spi/hdl/spi.v rename to spi/hdl/spi.v diff --git a/src/spi/hdl/spi_master.v b/spi/hdl/spi_master.v similarity index 100% rename from src/spi/hdl/spi_master.v rename to spi/hdl/spi_master.v diff --git a/src/spi/hdl/spi_master_fifo.v b/spi/hdl/spi_master_fifo.v similarity index 100% rename from src/spi/hdl/spi_master_fifo.v rename to spi/hdl/spi_master_fifo.v diff --git a/src/spi/hdl/spi_master_io.v b/spi/hdl/spi_master_io.v similarity index 100% rename from src/spi/hdl/spi_master_io.v rename to spi/hdl/spi_master_io.v diff --git a/src/spi/hdl/spi_master_regs.v b/spi/hdl/spi_master_regs.v similarity index 100% rename from src/spi/hdl/spi_master_regs.v rename to spi/hdl/spi_master_regs.v diff --git a/src/spi/hdl/spi_regmap.vh b/spi/hdl/spi_regmap.vh similarity index 100% rename from src/spi/hdl/spi_regmap.vh rename to spi/hdl/spi_regmap.vh diff --git a/src/spi/hdl/spi_slave.v b/spi/hdl/spi_slave.v similarity index 100% rename from src/spi/hdl/spi_slave.v rename to spi/hdl/spi_slave.v diff --git a/src/spi/hdl/spi_slave_io.v b/spi/hdl/spi_slave_io.v similarity index 100% rename from src/spi/hdl/spi_slave_io.v rename to spi/hdl/spi_slave_io.v diff --git a/src/spi/hdl/spi_slave_regs.v b/spi/hdl/spi_slave_regs.v similarity index 100% rename from src/spi/hdl/spi_slave_regs.v rename to spi/hdl/spi_slave_regs.v diff --git a/src/accelerator/README.md b/src/accelerator/README.md deleted file mode 100644 index 2de1ca0..0000000 --- a/src/accelerator/README.md +++ /dev/null @@ -1,33 +0,0 @@ -ACCELERATOR -======= - -A simple toy example designed to help get folks up to speed on FPGA and verilog design on the Parallella platform. This is an unoptimized "hello world" type AXI slave design. Optimization is left as an exercise to the reader. - -## Build Instructions (on your regular machine) - -```sh -git clone https://github.com/parallella/oh # clone repo -cd accelerator/dv -./build.sh # build -./run.sh tests/hello.emf # load data -gtkwave waveform.vcd # view waveform -emacs ../hdl/accelerator.v # "put code here" -cd ../fpga -./build.sh # build bitstream -sudo cp parallella.bit.bin /media/$user/boot # burn bitstream onto SD card on laptop/desktop -sync # sync and insert SD card in parallella -``` - -## Testing Instructions (on Parallella) -```sh -git clone https://github.com/parallella/oh # clone repo -cd accelerator/sw -emacs test.c # change numbers to test -gcc driver.c test.c -o hello.elf # compile for ARM -./hello.elf # run program -``` - - - - - diff --git a/src/accelerator/docs/backup b/src/accelerator/docs/backup deleted file mode 100644 index 09dd3b8..0000000 --- a/src/accelerator/docs/backup +++ /dev/null @@ -1,114 +0,0 @@ ----- ---- -name: Creating an FPGA accelerator in 15 min - ----- #Title ---- -background-image: /images/parallella_front_slant.png ----- - -## Creating an FPGA accelerator in 15 min! -Andreas Olofsson, 1/21/2016 -(Presented at ANL FPGA Workshop) - ----- #parallella-introduction ---- -background-image: /images/parallella_front_slant.png - -## Kickstarting Parallel Computing -* Parallella: "Supercomputing for everyone" -* 18 CPU cores on a credit card and @ 5W -* Democratizes access to parallel computing -* $898K raised on Kickstarter in Oct 2012 -* Open source and open access -* Starting at $99 -* Now generally available at Amazon & Digi-Key - ----- #parallella-specs ---- - -## Parallella Specs (http://parallella.org) - -| | | -|---------------------- |:----------------------:| -| Performance | ~30 GFLOPS | -| Architecture | ARM + FPGA + MANYCORE | -| Memory | 1GB DDR3 | -| IO | ~25 Gb/s (48 GPIO) | -| Size | credit-card | -| Power | <5W | -| Cost | $99 -> $249 | - ----- #Software ---- - -## "Hello World" in Software - -1. **CODE:** main() { printf("Hello World\n");} -2. **COMPILE:** gcc hello.c -3. **TEST** ./a.out -3. **DEBUG** printf, gdb - ----- #Hardware ---- - -## "Hello World" in Hardware - -1. **CODE:** Verilog/VHDL source -2. **CODE MORE:** Verilog/SystemC testbench -3. **TEST:** VCS/NC/Icarus/Verilator -4. **DEBUG:** Waveform debugging -5. **SYNTHESIZE:** HDL-->NETLIST-->POLYGONS -6. **BURN:** FPGA/ASIC -7. **TEST MORE:** Pray that it works... - ----- #Comparison ---- - -## Hardwave vs Software -| | SW | HW | -|---------------- |:----------:|:---------------:| -| Compile Time | seconds | minutes/months | -| Libraries | lots | little | -| Debugging | "easy" | an art | -| Cost of mistake | low | VERY HIGH!!!! | - ----- #Resources ---- - -## Resources - -* Tutorial: http://github.com/parallella/oh/accelerator -* OH! Library: http://github.com/parallella/oh) -* Forum: http://forums.parallella.org - ----- #start ---- - -## Let's create "hello world" for FPGAs - -```verilog -assign result[31:0]=input0[31:0]*input1[31:0]; -``` - -## Now what???? - ----- #Steps ---- - -## What's missing -1. Control code -2. Interfaces -3. Test environment -4. Synthesis scripts (non trivial) -5. Drivers (software) - ----- #Files ---- - -## Files to Review - -1. **Code:** hdl/{accelerator.v,axi_accelerator.v} -2. **Testbench:** dv/{dut_axi_accelerator.v,build.sh,run.sh} -3. **Synthesis:** fpga/{package.tcl, run.tcl} -4. **Drivers:** sw/accelerator_demo.c - - ----- #Conclusions ---- - -## Conclusions - -1. You can build an FPGA accelerator in 15 minutes! -2. Library based design key to hardware productivity -3. Stay away from vendor proprietary tools -4. Keep it simple**Drivers:** sw/accelerator_demo.c - diff --git a/src/accelerator/docs/fpga_tutorial.md b/src/accelerator/docs/fpga_tutorial.md deleted file mode 100644 index 7c0e31b..0000000 --- a/src/accelerator/docs/fpga_tutorial.md +++ /dev/null @@ -1,177 +0,0 @@ ----- ---- -name: Creating an FPGA accelerator in 15 min - ----- #Title ---- -background-image: /images/parallella_front_slant.png ----- - -## Creating an FPGA accelerator in 15 min! -Andreas Olofsson, Adapteva & Parallella Founder -(Presented at ANL FPGA Workshop) - ----- #parallella-introduction ---- -background-image: /images/parallella_front_slant.png - -## Kickstarting Parallel Computing -* Parallella: "Supercomputing for everyone" -* 18 CPU cores + FPGA on a credit card (5W) -* Democratizes access to parallel computing -* $898K raised on Kickstarter in Oct 2012 -* Open source and open access -* Starting at $99 -* Available at Amazon & Digi-Key - ----- #parallella-specs ---- - -## Parallella Specs (http://parallella.org) - -| | | -|---------------------- |:----------------------:| -| Performance | ~30 GFLOPS | -| Architecture | ARM + FPGA + MANYCORE | -| Memory | 1GB DDR3 | -| IO | ~25 Gb/s (48 GPIO) | -| Size | credit-card | -| Power | <5W | -| Cost | $99 -> $249 | - ----- #Software ---- - -## "Hello World" in Software - -1. **CODE:** main() { printf("Hello World\n");} -2. **COMPILE:** gcc hello.c -3. **TEST:** ./a.out -3. **DEBUG:** printf, gdb - ----- #Hardware ---- - -## "Hello World" in Hardware - -1. **CODE:** Verilog/VHDL source -2. **CODE MORE:** Verilog/SystemC testbench -3. **TEST:** VCS/NC/Icarus/Verilator -4. **DEBUG:** Waveform debugging -5. **SYNTHESIZE:** HDL-->NETLIST-->POLYGONS -6. **BURN:** FPGA/ASIC -7. **TEST MORE:** Pray that it works... - ----- #Comparison ---- - -## Hardware vs Software -| | SW | HW | -|---------------- |:----------:|:---------------:| -| Compile Time | seconds | minutes/months | -| Libraries | lots | little | -| Debugging | "easy" | an art | -| Cost of mistake | low | VERY HIGH!!!! | - ----- #start ---- - -## Let's start..."hello world" - -```verilog -assign result[31:0]=input0[31:0]+input1[31:0]; -``` - -> Now what?? - ----- #Steps ---- - -## What's missing -1. Control code -2. Host/Accelerator Hardware interfaces -3. Test environment -4. Synthesis scripts (non trivial) -5. Drivers (software) - -> How many man-years is that? - ----- #OH ---- - -## OH! (Open Hardware Library) - -* Verilog -* MIT license -* ~15K lines of code so far -* Best practices based on 20 years of chip design -* Silicon proven building blocks -* **Small:** FIFOs, synchronizers, muxes, arbiters, etc -* **Big:** chip to chip link, mailboxes, memory translators -* http://github.com/parallella/oh -* Yes, we do accept pull requests! - - - ----- #DEMO ---- -background-image: /images/parallella_front_slant.png - -## DEMO - ----- #Summary ---- - -## Accelerator Case Study - -1. **Coding:** 2hrs -2. **Simulate/Debug:** 2hrs -3. **Synthesize:** 2hrs -4. **Debug 1st "Bus Error":** 1hr -5. **Debug 2nd "Bus Error":** 2hrs - -> 9hrs to put together something that takes 30 seconds in C! - ----- #Files ---- - -## Files Used - -SOURCES: http://github.com/parallella/oh - -1. **Code:** hdl/{accelerator.v,axi_accelerator.v} -2. **Testbench:** dv/{dut_axi_accelerator.v,build.sh,run.sh} -3. **Synthesis:** fpga/{package.tcl, run.tcl} -4. **Drivers:** sw/{driver.c,test.c} - ----- #How-To ---- - -## How to Verify, Modify, and Burn - -```sh -$ cd accelerator/dv -$ ./build.sh # build -$ ./run.sh tests/hello.emf # load data -$ gtkwave waveform.vcd # view waveform -$ emacs ../hdl/accelerator.v # "put code here" -$ cd ../fpga -$ ./build.sh # build bitstream -$ sudo cp parallella.bit.bin /media/$user/boot -$ sync #Insert SD card in parallella -``` - ----- #Conclusions ---- - -## Conclusions - -1. Yes, today you CAN build an FPGA accelerator in 15 min -2. Anything new is still 100x more expensive to develop than SW -3. Develop for FPGAs, but keep ASIC option open - -> ...to make FPGA universally viable we need to catch up with >>$trillion investment in software infrastructure - -**Email:** andreas@adapteva.com -**Twitter:** @adapteva - - - - - - - - - - - - - - - - diff --git a/src/accelerator/docs/fpga_tutorial.pdf b/src/accelerator/docs/fpga_tutorial.pdf deleted file mode 100644 index 9a4819e..0000000 Binary files a/src/accelerator/docs/fpga_tutorial.pdf and /dev/null differ diff --git a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/.npmignore b/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/.npmignore deleted file mode 100644 index 5a350fe..0000000 --- a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/.npmignore +++ /dev/null @@ -1,22 +0,0 @@ -env -out -*.html -*.png -*.rdb -*.seed -*.log -*.csv -*.dat -*.out -*.pid -*.swp -*.swo -*.sock -support -test -examples -example -dist -coverage -.DS_Store -Thumbs.db diff --git a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/LICENSE b/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/LICENSE deleted file mode 100644 index bd71551..0000000 --- a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/LICENSE +++ /dev/null @@ -1,22 +0,0 @@ -(The MIT License) - -Copyright (c) 2015 Jürgen Leschner -- github.com/jldec - -Permission is hereby granted, free of charge, to any person obtaining -a copy of this software and associated documentation files (the -'Software'), to deal in the Software without restriction, including -without limitation the rights to use, copy, modify, merge, publish, -distribute, sublicense, and/or sell copies of the Software, and to -permit persons to whom the Software is furnished to do so, subject to -the following conditions: - -The above copyright notice and this permission notice shall be -included in all copies or substantial portions of the Software. - -THE SOFTWARE IS PROVIDED 'AS IS', WITHOUT WARRANTY OF ANY KIND, -EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF -MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. -IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY -CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, -TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE -SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. \ No newline at end of file diff --git a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/README.md b/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/README.md deleted file mode 100644 index 461e2e3..0000000 --- a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/README.md +++ /dev/null @@ -1,131 +0,0 @@ -# pub-theme-shower-ribbon -The [shower](https://github.com/shower/shower) theme for -[pub-server](https://github.com/jldec/pub-server) makes it easy to create -HTML presentations using markdown. - -Edit the markdown in any text editor and use the watch feature of pub-server to auto-update a browser preview the file is saved. - -When you are ready to publish, run `pub -O` to generate a set of html output and other static files. - -The screenshot below shows the built-in pub-server editor (which still has a few quirks). -![](images/shower-screen.png) - -### tl;dr -The quickest way to start writing your own presentations using this theme is to clone the [pub-sample-deck](https://github.com/jldec/pub-server) repo from github. - -This will also install pub-server in the same directory. - -```sh -git clone https://github.com/jldec/pub-sample-deck.git -cd pub-sample-deck -npm install -``` - - -#### If you have installed pub-server globally first - -```sh -npm install -g pub-server -``` -Create your `presentation.md` in a new directory, then: - -```sh -npm install pub-theme-shower-ribbon -pub -m -t pub-theme-shower-ribbon -``` - -- `-m`: interprets markdown headings as fragments -- `-t shower-ribbon` loads pub-theme-shower-ribbon if you have npm installed it. - - -Now open your browser on http://localhost:3001/ - - -### markdown -- a sample presentation is included in the [example](example) folder. -- The heading at the very top the file becomes the name of the presentation -- The second heading is interpreted as a cover slide if it is followed by `![](image)` -- A slide with no text (slide 2 below) will be rendered with *shout* style (large centered text) - - -```markdown -# Example Presentation -Byline - -## Title -![](/images/ice.jpg) -Use the nav menu to switch between presentations - -## Slide 1: quote - -> The overwhelming majority of theories are rejected -because they contain bad explanations, not because they -fail experimental tests. - -david deutsch - -## Slide 2: No text - -## Slide 3: Lists - -1. with with with with with with with - - words words - - words words - - words words - - words words -- nice nice nice nice nice nice - -## Slide 4: Table - -| col1 | col2 | col3 header | -| ------ | ------ | --------------: | -| abc | def | right aligned | -| abc | def | right aligned | -| abc | def | right aligned | -``` - - -### sample `pub-config.js` configuration - -Instead of command line parameters, you can use pub-config.js to configure -the theme, and say a source of images e.g. for the cover - -By providing a value for `injectCss` you can inject an additional stylesheet. - -```js -var opts = module.exports = { - - pkgs: ['pub-theme-shower-ribbon', 'pub-pkg-seo'], - - sources: [ - { - path:'./markdown', - glob:'**/*.md', - fragmentDelim:'md-headings', // pub -m, required for this theme - writable:true - } - ], - - staticPaths: [ './static' ], - - // link for github badge - github: 'https://github.com/jldec/pub-theme-shower-ribbon', - - // path to extra stylesheet - injectCss: '/css/extra.css', - - // don't forget photo credit - photoCredit: 'Cover Photo by Jurgen Leschner, github.com/jldec', - - // copyright comment - copyright: 'Copyright © 2015 Hard Working Person', - - // ask search engines not to crawl this site (depends on pub-pkg-seo) - noRobots:true -} -``` - - -### credits -- [Vadim Makeev](https://github.com/pepelsbey): - [Shower HTML presentation engine ](https://github.com/shower/shower) diff --git a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/css/pub-theme-shower-ribbon.css b/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/css/pub-theme-shower-ribbon.css deleted file mode 100644 index 6a9e49e..0000000 --- a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/css/pub-theme-shower-ribbon.css +++ /dev/null @@ -1,104 +0,0 @@ -/* shower customizations */ - - -/* make bold text bolder */ -.slide strong {font-weight:800;} - -/* don't go crazy with whitespace after a p */ -.slide p { margin: 0 0 25px; } - - -/* headings */ - -.slide h1, -.slide h2, -.slide h3, -.slide h4, -.slide h5 { - color: #666; - font-weight: 700; - font-family: 'PT Sans Narrow', sans-serif; -} - -.slide h1 { - font-size: 65px; - margin: 0 0 40px; -} - -.slide h2 { - font-size: 50px; - margin: 0 0 35px; -} - -.slide h3 { - font-size: 45px; - margin: 0 0 20px; -} - -.slide h4 { - font-size: 40px; - margin: 0; -} - -.slide h5 { - font-size: 35px; - margin: 0; -} - - -/* background images */ - -.slide img[full] { - position: absolute; - top: 0; - left: 0; - z-index: -1; - width:1024px; -} - -.slide.background-image, -.slide.background-image h1, -.slide.background-image h2, -.slide.background-image h3, -.slide.background-image h4, -.slide.background-image h5 -{ - color: #fff; -} - -.slide.background-image > div > div { - background-color: rgba(0, 0, 0, 0.3); - margin: 0 -5em; - padding: 0 5em; -} - -.slide { - z-index: 1; -} - - -/* inline images */ -.slide img[align=right] { margin-left:1em; } -.slide img[align=left] { margin-right:2em; } - -/* nav button */ -#nav > ul { position:fixed; left:15px; top:15px; z-index:100; } -#nav > ul > li { height:34px; text-align:center; line-height:0.9; padding:4px 12px; color:#444; font-size:1.4em; background-color:#999; cursor:pointer; } -#nav > ul > li:hover { color:#fff; opacity:1; } -#nav > ul > li > ul { position:absolute; top:40px; left:-1000px; background-color:#ddd; text-align:left; padding-bottom:20px; z-index:200; } -#nav > ul:hover > li > ul { left:0px; } -#nav a { display:block; line-height:1.6; padding:0 20px 0 8px; font-size:20px; text-decoration:none; background:none; white-space:nowrap; } -#nav a:hover { color:#eee; background-color:#777; } -.full #nav > ul > li { opacity:0.2; } -.full #nav > ul > li:hover { opacity:1; } - -/* fixes a problem with clipped edit button when there are not many slides */ -@media screen { -.list { clip:auto; } -} - -/* don't print the buttons */ -@media print { - #nav { display:none; } - .pub-button { display:none; } -} diff --git a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-core/License.md b/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-core/License.md deleted file mode 100644 index 0b07174..0000000 --- a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-core/License.md +++ /dev/null @@ -1,21 +0,0 @@ -# The MIT License - -Copyright © 2010–2014 Vadim Makeev, http://pepelsbey.net/ - -Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: - -The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software. - -THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - ---- - -# Лицензия MIT - -Copyright © 2010–2014 Вадим Макеев, http://pepelsbey.net/ - -Данная лицензия разрешает лицам, получившим копию данного программного обеспечения и сопутствующей документации (в дальнейшем именуемыми «Программное Обеспечение»), безвозмездно использовать Программное Обеспечение без ограничений, включая неограниченное право на использование, копирование, изменение, добавление, публикацию, распространение, сублицензирование и/или продажу копий Программного Обеспечения, также как и лицам, которым предоставляется данное Программное Обеспечение, при соблюдении следующих условий: - -Указанное выше уведомление об авторском праве и данные условия должны быть включены во все копии или значимые части данного Программного Обеспечения. - -ДАННОЕ ПРОГРАММНОЕ ОБЕСПЕЧЕНИЕ ПРЕДОСТАВЛЯЕТСЯ «КАК ЕСТЬ», БЕЗ КАКИХ-ЛИБО ГАРАНТИЙ, ЯВНО ВЫРАЖЕННЫХ ИЛИ ПОДРАЗУМЕВАЕМЫХ, ВКЛЮЧАЯ, НО НЕ ОГРАНИЧИВАЯСЬ ГАРАНТИЯМИ ТОВАРНОЙ ПРИГОДНОСТИ, СООТВЕТСТВИЯ ПО ЕГО КОНКРЕТНОМУ НАЗНАЧЕНИЮ И ОТСУТСТВИЯ НАРУШЕНИЙ ПРАВ. НИ В КАКОМ СЛУЧАЕ АВТОРЫ ИЛИ ПРАВООБЛАДАТЕЛИ НЕ НЕСУТ ОТВЕТСТВЕННОСТИ ПО ИСКАМ О ВОЗМЕЩЕНИИ УЩЕРБА, УБЫТКОВ ИЛИ ДРУГИХ ТРЕБОВАНИЙ ПО ДЕЙСТВУЮЩИМ КОНТРАКТАМ, ДЕЛИКТАМ ИЛИ ИНОМУ, ВОЗНИКШИМ ИЗ, ИМЕЮЩИМ ПРИЧИНОЙ ИЛИ СВЯЗАННЫМ С ПРОГРАММНЫМ ОБЕСПЕЧЕНИЕМ ИЛИ ИСПОЛЬЗОВАНИЕМ ПРОГРАММНОГО ОБЕСПЕЧЕНИЯ ИЛИ ИНЫМИ ДЕЙСТВИЯМИ С ПРОГРАММНЫМ ОБЕСПЕЧЕНИЕМ. \ No newline at end of file diff --git a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-core/Readme.md b/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-core/Readme.md deleted file mode 100644 index 858a008..0000000 --- a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-core/Readme.md +++ /dev/null @@ -1,15 +0,0 @@ -# Core for Shower [![Build Status](https://travis-ci.org/shower/core.svg?branch=master)](https://travis-ci.org/shower/core) - -Follow [@shower_me](https://twitter.com/shower_me) for support and updates - -To see Shower in action: - -- Open [shwr.me](http://shwr.me/) -- Click any slide to enter presentation mode -- Use arrow keys or presenter remote to navigate -- Press `Esc` to exit presentation mode - -Part of [Shower presentation template](https://github.com/shower/shower/). See [Wiki](https://github.com/shower/shower/wiki) for more information how to use Shower. - ---- -Licensed under [MIT License](http://en.wikipedia.org/wiki/MIT_License), see [license page](https://github.com/shower/shower/wiki/MIT-License) for details. diff --git a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-core/package.json b/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-core/package.json deleted file mode 100644 index 2ad11f5..0000000 --- a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-core/package.json +++ /dev/null @@ -1,63 +0,0 @@ -{ - "name": "shower-core", - "description": "Core for Shower HTML presentation engine", - "version": "1.0.7", - "author": { - "name": "Vadim Makeev", - "url": "http://pepelsbey.com/" - }, - "homepage": "https://github.com/shower/core", - "repository": { - "type": "git", - "url": "git://github.com/shower/core.git" - }, - "bugs": { - "url": "http://github.com/shower/shower/issues" - }, - "licenses": [ - { - "type": "MIT", - "url": "https://github.com/shower/shower/wiki/MIT-License" - } - ], - "keywords": [ - "shower", - "presentation", - "core" - ], - "devDependencies": { - "grunt": "^0.4.5", - "grunt-bump": "^0.0.15", - "grunt-casperjs": "2.0.1", - "grunt-contrib-connect": "^0.8.0", - "grunt-contrib-uglify": "^0.5.1", - "grunt-contrib-watch": "^0.6.1", - "grunt-jscs": "^0.7.1", - "load-grunt-tasks": "^0.6.0" - }, - "scripts": { - "test": "node -e \"require('grunt').tasks(['test'])\"" - }, - "gitHead": "aa8a6bfc36d8808a47e9b44f915bda13200426ff", - "_id": "shower-core@1.0.7", - "_shasum": "f488c7685cc657cb87420bd5e9064beccc75c0f9", - "_from": "shower-core@>=1.0.7 <2.0.0", - "_npmVersion": "1.4.27", - "_npmUser": { - "name": "pepelsbey", - "email": "pepelsbey@gmail.com" - }, - "maintainers": [ - { - "name": "pepelsbey", - "email": "pepelsbey@gmail.com" - } - ], - "dist": { - "shasum": "f488c7685cc657cb87420bd5e9064beccc75c0f9", - "tarball": "http://registry.npmjs.org/shower-core/-/shower-core-1.0.7.tgz" - }, - "directories": {}, - "_resolved": "https://registry.npmjs.org/shower-core/-/shower-core-1.0.7.tgz", - "readme": "ERROR: No README data found!" -} diff --git a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-core/shower.min.js b/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-core/shower.min.js deleted file mode 100644 index cdb4082..0000000 --- a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-core/shower.min.js +++ /dev/null @@ -1,7 +0,0 @@ -/** - * Core for Shower HTML presentation engine - * shower-core v1.0.6, https://github.com/shower/core - * @copyright 2010–2014 Vadim Makeev, http://pepelsbey.net - * @license MIT license: github.com/shower/shower/wiki/MIT-License - */ -window.shower&&window.shower.init||(window.shower=function(a,b){function c(a){for(var b in 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\ No newline at end of file diff --git a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/License.md b/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/License.md deleted file mode 100644 index 0b07174..0000000 --- a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/License.md +++ /dev/null @@ -1,21 +0,0 @@ -# The MIT License - -Copyright © 2010–2014 Vadim Makeev, http://pepelsbey.net/ - -Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: - -The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software. - -THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - ---- - -# Лицензия MIT - -Copyright © 2010–2014 Вадим Макеев, http://pepelsbey.net/ - -Данная лицензия разрешает лицам, получившим копию данного программного обеспечения и сопутствующей документации (в дальнейшем именуемыми «Программное Обеспечение»), безвозмездно использовать Программное Обеспечение без ограничений, включая неограниченное право на использование, копирование, изменение, добавление, публикацию, распространение, сублицензирование и/или продажу копий Программного Обеспечения, также как и лицам, которым предоставляется данное Программное Обеспечение, при соблюдении следующих условий: - -Указанное выше уведомление об авторском праве и данные условия должны быть включены во все копии или значимые части данного Программного Обеспечения. - -ДАННОЕ ПРОГРАММНОЕ ОБЕСПЕЧЕНИЕ ПРЕДОСТАВЛЯЕТСЯ «КАК ЕСТЬ», БЕЗ КАКИХ-ЛИБО ГАРАНТИЙ, ЯВНО ВЫРАЖЕННЫХ ИЛИ ПОДРАЗУМЕВАЕМЫХ, ВКЛЮЧАЯ, НО НЕ ОГРАНИЧИВАЯСЬ ГАРАНТИЯМИ ТОВАРНОЙ ПРИГОДНОСТИ, СООТВЕТСТВИЯ ПО ЕГО КОНКРЕТНОМУ НАЗНАЧЕНИЮ И ОТСУТСТВИЯ НАРУШЕНИЙ ПРАВ. НИ В КАКОМ СЛУЧАЕ АВТОРЫ ИЛИ ПРАВООБЛАДАТЕЛИ НЕ НЕСУТ ОТВЕТСТВЕННОСТИ ПО ИСКАМ О ВОЗМЕЩЕНИИ УЩЕРБА, УБЫТКОВ ИЛИ ДРУГИХ ТРЕБОВАНИЙ ПО ДЕЙСТВУЮЩИМ КОНТРАКТАМ, ДЕЛИКТАМ ИЛИ ИНОМУ, ВОЗНИКШИМ ИЗ, ИМЕЮЩИМ ПРИЧИНОЙ ИЛИ СВЯЗАННЫМ С ПРОГРАММНЫМ ОБЕСПЕЧЕНИЕМ ИЛИ ИСПОЛЬЗОВАНИЕМ ПРОГРАММНОГО ОБЕСПЕЧЕНИЯ ИЛИ ИНЫМИ ДЕЙСТВИЯМИ С ПРОГРАММНЫМ ОБЕСПЕЧЕНИЕМ. \ No newline at end of file diff --git a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/Readme.md b/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/Readme.md deleted file mode 100644 index 233d9c3..0000000 --- a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/Readme.md +++ /dev/null @@ -1,15 +0,0 @@ -# Ribbon theme for Shower - -Follow [@shower_me](https://twitter.com/shower_me) for support and updates - -To see Ribbon theme for Shower in action: - -- Open [shwr.me/shower/themes/ribbon](http://shwr.me/shower/themes/ribbon/) -- Click any slide to enter presentation mode -- Use arrow keys or presenter remote to navigate -- Press `Esc` to exit presentation mode - -Part of [Shower presentation template](https://github.com/shower/shower/). See [Wiki](https://github.com/shower/shower/wiki) for more information how to use Shower. - ---- -Licensed under [MIT License](http://en.wikipedia.org/wiki/MIT_License), see [license page](https://github.com/shower/shower/wiki/MIT-License) for details. \ No newline at end of file diff --git a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/fonts/PTMono.woff b/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/fonts/PTMono.woff deleted file mode 100644 index ade058c..0000000 Binary files a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/fonts/PTMono.woff and /dev/null differ diff --git a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/fonts/PTSans.Bold.Italic.woff b/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/fonts/PTSans.Bold.Italic.woff deleted file mode 100644 index 5390075..0000000 Binary files a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/fonts/PTSans.Bold.Italic.woff and /dev/null differ diff --git a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/fonts/PTSans.Bold.woff b/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/fonts/PTSans.Bold.woff deleted file mode 100644 index 1546b17..0000000 Binary files a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/fonts/PTSans.Bold.woff and /dev/null differ diff --git a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/fonts/PTSans.Italic.woff b/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/fonts/PTSans.Italic.woff deleted file mode 100644 index 7c015d8..0000000 Binary files a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/fonts/PTSans.Italic.woff and /dev/null differ diff --git a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/fonts/PTSans.Narrow.Bold.woff b/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/fonts/PTSans.Narrow.Bold.woff deleted file mode 100644 index 33fb3c6..0000000 Binary files a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/fonts/PTSans.Narrow.Bold.woff and /dev/null differ diff --git a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/fonts/PTSans.woff b/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/fonts/PTSans.woff deleted file mode 100644 index 9d00ff5..0000000 Binary files a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/fonts/PTSans.woff and /dev/null differ diff --git a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/images/grid-16x10.svg b/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/images/grid-16x10.svg deleted file mode 100644 index 483f69d..0000000 --- a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/images/grid-16x10.svg +++ /dev/null @@ -1,24 +0,0 @@ - - - - - - - - - - - - - - - - - - \ No newline at end of file diff --git a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/images/grid-4x3.svg b/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/images/grid-4x3.svg deleted file mode 100644 index 756215c..0000000 --- a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/images/grid-4x3.svg +++ /dev/null @@ -1,26 +0,0 @@ - - - - - - - - - - - - - - - - - - - - \ No newline at end of file diff --git a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/images/linen.png b/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/images/linen.png deleted file mode 100644 index 46474bf..0000000 Binary files a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/images/linen.png and /dev/null differ diff --git a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/images/linen@2x.png b/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/images/linen@2x.png deleted file mode 100644 index 3ace416..0000000 Binary files a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/images/linen@2x.png and /dev/null differ diff --git a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/images/ribbon.svg b/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/images/ribbon.svg deleted file mode 100644 index 1770caf..0000000 --- a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/images/ribbon.svg +++ /dev/null @@ -1,3 +0,0 @@ - - - \ No newline at end of file diff --git a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/index.html b/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/index.html deleted file mode 100644 index e9e6e79..0000000 --- a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/index.html +++ /dev/null @@ -1,217 +0,0 @@ - - - - Ribbon theme for Shower - - - - - - - -
-

Presentation Title

-

Yours Truly, Famous Inc.

-
-
-

Header

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Typewriter etsy messenger bag fingerstache, aesthetic vinyl semiotics twee DIY forage chillwave. Thundercats ennui messenger bag, squid carles chillwave shoreditch pickled cliche letterpress. DIY beard locavore occupy salvia, whatever single-origin <coffee> fanny pack 3 wolf moon typewriter gastropub1 kale H20 chips. Ennui keffiyeh thundercats jean shorts biodiesel. Terry richardson, swag blog locavore umami vegan helvetica. Fingerstache kale chips.

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Typewriter etsy messenger bag fingerstache, aesthetic vinyl semiotics twee DIY forage chillwave. Thundercats ennui messenger bag, squid carles chillwave shoreditch pickled cliche letterpress. DIY beard locavore occupy salvia, whatever single-origin <coffee> fanny pack 3 wolf moon typewriter gastropub1 kale H20 chips. Ennui keffiyeh thundercats jean shorts biodiesel. Terry richardson, swag blog locavore umami vegan helvetica. Fingerstache kale chips.

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Header

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Thundercats ennui messenger bag, squid carles chillwave shoreditch pickled cliche letterpress. DIY beard locavore occupy salvia, whatever single-origin coffee fanny pack 3 wolf moon typewriter gastropub kale chips. Ennui keffiyeh thundercats jean shorts biodiesel. Terry richardson, swag blog locavore umami vegan helvetica. Fingerstache kale chips.

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Typewriter etsy messenger bag fingerstache.

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Typewriter etsy messenger bag fingerstache, aesthetic vinyl semiotics twee DIY forage chillwave. Thundercats ennui messenger bag, squid carles chillwave shoreditch pickled cliche letterpress.

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DIY beard locavore occupy salvia, whatever single-origin coffee fanny pack 3 wolf moon typewriter gastropub kale chips. Ennui keffiyeh thundercats jean shorts biodiesel.

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Lists in English typography

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  • Ennui keffiyeh thundercats
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  • Jean shorts biodiesel
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    1. Locavore umami vegan helvetica
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  • Before they sold out master
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Lists in Russian typography

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  • Ennui keffiyeh thundercats
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  • Jean shorts biodiesel
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  • Terry richardson, swag blog -
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    1. Locavore umami vegan helvetica
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    3. Keytar sriracha gluten-free
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  • Before they sold out master
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Lists in English typography

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  3. Keytar sriracha gluten-free
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Typewriter etsy messenger bag fingerstache, aesthetic vinyl semiotics twee DIY forage chillwave. Thundercats ennui messenger bag, squid carles chillwave shoreditch pickled cliche letterpress.

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Author Name
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DIY beard locavore occupy salvia, whatever single-origin coffee fanny pack 3 wolf moon typewriter gastropub kale chips.

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Table

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LocavoreUmamiHelveticaVegan
FingerstacheKaleChipsKeytar
SrirachaGluten-freeEnnuiKeffiyeh
ThundercatsJeanShortsBiodiesel
TerryRichardsonSwagBlog
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Typewriter etsy messenger bag fingerstache.

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Numbered code listing

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-			<html lang="en">
-			<head> <!--Comment-->
-				<title>Shower</title>
-				<meta charset="UTF-8">
-				<link rel="stylesheet" href="s/screen.css">
-				<script src="j/jquery.js"></script>
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Plain code listing

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<html lang="en">
-<head> <!--Comment-->
-	<title>Shower</title>
-	<meta charset="UTF-8">
-	<link rel="stylesheet" href="s/screen.css">
-	<script src="j/jquery.js"></script>
-</head>
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- You Can
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Typewriter etsy messenger bag fingerstache.

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Growing Shout

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Typewriter etsy messenger bag fingerstache.

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Three seconds to go.

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List navigation

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  1. Ennui keffiyeh thundercats
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Before they sold out master

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Fork me on Github

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- - - - diff --git a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/package.json b/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/package.json deleted file mode 100644 index d1a89c2..0000000 --- a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/package.json +++ /dev/null @@ -1,61 +0,0 @@ -{ - "name": "shower-ribbon", - "description": "Ribbon theme for Shower HTML presentation engine", - "version": "1.0.11", - "author": { - "name": "Vadim Makeev", - "url": "http://pepelsbey.com/" - }, - "homepage": "https://github.com/shower/ribbon", - "repository": { - "type": "git", - "url": "git://github.com/shower/ribbon.git" - }, - "bugs": { - "url": "http://github.com/shower/shower/issues" - }, - "licenses": [ - { - "type": "MIT", - "url": "https://github.com/shower/shower/wiki/MIT-License" - } - ], - "keywords": [ - "shower", - "presentation", - "ribbon", - "theme" - ], - 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b/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/pictures/tall.png deleted file mode 100644 index 9725c42..0000000 Binary files a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/pictures/tall.png and /dev/null differ diff --git a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/pictures/wide.png b/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/pictures/wide.png deleted file mode 100644 index d0d5ee3..0000000 Binary files a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/pictures/wide.png and /dev/null differ diff --git a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/styles/screen.css b/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/node_modules/shower-ribbon/styles/screen.css deleted file mode 100644 index b4ce269..0000000 --- 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h2{-webkit-transform:scale(10)translateY(-50%);-ms-transform:scale(10)translateY(-50%);transform:scale(10)translateY(-50%)}.full .progress{position:absolute;right:0;bottom:0;left:0;overflow:hidden;height:10px;z-index:1}.full .progress div{position:absolute;left:-20px;top:-10px;width:0;height:0;border:10px solid transparent;border-bottom-color:#4B86C2;-webkit-transition:width .2s linear;transition:width .2s linear}.full .progress div[style*='100%']{left:0}}@page{margin:0;size:1024px 640px} \ No newline at end of file diff --git a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/package.json b/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/package.json deleted file mode 100644 index 818b3da..0000000 --- a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/package.json +++ /dev/null @@ -1,45 +0,0 @@ -{ - "name": "pub-theme-shower-ribbon", - "version": "1.5.3", - "description": "shower presentation theme for pub-server", - "main": "pub-config.js", - "dependencies": { - "shower-core": "^1.0.7", - "shower-ribbon": "^1.0.11" - }, - "repository": { - "type": "git", - "url": "git+https://github.com/jldec/pub-theme-shower-ribbon.git" - }, - "author": { - "name": "jurgen leschner" - }, - "license": "MIT", - "gitHead": "83e33dd76b4b141fd72dcf92492b86148fdccd69", - "bugs": { - "url": "https://github.com/jldec/pub-theme-shower-ribbon/issues" - }, - "homepage": "https://github.com/jldec/pub-theme-shower-ribbon#readme", - "_id": "pub-theme-shower-ribbon@1.5.3", - "scripts": {}, - "_shasum": "46dc846998e4d7e20ce6e8d23abb341c5927a578", - "_from": "pub-theme-shower-ribbon@>=1.5.3 <2.0.0", - "_npmVersion": "2.12.1", - "_nodeVersion": "2.3.4", - "_npmUser": { - "name": "jldec", - "email": "jldec@ciaosoft.com" - }, - "maintainers": [ - { - "name": "jldec", - "email": "jldec@ciaosoft.com" - } - ], - "dist": { - "shasum": "46dc846998e4d7e20ce6e8d23abb341c5927a578", - "tarball": "http://registry.npmjs.org/pub-theme-shower-ribbon/-/pub-theme-shower-ribbon-1.5.3.tgz" - }, - "directories": {}, - "_resolved": "https://registry.npmjs.org/pub-theme-shower-ribbon/-/pub-theme-shower-ribbon-1.5.3.tgz" -} diff --git a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/plugins/generator-plugin.js b/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/plugins/generator-plugin.js deleted file mode 100644 index 4102eb7..0000000 --- a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/plugins/generator-plugin.js +++ /dev/null @@ -1,112 +0,0 @@ -module.exports = function(generator) { - - var u = generator.util; - var opts = generator.opts; - var sources = opts.sources; - var hb = generator.handlebars; - - // apply page-mutations to pages from non-package sources - generator.on('pages-ready', function() { - - u.each(sources, function(source) { - if (source._pkg) return; - - u.each(generator.sourcePage$[source.name], function(page) { - - // if no text below markdown heading use 'shout' class - u.each(page._fragments, function(fragment) { - if (fragment['background-image']) { - fragment.class = (fragment.class || '') + ' background-image'; - } - if (0 === u.trim(fragment._txt.replace(/^.*$/m,'')).length) { - fragment.class = (fragment.class || '') + ' shout'; - } - }); - - // if first slide contains an image, use 'cover' class - var first = page._fragments && page._fragments[0]; - if (first && /^\!\[/m.test(first._txt)) { - page._fragments[0].class = (page._fragments[0].class || '') + ' cover'; - } - - }); - }); - }); - - hb.registerHelper('background-image', function(frame) { - var bgImg = this['background-image']; - if (bgImg) { - return ''; - } - }); - - function relPath(frame) { - return hb.renderOpts(frame).relPath || ''; - } - - // prevent single-page navigation in editor - main-layout is page-sensitive - generator.on('update-view', function(path, query, hash, nav) { - if (nav) { window.location = path; } - }); - - hb.registerHelper('menu', function(frame) { - return this.menu || '='; - }); - - function lang(page) { - return page.lang || u.slugify(page._href.slice(1)) || 'en'; - } - - function rtl(page) { - var code = lang(page).replace(/-.*/,''); - var rtlcodes = ['ar','arc','dv','ha','he','khw','ks','ku','ps','ur','yi']; - return page.rtl || u.contains(rtlcodes, code); - } - - hb.registerHelper('lang', function(frame) { - return 'lang="' + lang(this) + '"'; - }); - - - hb.registerHelper('rtl', function(frame) { - return 'dir="' + (rtl(this) ? 'rtl' : 'auto') + '"'; - }); - - hb.registerHelper('body-class', function(frame) { - return 'class="' + - (this['body-class'] || 'list') + - ' ' + lang(this) + '"'; - }); - - function githubText(page) { - switch (lang(page)) { - case 'fr': return 'Forkez-moi sur GitHub'; - case 'he': return 'צור פיצול בGitHub'; - case 'id': return 'Fork saya di Github'; - case 'ko': return 'Github에서 포크하기'; - case 'pt-br': return 'Faça um fork no Github'; - case 'pt-pt': return 'Faz fork no Github'; - case 'tr': return 'Github üstünde Fork edin'; - case 'uk': return 'скопіювати на Github'; - default: return 'Fork me on Github'; - } - } - - hb.registerHelper('github', function(frame) { - if (opts.github) { - return u.format( - '

%s

', - opts.github, - this['github-text'] || githubText(this) - ); - } - }); - - hb.registerHelper('photoCredit', function(frame) { - if (this['photo-credit'] || opts.photoCredit) { - return ''; - } - }); - - -} diff --git a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/pub-config.js b/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/pub-config.js deleted file mode 100644 index 6ad1836..0000000 --- a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/pub-config.js +++ /dev/null @@ -1,21 +0,0 @@ -// pub-theme-shower-ribbon pub-config - -module.exports = { - - 'pub-pkg': 'pub-theme-shower-ribbon', - - sources: './templates', - - generatorPlugins: './plugins/generator-plugin.js', - - staticPaths: [ - { path:'./node_modules/shower-core/shower.min.js', route:'/shower', inject:true }, - { path:'./node_modules/shower-ribbon/styles/screen.css', route:'/shower/ribbon/styles', inject:true }, - { path:'./css/pub-theme-shower-ribbon.css', route:'/css', inject:true }, - { path:'./node_modules/shower-ribbon/images', route:'/shower/ribbon/images' }, - { path:'./node_modules/shower-ribbon/fonts', route:'/shower/ribbon/fonts' }, - { path:'./node_modules/shower-core/License.md', route:'/shower' }, - { path:'./node_modules/shower-ribbon/License.md', route:'/shower/ribbon' } - ], - -}; diff --git a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/templates/default.hbs b/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/templates/default.hbs deleted file mode 100644 index 5251d48..0000000 --- a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/templates/default.hbs +++ /dev/null @@ -1,13 +0,0 @@ -
-{{{html}}} -
- -{{#each _fragments}} -
-{{{html}}} -{{{background-image}}} -
- -{{/each}} - -
diff --git a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/templates/main-layout.hbs b/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/templates/main-layout.hbs deleted file mode 100644 index 00f98ed..0000000 --- a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/templates/main-layout.hbs +++ /dev/null @@ -1,30 +0,0 @@ - - - - - - - -{{{metaSeo}}} - - - -{{title}} -{{{injectCss}}} - - - -{{{partial 'nav'}}} - -{{{renderPage}}} - -{{{github}}} - -{{{injectJs}}} - - -{{{photoCredit}}} -{{{copyrightComment}}} - - - diff --git a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/templates/nav.hbs b/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/templates/nav.hbs deleted file mode 100644 index b938379..0000000 --- a/src/accelerator/docs/node_modules/pub-theme-shower-ribbon/templates/nav.hbs +++ /dev/null @@ -1,9 +0,0 @@ - \ No newline at end of file diff --git a/src/accelerator/docs/package.json b/src/accelerator/docs/package.json deleted file mode 100644 index 55db6f8..0000000 --- a/src/accelerator/docs/package.json +++ /dev/null @@ -1,21 +0,0 @@ -{ - "name": "documentation", - "version": "1.0.0", - "description": "Epiphany presentations", - "main": "pub-config.js", - "dependencies": { - "pub-theme-shower-ribbon": "^1.6.0" - }, - "devDependencies": {}, - "repository": { - "type": "git", - "url": "git://github.com/adapteva/documentation" - }, - "scripts": { - "develop": "pub", - "generate": "pub -O", - "static": "pub -S out" - }, - "author": "jurgen leschner", - "license": "MIT" -} diff --git a/src/accelerator/docs/pub-config.js b/src/accelerator/docs/pub-config.js deleted file mode 100644 index cb536cf..0000000 --- a/src/accelerator/docs/pub-config.js +++ /dev/null @@ -1,35 +0,0 @@ -var opts = module.exports = { - - pkgs: ['pub-theme-shower-ribbon', 'pub-pkg-highlight'], - - sources: [ - { - path:'.', - glob:'**/*.md', - watch: {usePolling:true}, - writable:true - } - ], - - outputs: [ - { - path:'./out', - relPaths: true, - } - ], - - //scans everything beneath path - staticPaths: [ '../static' , './static' , '.nojekyll' , '../.gitignore'], - - // path to extra stylesheet - injectCss: [ '/css/extra.css' ], - - // don't forget photo credit - //photoCredit: 'Cover Photo by Jurgen Leschner, github.com/jldec', - - // copyright comment - //copyright: 'Copyright © 2015 Hard Working Person', - - // ask search engines not to crawl this site - //noRobots: true -} diff --git a/src/accelerator/docs/static/css/extra.css b/src/accelerator/docs/static/css/extra.css deleted file mode 100644 index 401fc70..0000000 --- a/src/accelerator/docs/static/css/extra.css +++ /dev/null @@ -1,53 +0,0 @@ -/*header from top*/ -/* less space at the top */ -.slide>div { - padding-top: 60px; - height: 580px; -} - -/* more room next to images aligned right */ -.slide img[align=right] { - margin-right: -80px; -} - -/* force 2nd image aligned right to fall below 1st one -increase this value if the images are smaller */ -.slide img[align=right] ~ img[align=right] { - margin-left: 1em; -} - - -/*transparency of text bar*/ -.slide.background-image > div > div { - background-color: rgba(0, 0, 0, 0.6); -} - -/*font size*/ -.slide { - font-size: 1.0em; -} - -/*cover title*/ -.slide.cover h2 { - margin: -20px 0 0 -70px; - color: #fff; - font-size: 70px; -} -/*cover paragraph (markdown-->html) -slide.cover from shower theme -p from jurgens generator -*/ -.slide.cover p { - color: #fff; - font-style: italic; - font-size: 40px; - margin-left: -70px; -} - -@media print { - #nav { display:none; } - .pub-button { display:none; } -} - -/*padding for images*/ -.slide img {margin-bottom:1em;} diff --git a/src/accelerator/docs/static/images/CREDITS b/src/accelerator/docs/static/images/CREDITS deleted file mode 100644 index 7a384b6..0000000 --- a/src/accelerator/docs/static/images/CREDITS +++ /dev/null @@ -1,18 +0,0 @@ -All images created by Adapteva unless otherwise specified: -fcomms2.jpg : www.analog.com -satnog.jpg : www.satnogs.org -vivado.jpg : www.xilinx.com - -## ADI (www.analog.com) -* fcomms2.jpg -* ad9361.png -* ad9361_rx.png -* ad9361_tx.png - -## SATNOGS (www.satnogs.org) -* satnogs.jpg - -## XILINX (www.xilinx.com) -* vivado.png -* sdsoc.jpg - diff --git a/src/accelerator/docs/static/images/epiphanyIV.jpg b/src/accelerator/docs/static/images/epiphanyIV.jpg deleted file mode 100644 index 0cc5ce5..0000000 Binary files a/src/accelerator/docs/static/images/epiphanyIV.jpg and /dev/null differ diff --git a/src/accelerator/docs/static/images/matrix_meme.jpg b/src/accelerator/docs/static/images/matrix_meme.jpg deleted file mode 100644 index ddadd16..0000000 Binary files a/src/accelerator/docs/static/images/matrix_meme.jpg and /dev/null differ diff --git a/src/accelerator/docs/static/images/parallella_back.jpg b/src/accelerator/docs/static/images/parallella_back.jpg deleted file mode 100644 index d3363dd..0000000 Binary files a/src/accelerator/docs/static/images/parallella_back.jpg and /dev/null differ diff --git a/src/accelerator/docs/static/images/parallella_epiphany.png b/src/accelerator/docs/static/images/parallella_epiphany.png deleted file mode 100644 index 6d1e77f..0000000 Binary files a/src/accelerator/docs/static/images/parallella_epiphany.png and /dev/null differ diff --git a/src/accelerator/docs/static/images/parallella_front.jpg b/src/accelerator/docs/static/images/parallella_front.jpg deleted file mode 100644 index a3f7742..0000000 Binary files a/src/accelerator/docs/static/images/parallella_front.jpg and /dev/null differ diff --git a/src/accelerator/docs/static/images/parallella_front_back.png b/src/accelerator/docs/static/images/parallella_front_back.png deleted file mode 100644 index d8060eb..0000000 Binary files a/src/accelerator/docs/static/images/parallella_front_back.png and /dev/null differ diff --git a/src/accelerator/docs/static/images/parallella_front_new.jpg b/src/accelerator/docs/static/images/parallella_front_new.jpg deleted file mode 100644 index ec4bbe6..0000000 Binary files a/src/accelerator/docs/static/images/parallella_front_new.jpg and /dev/null differ diff --git a/src/accelerator/docs/static/images/parallella_front_slant.png b/src/accelerator/docs/static/images/parallella_front_slant.png deleted file mode 100644 index bba2ebc..0000000 Binary files a/src/accelerator/docs/static/images/parallella_front_slant.png and /dev/null differ diff --git a/src/accelerator/docs/static/images/parallella_slant.jpg b/src/accelerator/docs/static/images/parallella_slant.jpg deleted file mode 100644 index b5e745b..0000000 Binary files a/src/accelerator/docs/static/images/parallella_slant.jpg and /dev/null differ diff --git a/src/accelerator/docs/static/images/parallella_stack.jpg b/src/accelerator/docs/static/images/parallella_stack.jpg deleted file mode 100644 index 7590820..0000000 Binary files a/src/accelerator/docs/static/images/parallella_stack.jpg and /dev/null differ diff --git a/src/accelerator/docs/static/images/parallella_zynq.png b/src/accelerator/docs/static/images/parallella_zynq.png deleted file mode 100644 index 9899f2f..0000000 Binary files a/src/accelerator/docs/static/images/parallella_zynq.png and /dev/null differ diff --git a/src/accelerator/docs/static/images/zynq.jpg b/src/accelerator/docs/static/images/zynq.jpg deleted file mode 100644 index c06c5e4..0000000 Binary files a/src/accelerator/docs/static/images/zynq.jpg and /dev/null differ diff --git a/src/accelerator/dv/dut_accelerator.v b/src/accelerator/dv/dut_accelerator.v deleted file mode 100644 index 9b185fd..0000000 --- a/src/accelerator/dv/dut_accelerator.v +++ /dev/null @@ -1,380 +0,0 @@ -//############################################################################# -//# Purpose: Device under test wrapper for toy accelerator example # -//############################################################################# -//# Author: Andreas Olofsson # -//# License: MIT (see below) # -//############################################################################# - -module dut(/*AUTOARG*/ - // Outputs - dut_active, clkout, wait_out, access_out, packet_out, - // Inputs - clk1, clk2, nreset, vdd, vss, access_in, packet_in, wait_in - ); - - //########################################################################## - //# INTERFACE - //########################################################################## - - parameter AW = 32; - parameter ID = 12'h810; - parameter S_IDW = 12; - parameter M_IDW = 6; - parameter PW = 2*AW + 40; - parameter N = 1; - - //clock,reset - input clk1; - input clk2; - input nreset; - input [N*N-1:0] vdd; - input vss; - output dut_active; - output clkout; - - //Stimulus Driven Transaction - input [N-1:0] access_in; - input [N*PW-1:0] packet_in; - output [N-1:0] wait_out; - - //DUT driven transaction - output [N-1:0] access_out; - output [N*PW-1:0] packet_out; - input [N-1:0] wait_in; - - //########################################################################## - //#BODY - //########################################################################## - - wire mem_rd_wait; - wire mem_wr_wait; - wire mem_access; - wire [PW-1:0] mem_packet; - - /*AUTOINPUT*/ - - // End of automatics - /*AUTOWIRE*/ - // Beginning of automatic wires (for undeclared instantiated-module outputs) - wire irq; // From axi_accelerator of axi_accelerator.v - wire [31:0] m_axi_araddr; // From axi_accelerator of axi_accelerator.v - wire [1:0] m_axi_arburst; // From axi_accelerator of axi_accelerator.v - wire [3:0] m_axi_arcache; // From axi_accelerator of axi_accelerator.v - wire [M_IDW-1:0] m_axi_arid; // From axi_accelerator of axi_accelerator.v - wire [7:0] m_axi_arlen; // From axi_accelerator of axi_accelerator.v - wire m_axi_arlock; // From axi_accelerator of axi_accelerator.v - wire [2:0] m_axi_arprot; // From axi_accelerator of axi_accelerator.v - wire [3:0] m_axi_arqos; // From axi_accelerator of axi_accelerator.v - wire m_axi_arready; // From m_stub of axislave_stub.v - wire [2:0] m_axi_arsize; // From axi_accelerator of axi_accelerator.v - wire m_axi_arvalid; // From axi_accelerator of axi_accelerator.v - wire [31:0] m_axi_awaddr; // From axi_accelerator of axi_accelerator.v - wire [1:0] m_axi_awburst; // From axi_accelerator of axi_accelerator.v - wire [3:0] m_axi_awcache; // From axi_accelerator of axi_accelerator.v - wire [M_IDW-1:0] m_axi_awid; // From axi_accelerator of axi_accelerator.v - wire [7:0] m_axi_awlen; // From axi_accelerator of axi_accelerator.v - wire m_axi_awlock; // From axi_accelerator of axi_accelerator.v - wire [2:0] m_axi_awprot; // From axi_accelerator of axi_accelerator.v - wire [3:0] m_axi_awqos; // From axi_accelerator of axi_accelerator.v - wire m_axi_awready; // From m_stub of axislave_stub.v - wire [2:0] m_axi_awsize; // From axi_accelerator of axi_accelerator.v - wire m_axi_awvalid; // From axi_accelerator of axi_accelerator.v - wire [S_IDW-1:0] m_axi_bid; // From m_stub of axislave_stub.v - wire m_axi_bready; // From axi_accelerator of axi_accelerator.v - wire [1:0] m_axi_bresp; // From m_stub of axislave_stub.v - wire m_axi_bvalid; // From m_stub of axislave_stub.v - wire [31:0] m_axi_rdata; // From m_stub of axislave_stub.v - wire [S_IDW-1:0] m_axi_rid; // From m_stub of axislave_stub.v - wire m_axi_rlast; // From m_stub of axislave_stub.v - wire m_axi_rready; // From axi_accelerator of axi_accelerator.v - wire [1:0] m_axi_rresp; // From m_stub of axislave_stub.v - wire m_axi_rvalid; // From m_stub of axislave_stub.v - wire [63:0] m_axi_wdata; // From axi_accelerator of axi_accelerator.v - wire [M_IDW-1:0] m_axi_wid; // From axi_accelerator of axi_accelerator.v - wire m_axi_wlast; // From axi_accelerator of axi_accelerator.v - wire m_axi_wready; // From m_stub of axislave_stub.v - wire [7:0] m_axi_wstrb; // From axi_accelerator of axi_accelerator.v - wire m_axi_wvalid; // From axi_accelerator of axi_accelerator.v - wire [31:0] s_axi_araddr; // From emaxi of emaxi.v - wire [1:0] s_axi_arburst; // From emaxi of emaxi.v - wire [3:0] s_axi_arcache; // From emaxi of emaxi.v - wire [M_IDW-1:0] s_axi_arid; // From emaxi of emaxi.v - wire [7:0] s_axi_arlen; // From emaxi of emaxi.v - wire s_axi_arlock; // From emaxi of emaxi.v - wire [2:0] s_axi_arprot; // From emaxi of emaxi.v - wire [3:0] s_axi_arqos; // From emaxi of emaxi.v - wire s_axi_arready; // From axi_accelerator of axi_accelerator.v - wire [2:0] s_axi_arsize; // From emaxi of emaxi.v - wire s_axi_arvalid; // From emaxi of emaxi.v - wire [31:0] s_axi_awaddr; // From emaxi of emaxi.v - wire [1:0] s_axi_awburst; // From emaxi of emaxi.v - wire [3:0] s_axi_awcache; // From emaxi of emaxi.v - wire [M_IDW-1:0] s_axi_awid; // From emaxi of emaxi.v - wire [7:0] s_axi_awlen; // From emaxi of emaxi.v - wire s_axi_awlock; // From emaxi of emaxi.v - wire [2:0] s_axi_awprot; // From emaxi of emaxi.v - wire [3:0] s_axi_awqos; // From emaxi of emaxi.v - wire s_axi_awready; // From axi_accelerator of axi_accelerator.v - wire [2:0] s_axi_awsize; // From emaxi of emaxi.v - wire s_axi_awvalid; // From emaxi of emaxi.v - wire [S_IDW-1:0] s_axi_bid; // From axi_accelerator of axi_accelerator.v - wire s_axi_bready; // From emaxi of emaxi.v - wire [1:0] s_axi_bresp; // From axi_accelerator of axi_accelerator.v - wire s_axi_bvalid; // From axi_accelerator of axi_accelerator.v - wire [31:0] s_axi_rdata; // From axi_accelerator of axi_accelerator.v - wire [S_IDW-1:0] s_axi_rid; // From axi_accelerator of axi_accelerator.v - wire s_axi_rlast; // From axi_accelerator of axi_accelerator.v - wire s_axi_rready; // From emaxi of emaxi.v - wire [1:0] s_axi_rresp; // From axi_accelerator of axi_accelerator.v - wire s_axi_rvalid; // From axi_accelerator of axi_accelerator.v - wire [63:0] s_axi_wdata; // From emaxi of emaxi.v - wire [M_IDW-1:0] s_axi_wid; // From emaxi of emaxi.v - wire s_axi_wlast; // From emaxi of emaxi.v - wire s_axi_wready; // From axi_accelerator of axi_accelerator.v - wire [7:0] s_axi_wstrb; // From emaxi of emaxi.v - wire s_axi_wvalid; // From emaxi of emaxi.v - // End of automatics - - assign clkout = clk1; - assign dut_active = 1'b1; - - //###################################################################### - //ACCELERATOR - //###################################################################### - - axi_accelerator - axi_accelerator (.sys_nreset (nreset), - .sys_clk (clk1), - .m_axi_aresetn (nreset), - .s_axi_aresetn (nreset), - .s_axi_wstrb (s_axi_wstrb[7:4] | s_axi_wstrb[3:0]), - /*AUTOINST*/ - // Outputs - .irq (irq), - .m_axi_awid (m_axi_awid[M_IDW-1:0]), - .m_axi_awaddr (m_axi_awaddr[31:0]), - .m_axi_awlen (m_axi_awlen[7:0]), - .m_axi_awsize (m_axi_awsize[2:0]), - .m_axi_awburst (m_axi_awburst[1:0]), - .m_axi_awlock (m_axi_awlock), - .m_axi_awcache (m_axi_awcache[3:0]), - .m_axi_awprot (m_axi_awprot[2:0]), - .m_axi_awqos (m_axi_awqos[3:0]), - .m_axi_awvalid (m_axi_awvalid), - .m_axi_wid (m_axi_wid[M_IDW-1:0]), - .m_axi_wdata (m_axi_wdata[63:0]), - .m_axi_wstrb (m_axi_wstrb[7:0]), - .m_axi_wlast (m_axi_wlast), - .m_axi_wvalid (m_axi_wvalid), - .m_axi_bready (m_axi_bready), - .m_axi_arid (m_axi_arid[M_IDW-1:0]), - .m_axi_araddr (m_axi_araddr[31:0]), - .m_axi_arlen (m_axi_arlen[7:0]), - .m_axi_arsize (m_axi_arsize[2:0]), - .m_axi_arburst (m_axi_arburst[1:0]), - .m_axi_arlock (m_axi_arlock), - .m_axi_arcache (m_axi_arcache[3:0]), - .m_axi_arprot (m_axi_arprot[2:0]), - .m_axi_arqos (m_axi_arqos[3:0]), - .m_axi_arvalid (m_axi_arvalid), - .m_axi_rready (m_axi_rready), - .s_axi_arready (s_axi_arready), - .s_axi_awready (s_axi_awready), - .s_axi_bid (s_axi_bid[S_IDW-1:0]), - .s_axi_bresp (s_axi_bresp[1:0]), - .s_axi_bvalid (s_axi_bvalid), - .s_axi_rid (s_axi_rid[S_IDW-1:0]), - .s_axi_rdata (s_axi_rdata[31:0]), - .s_axi_rlast (s_axi_rlast), - .s_axi_rresp (s_axi_rresp[1:0]), - .s_axi_rvalid (s_axi_rvalid), - .s_axi_wready (s_axi_wready), - // Inputs - .m_axi_awready (m_axi_awready), - .m_axi_wready (m_axi_wready), - .m_axi_bid (m_axi_bid[M_IDW-1:0]), - .m_axi_bresp (m_axi_bresp[1:0]), - .m_axi_bvalid (m_axi_bvalid), - .m_axi_arready (m_axi_arready), - .m_axi_rid (m_axi_rid[M_IDW-1:0]), - .m_axi_rdata (m_axi_rdata[63:0]), - .m_axi_rresp (m_axi_rresp[1:0]), - .m_axi_rlast (m_axi_rlast), - .m_axi_rvalid (m_axi_rvalid), - .s_axi_arid (s_axi_arid[S_IDW-1:0]), - .s_axi_araddr (s_axi_araddr[31:0]), - .s_axi_arburst (s_axi_arburst[1:0]), - .s_axi_arcache (s_axi_arcache[3:0]), - .s_axi_arlock (s_axi_arlock), - .s_axi_arlen (s_axi_arlen[7:0]), - .s_axi_arprot (s_axi_arprot[2:0]), - .s_axi_arqos (s_axi_arqos[3:0]), - .s_axi_arsize (s_axi_arsize[2:0]), - .s_axi_arvalid (s_axi_arvalid), - .s_axi_awid (s_axi_awid[S_IDW-1:0]), - .s_axi_awaddr (s_axi_awaddr[31:0]), - .s_axi_awburst (s_axi_awburst[1:0]), - .s_axi_awcache (s_axi_awcache[3:0]), - .s_axi_awlock (s_axi_awlock), - .s_axi_awlen (s_axi_awlen[7:0]), - .s_axi_awprot (s_axi_awprot[2:0]), - .s_axi_awqos (s_axi_awqos[3:0]), - .s_axi_awsize (s_axi_awsize[2:0]), - .s_axi_awvalid (s_axi_awvalid), - .s_axi_bready (s_axi_bready), - .s_axi_rready (s_axi_rready), - .s_axi_wid (s_axi_wid[S_IDW-1:0]), - .s_axi_wdata (s_axi_wdata[31:0]), - .s_axi_wlast (s_axi_wlast), - .s_axi_wvalid (s_axi_wvalid)); - - //###################################################################### - //AXI MASTER - //###################################################################### - - //Split stimulus to read/write - assign wait_out = wr_wait | rd_wait; - assign write_in = access_in & packet_in[0]; - assign read_in = access_in & ~packet_in[0]; - - /*emaxi AUTO_TEMPLATE (.m_\(.*\) (s_\1[]), - ); - */ - - emaxi #(.M_IDW(M_IDW)) - emaxi (.m_axi_aclk (clk1), - .m_axi_aresetn (nreset), - .m_axi_rdata ({s_axi_rdata[31:0],s_axi_rdata[31:0]}), - .rr_wait (wait_in), - .rr_access (access_out), - .rr_packet (packet_out[PW-1:0]), - .wr_wait (wr_wait), - .wr_access (write_in), - .wr_packet (packet_in[PW-1:0]), - .rd_wait (rd_wait), - .rd_access (read_in), - .rd_packet (packet_in[PW-1:0]), - /*AUTOINST*/ - // Outputs - .m_axi_awid (s_axi_awid[M_IDW-1:0]), // Templated - .m_axi_awaddr (s_axi_awaddr[31:0]), // Templated - .m_axi_awlen (s_axi_awlen[7:0]), // Templated - .m_axi_awsize (s_axi_awsize[2:0]), // Templated - .m_axi_awburst (s_axi_awburst[1:0]), // Templated - .m_axi_awlock (s_axi_awlock), // Templated - .m_axi_awcache (s_axi_awcache[3:0]), // Templated - .m_axi_awprot (s_axi_awprot[2:0]), // Templated - .m_axi_awqos (s_axi_awqos[3:0]), // Templated - .m_axi_awvalid (s_axi_awvalid), // Templated - .m_axi_wid (s_axi_wid[M_IDW-1:0]), // Templated - .m_axi_wdata (s_axi_wdata[63:0]), // Templated - .m_axi_wstrb (s_axi_wstrb[7:0]), // Templated - .m_axi_wlast (s_axi_wlast), // Templated - .m_axi_wvalid (s_axi_wvalid), // Templated - .m_axi_bready (s_axi_bready), // Templated - .m_axi_arid (s_axi_arid[M_IDW-1:0]), // Templated - .m_axi_araddr (s_axi_araddr[31:0]), // Templated - .m_axi_arlen (s_axi_arlen[7:0]), // Templated - .m_axi_arsize (s_axi_arsize[2:0]), // Templated - .m_axi_arburst (s_axi_arburst[1:0]), // Templated - .m_axi_arlock (s_axi_arlock), // Templated - .m_axi_arcache (s_axi_arcache[3:0]), // Templated - .m_axi_arprot (s_axi_arprot[2:0]), // Templated - .m_axi_arqos (s_axi_arqos[3:0]), // Templated - .m_axi_arvalid (s_axi_arvalid), // Templated - .m_axi_rready (s_axi_rready), // Templated - // Inputs - .m_axi_awready (s_axi_awready), // Templated - .m_axi_wready (s_axi_wready), // Templated - .m_axi_bid (s_axi_bid[M_IDW-1:0]), // Templated - .m_axi_bresp (s_axi_bresp[1:0]), // Templated - .m_axi_bvalid (s_axi_bvalid), // Templated - .m_axi_arready (s_axi_arready), // Templated - .m_axi_rid (s_axi_rid[M_IDW-1:0]), // Templated - .m_axi_rresp (s_axi_rresp[1:0]), // Templated - .m_axi_rlast (s_axi_rlast), // Templated - .m_axi_rvalid (s_axi_rvalid)); // Templated - - - - - - - //Tie off master output for now - /*axislave_stub AUTO_TEMPLATE (.s_\(.*\) (m_\1[]), - ); - */ - - axislave_stub m_stub (.s_axi_aclk (clk1), - .s_axi_aresetn (nreset), - /*AUTOINST*/ - // Outputs - .s_axi_arready (m_axi_arready), // Templated - .s_axi_awready (m_axi_awready), // Templated - .s_axi_bid (m_axi_bid[S_IDW-1:0]), // Templated - .s_axi_bresp (m_axi_bresp[1:0]), // Templated - .s_axi_bvalid (m_axi_bvalid), // Templated - .s_axi_rid (m_axi_rid[S_IDW-1:0]), // Templated - .s_axi_rdata (m_axi_rdata[31:0]), // Templated - .s_axi_rlast (m_axi_rlast), // Templated - .s_axi_rresp (m_axi_rresp[1:0]), // Templated - .s_axi_rvalid (m_axi_rvalid), // Templated - .s_axi_wready (m_axi_wready), // Templated - // Inputs - .s_axi_arid (m_axi_arid[S_IDW-1:0]), // Templated - .s_axi_araddr (m_axi_araddr[31:0]), // Templated - .s_axi_arburst (m_axi_arburst[1:0]), // Templated - .s_axi_arcache (m_axi_arcache[3:0]), // Templated - .s_axi_arlock (m_axi_arlock), // Templated - .s_axi_arlen (m_axi_arlen[7:0]), // Templated - .s_axi_arprot (m_axi_arprot[2:0]), // Templated - .s_axi_arqos (m_axi_arqos[3:0]), // Templated - .s_axi_arsize (m_axi_arsize[2:0]), // Templated - .s_axi_arvalid (m_axi_arvalid), // Templated - .s_axi_awid (m_axi_awid[S_IDW-1:0]), // Templated - .s_axi_awaddr (m_axi_awaddr[31:0]), // Templated - .s_axi_awburst (m_axi_awburst[1:0]), // Templated - .s_axi_awcache (m_axi_awcache[3:0]), // Templated - .s_axi_awlock (m_axi_awlock), // Templated - .s_axi_awlen (m_axi_awlen[7:0]), // Templated - .s_axi_awprot (m_axi_awprot[2:0]), // Templated - .s_axi_awqos (m_axi_awqos[3:0]), // Templated - .s_axi_awsize (m_axi_awsize[2:0]), // Templated - .s_axi_awvalid (m_axi_awvalid), // Templated - .s_axi_bready (m_axi_bready), // Templated - .s_axi_rready (m_axi_rready), // Templated - .s_axi_wid (m_axi_wid[S_IDW-1:0]), // Templated - .s_axi_wdata (m_axi_wdata[31:0]), // Templated - .s_axi_wlast (m_axi_wlast), // Templated - .s_axi_wstrb (m_axi_wstrb[3:0]), // Templated - .s_axi_wvalid (m_axi_wvalid)); // Templated - -endmodule -// Local Variables: -// verilog-library-directories:("." "../hdl" "../../emesh/dv" "../../axi/dv" "../../emesh/hdl" "../../memory/hdl" "../../axi/hdl") -// End: - -////////////////////////////////////////////////////////////////////////////// -// The MIT License (MIT) // -// // -// Copyright (c) 2015-2016, Adapteva, Inc. // -// // -// Permission is hereby granted, free of charge, to any person obtaining a // -// copy of this software and associated documentation files (the "Software")// -// to deal in the Software without restriction, including without limitation// -// the rights to use, copy, modify, merge, publish, distribute, sublicense, // -// and/or sell copies of the Software, and to permit persons to whom the // -// Software is furnished to do so, subject to the following conditions: // -// // -// The above copyright notice and this permission notice shall be included // -// in all copies or substantial portions of the Software. // -// // -// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS // -// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF // -// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. // -// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY // -// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT// -// OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR // -// THE USE OR OTHER DEALINGS IN THE SOFTWARE. // -// // -////////////////////////////////////////////////////////////////////////////// diff --git a/src/accelerator/dv/tests/test_basic.emf b/src/accelerator/dv/tests/test_basic.emf deleted file mode 100644 index 8d59055..0000000 --- a/src/accelerator/dv/tests/test_basic.emf +++ /dev/null @@ -1,5 +0,0 @@ -DEADBEEF_00000001_810f0000_05_0010 //INPUT A -DEADBEEF_00000002_810f0004_05_0010 //INPUT B -00000000_DEADBEEF_810f0008_04_0010 //READ OUTPUT - - diff --git a/src/accelerator/fpga/ip_params.tcl b/src/accelerator/fpga/ip_params.tcl deleted file mode 100644 index dc95669..0000000 --- a/src/accelerator/fpga/ip_params.tcl +++ /dev/null @@ -1,22 +0,0 @@ -# NOTE: See UG1118 for more information - -set design axi_accelerator -set projdir ./ -set root "../.." -set partname "xc7z020clg400-1" - -set hdl_files [list \ - $root/accelerator/hdl \ - $root/common/hdl/ \ - $root/emesh/hdl \ - $root/emmu/hdl \ - $root/axi/hdl \ - $root/emailbox/hdl \ - $root/edma/hdl \ - $root/elink/hdl \ - ] - -set ip_files [] - -set constraints_files [] - diff --git a/src/accelerator/fpga/run_params.tcl b/src/accelerator/fpga/run_params.tcl deleted file mode 100644 index 6c584b2..0000000 --- a/src/accelerator/fpga/run_params.tcl +++ /dev/null @@ -1,19 +0,0 @@ - -#Design name ("system" recommended) -set design system - -#Project directory ("." recommended) -set projdir ./ - -#Device name -set partname "xc7z020clg400-1" - -#Paths to all IP blocks to use in Vivado "system.bd" - -set ip_repos [list "."] - -#All source files -set hdl_files [] - -#All constraints files -set constraints_files [] diff --git a/src/accelerator/fpga/system_bd.tcl b/src/accelerator/fpga/system_bd.tcl deleted file mode 100644 index fd27367..0000000 --- a/src/accelerator/fpga/system_bd.tcl +++ /dev/null @@ -1,215 +0,0 @@ - -################################################################ -# This is a generated script based on design: system -# -# Though there are limitations about the generated script, -# the main purpose of this utility is to make learning -# IP Integrator Tcl commands easier. -################################################################ - -################################################################ -# Check if script is running in correct Vivado version. -################################################################ -set scripts_vivado_version 2015.2 -set current_vivado_version [version -short] - -if { [string first $scripts_vivado_version $current_vivado_version] == -1 } { - puts "" - puts "ERROR: This script was generated using Vivado <$scripts_vivado_version> and is being run in <$current_vivado_version> of Vivado. Please run the script in Vivado <$scripts_vivado_version> then open the design in Vivado <$current_vivado_version>. Upgrade the design by running \"Tools => Report => Report IP Status...\", then run write_bd_tcl to create an updated script." - - return 1 -} - -################################################################ -# START -################################################################ - -# To test this script, run the following commands from Vivado Tcl console: -# source system_script.tcl - -# If you do not already have a project created, -# you can create a project using the following command: -# create_project project_1 myproj -part xc7z020clg400-1 - -# CHECKING IF PROJECT EXISTS -if { [get_projects -quiet] eq "" } { - puts "ERROR: Please open or create a project!" - return 1 -} - - - -# CHANGE DESIGN NAME HERE -set design_name system - -# If you do not already have an existing IP Integrator design open, -# you can create a design using the following command: -# create_bd_design $design_name - -# Creating design if needed -set errMsg "" -set nRet 0 - -set cur_design [current_bd_design -quiet] -set list_cells [get_bd_cells -quiet] - -if { ${design_name} eq "" } { - # USE CASES: - # 1) Design_name not set - - set errMsg "ERROR: Please set the variable to a non-empty value." - set nRet 1 - -} elseif { ${cur_design} ne "" && ${list_cells} eq "" } { - # USE CASES: - # 2): Current design opened AND is empty AND names same. - # 3): Current design opened AND is empty AND names diff; design_name NOT in project. - # 4): Current design opened AND is empty AND names diff; design_name exists in project. - - if { $cur_design ne $design_name } { - puts "INFO: Changing value of from <$design_name> to <$cur_design> since current design is empty." - set design_name [get_property NAME $cur_design] - } - puts "INFO: Constructing design in IPI design <$cur_design>..." - -} elseif { ${cur_design} ne "" && $list_cells ne "" && $cur_design eq $design_name } { - # USE CASES: - # 5) Current design opened AND has components AND same names. - - set errMsg "ERROR: Design <$design_name> already exists in your project, please set the variable to another value." - set nRet 1 -} elseif { [get_files -quiet ${design_name}.bd] ne "" } { - # USE CASES: - # 6) Current opened design, has components, but diff names, design_name exists in project. - # 7) No opened design, design_name exists in project. - - set errMsg "ERROR: Design <$design_name> already exists in your project, please set the variable to another value." - set nRet 2 - -} else { - # USE CASES: - # 8) No opened design, design_name not in project. - # 9) Current opened design, has components, but diff names, design_name not in project. - - puts "INFO: Currently there is no design <$design_name> in project, so creating one..." - - create_bd_design $design_name - - puts "INFO: Making design <$design_name> as current_bd_design." - current_bd_design $design_name - -} - -puts "INFO: Currently the variable is equal to \"$design_name\"." - -if { $nRet != 0 } { - puts $errMsg - return $nRet -} - -################################################################## -# DESIGN PROCs -################################################################## - - - -# Procedure to create entire design; Provide argument to make -# procedure reusable. If parentCell is "", will use root. -proc create_root_design { parentCell } { - - if { $parentCell eq "" } { - set parentCell [get_bd_cells /] - } - - # Get object for parentCell - set parentObj [get_bd_cells $parentCell] - if { $parentObj == "" } { - puts "ERROR: Unable to find parent cell <$parentCell>!" - return - } - - # Make sure parentObj is hier blk - set parentType [get_property TYPE $parentObj] - if { $parentType ne "hier" } { - puts "ERROR: Parent <$parentObj> has TYPE = <$parentType>. Expected to be ." - return - } - - # Save current instance; Restore later - set oldCurInst [current_bd_instance .] - - # Set parent object as current - current_bd_instance $parentObj - - - # Create interface ports - - # Create ports - - # Create instance: axi_accelerator_0, and set properties - set axi_accelerator_0 [ create_bd_cell -type ip -vlnv www.parallella.org:user:axi_accelerator:1.0 axi_accelerator_0 ] - - # Create instance: proc_sys_reset_0, and set properties - set proc_sys_reset_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:proc_sys_reset:5.0 proc_sys_reset_0 ] - - # Create instance: processing_system7_0, and set properties - set processing_system7_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:processing_system7:5.5 processing_system7_0 ] - set_property -dict [ list CONFIG.PCW_CORE0_FIQ_INTR {0} \ -CONFIG.PCW_ENET0_ENET0_IO {MIO 16 .. 27} CONFIG.PCW_ENET0_GRP_MDIO_ENABLE {1} \ -CONFIG.PCW_ENET0_PERIPHERAL_ENABLE {1} CONFIG.PCW_ENET1_PERIPHERAL_ENABLE {0} \ -CONFIG.PCW_EN_CLK3_PORT {1} CONFIG.PCW_FPGA0_PERIPHERAL_FREQMHZ {100} \ -CONFIG.PCW_FPGA3_PERIPHERAL_FREQMHZ {100} CONFIG.PCW_GPIO_EMIO_GPIO_ENABLE {1} \ -CONFIG.PCW_GPIO_MIO_GPIO_ENABLE {1} CONFIG.PCW_GPIO_MIO_GPIO_IO {MIO} \ -CONFIG.PCW_I2C0_I2C0_IO {EMIO} CONFIG.PCW_I2C0_PERIPHERAL_ENABLE {1} \ -CONFIG.PCW_I2C0_RESET_ENABLE {0} CONFIG.PCW_PRESET_BANK1_VOLTAGE {LVCMOS 1.8V} \ -CONFIG.PCW_QSPI_GRP_SINGLE_SS_ENABLE {1} CONFIG.PCW_QSPI_PERIPHERAL_ENABLE {1} \ -CONFIG.PCW_SD1_PERIPHERAL_ENABLE {1} CONFIG.PCW_SD1_SD1_IO {MIO 10 .. 15} \ -CONFIG.PCW_SDIO_PERIPHERAL_FREQMHZ {50} CONFIG.PCW_UART1_PERIPHERAL_ENABLE {1} \ -CONFIG.PCW_UART1_UART1_IO {MIO 8 .. 9} CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY0 {0.434} \ -CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY1 {0.398} CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY2 {0.410} \ -CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY3 {0.455} CONFIG.PCW_UIPARAM_DDR_CL {9} \ -CONFIG.PCW_UIPARAM_DDR_CWL {9} CONFIG.PCW_UIPARAM_DDR_DEVICE_CAPACITY {8192 MBits} \ -CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_0 {0.315} CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_1 {0.391} \ -CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2 {0.374} CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3 {0.271} \ -CONFIG.PCW_UIPARAM_DDR_DRAM_WIDTH {32 Bits} CONFIG.PCW_UIPARAM_DDR_FREQ_MHZ {400.00} \ -CONFIG.PCW_UIPARAM_DDR_PARTNO {Custom} CONFIG.PCW_UIPARAM_DDR_T_FAW {50} \ -CONFIG.PCW_UIPARAM_DDR_T_RAS_MIN {40} CONFIG.PCW_UIPARAM_DDR_T_RC {60} \ -CONFIG.PCW_UIPARAM_DDR_T_RCD {9} CONFIG.PCW_UIPARAM_DDR_T_RP {9} \ -CONFIG.PCW_UIPARAM_DDR_USE_INTERNAL_VREF {1} CONFIG.PCW_USB0_PERIPHERAL_ENABLE {1} \ -CONFIG.PCW_USB0_RESET_ENABLE {0} CONFIG.PCW_USB1_PERIPHERAL_ENABLE {1} \ -CONFIG.PCW_USE_FABRIC_INTERRUPT {1} CONFIG.PCW_USE_M_AXI_GP1 {1} \ -CONFIG.PCW_USE_S_AXI_HP1 {1} ] $processing_system7_0 - - # Create instance: processing_system7_0_axi_periph, and set properties - set processing_system7_0_axi_periph [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 processing_system7_0_axi_periph ] - set_property -dict [ list CONFIG.NUM_MI {1} ] $processing_system7_0_axi_periph - - # Create interface connections - connect_bd_intf_net -intf_net processing_system7_0_M_AXI_GP1 [get_bd_intf_pins processing_system7_0/M_AXI_GP1] [get_bd_intf_pins processing_system7_0_axi_periph/S00_AXI] - connect_bd_intf_net -intf_net processing_system7_0_axi_periph_M00_AXI [get_bd_intf_pins axi_accelerator_0/s_axi] [get_bd_intf_pins processing_system7_0_axi_periph/M00_AXI] - - # Create port connections - connect_bd_net -net proc_sys_reset_0_interconnect_aresetn [get_bd_pins proc_sys_reset_0/interconnect_aresetn] [get_bd_pins processing_system7_0_axi_periph/ARESETN] - connect_bd_net -net proc_sys_reset_0_peripheral_aresetn [get_bd_pins axi_accelerator_0/m_axi_aresetn] [get_bd_pins axi_accelerator_0/s_axi_aresetn] [get_bd_pins axi_accelerator_0/sys_nreset] [get_bd_pins proc_sys_reset_0/peripheral_aresetn] [get_bd_pins processing_system7_0_axi_periph/M00_ARESETN] [get_bd_pins processing_system7_0_axi_periph/S00_ARESETN] - connect_bd_net -net processing_system7_0_FCLK_CLK0 [get_bd_pins axi_accelerator_0/sys_clk] [get_bd_pins proc_sys_reset_0/slowest_sync_clk] [get_bd_pins processing_system7_0/FCLK_CLK0] [get_bd_pins processing_system7_0/M_AXI_GP0_ACLK] [get_bd_pins processing_system7_0/M_AXI_GP1_ACLK] [get_bd_pins processing_system7_0/S_AXI_HP1_ACLK] [get_bd_pins processing_system7_0_axi_periph/ACLK] [get_bd_pins processing_system7_0_axi_periph/M00_ACLK] [get_bd_pins processing_system7_0_axi_periph/S00_ACLK] - connect_bd_net -net processing_system7_0_FCLK_RESET0_N [get_bd_pins proc_sys_reset_0/ext_reset_in] [get_bd_pins processing_system7_0/FCLK_RESET0_N] - - # Create address segments - create_bd_addr_seg -range 0x40000000 -offset 0x80000000 [get_bd_addr_spaces processing_system7_0/Data] [get_bd_addr_segs axi_accelerator_0/s_axi/axi_lite] SEG_axi_accelerator_0_axi_lite - - - # Restore current instance - current_bd_instance $oldCurInst - - save_bd_design -} -# End of create_root_design() - - -################################################################## -# MAIN FLOW -################################################################## - -create_root_design "" - - diff --git a/src/accelerator/fpga/system_params.tcl b/src/accelerator/fpga/system_params.tcl deleted file mode 100644 index 8cfb21f..0000000 --- a/src/accelerator/fpga/system_params.tcl +++ /dev/null @@ -1,25 +0,0 @@ -# NOTE: See UG1118 for more information - -######################################### -# VARIABLES -######################################### -set design axi_accelerator -set projdir ./ -set root "../.." -set partname "xc7z020clg400-1" - -set hdl_files [list \ - $root/accelerator/hdl \ - $root/common/hdl/ \ - $root/emesh/hdl \ - $root/emmu/hdl \ - $root/axi/hdl \ - $root/emailbox/hdl \ - $root/edma/hdl \ - $root/elink/hdl \ - ] - -set ip_files [] - -set constraints_files [] - diff --git a/src/accelerator/hdl/accelerator.v b/src/accelerator/hdl/accelerator.v deleted file mode 100644 index b92c234..0000000 --- a/src/accelerator/hdl/accelerator.v +++ /dev/null @@ -1,210 +0,0 @@ -//############################################################################# -//# Purpose: A toy accelerator example ("put code here") # -//############################################################################# -//# Author: Andreas Olofsson # -//# License: MIT (see below) # -//############################################################################# - -`include "accelerator_regmap.vh" -module accelerator (/*AUTOARG*/ - // Outputs - m_wr_access, m_wr_packet, m_rd_access, m_rd_packet, m_rr_wait, - s_wr_wait, s_rd_wait, s_rr_access, s_rr_packet, - // Inputs - clk, nreset, m_wr_wait, m_rd_wait, m_rr_access, m_rr_packet, - s_wr_access, s_wr_packet, s_rd_access, s_rd_packet, s_rr_wait - ); - - //############################################################## - //#INTERFACE - //############################################################### - - parameter AW = 32; //native address width - parameter PW = 2 * AW + 40; //packet width - parameter ID = 12'h810; //epiphany ID for elink (ie addr[31:20]) - parameter RFAW = 6; - - //clock and reset - input clk; // single system clock for master/slave FIFOs - input nreset; // reset for axi facing logic (active low) - - //############################ - // ACCELERATOR GENERATERD - //############################ - //Master Write (from RX) - output m_wr_access; - output [PW-1:0] m_wr_packet; - input m_wr_wait; - - //Master Read Request - output m_rd_access; - output [PW-1:0] m_rd_packet; - input m_rd_wait; - - //Master Read Response - input m_rr_access; - input [PW-1:0] m_rr_packet; - output m_rr_wait; - - //############################ - // HOST GENERATERD - //############################ - //Slave Write - input s_wr_access; - input [PW-1:0] s_wr_packet; - output s_wr_wait; - - //Slave Read Request - input s_rd_access; - input [PW-1:0] s_rd_packet; - output s_rd_wait; - - //Slave Read Response - output s_rr_access; - output [PW-1:0] s_rr_packet; - input s_rr_wait; - - //############################################################## - //#BODY - //############################################################### - wire access_in; - wire [PW-1:0] packet_in; - reg [31:0] data_out; - reg s_rr_access; - wire [31:0] result; - reg [31:0] reg_input0; - reg [31:0] reg_input1; - - /*AUTOWIRE*/ - // Beginning of automatic wires (for undeclared instantiated-module outputs) - wire [4:0] ctrlmode_in; // From s_wr of packet2emesh.v - wire [AW-1:0] data_in; // From s_wr of packet2emesh.v - wire [1:0] datamode_in; // From s_wr of packet2emesh.v - wire [AW-1:0] dstaddr_in; // From s_wr of packet2emesh.v - wire [AW-1:0] srcaddr_in; // From s_wr of packet2emesh.v - wire write_in; // From s_wr of packet2emesh.v - // End of automatics - - //############################ - // INPUTS - //############################ - - emesh_mux #(.N(2),.AW(AW)) - mux2(// Outputs - .wait_out ({s_rd_wait, s_wr_wait}), - .access_out (access_in), - .packet_out (packet_in[PW-1:0]), - // Inputs - .access_in ({s_rd_access, s_wr_access}), - .packet_in ({s_rd_packet[PW-1:0],s_wr_packet[PW-1:0]}), - .wait_in (s_rr_wait) - ); - - packet2emesh #(.AW(AW)) - s_wr(/*AUTOINST*/ - // Outputs - .write_in (write_in), - .datamode_in (datamode_in[1:0]), - .ctrlmode_in (ctrlmode_in[4:0]), - .dstaddr_in (dstaddr_in[AW-1:0]), - .srcaddr_in (srcaddr_in[AW-1:0]), - .data_in (data_in[AW-1:0]), - // Inputs - .packet_in (packet_in[PW-1:0])); // Templated // Templated) - - - //##################### - //#CONTROL LOGIC - //##################### - - //registers - assign acc_match = access_in & - (dstaddr_in[31:20]==ID) & - (dstaddr_in[19:16]==`EGROUP_MMR); - - assign input0_match = acc_match & (dstaddr_in[RFAW+1:2]==`REG_INPUT0); - assign input1_match = acc_match & (dstaddr_in[RFAW+1:2]==`REG_INPUT1); - assign output_match = acc_match & (dstaddr_in[RFAW+1:2]==`REG_OUTPUT); - - assign input0_write = input0_match & write_in; - assign input1_write = input1_match & write_in; - assign output_read = output_match & ~write_in; - - //input0 - always @ (posedge clk) - if(input0_write) - reg_input0[31:0] <= data_in[31:0]; - - //input1 - always @ (posedge clk) - if(input1_write) - reg_input1[31:0] <= data_in[31:0]; - - - //############################# - //#ACCELERATOR - //############################# - - //(PUT CODE HERE!) - assign result[31:0] = reg_input0[31:0] + reg_input1[31:0]; - - //######################### - //#READBACK WITH PIPELINE - //######################### - - always @ (posedge clk) - if(~nreset) - s_rr_access <= 'b0; - else - s_rr_access <= output_read; - - always @ (posedge clk) - data_out[31:0] <= result[31:0]; - - emesh2packet #(.AW(32)) - p2e (.packet_out (s_rr_packet[PW-1:0]), - .write_out (1'b1), - .datamode_out (2'b10), - .ctrlmode_out (5'b0), - .dstaddr_out (32'b0), - .srcaddr_out (32'b0), - /*AUTOINST*/ - // Inputs - .data_out (data_out[AW-1:0])); - -endmodule // elink - - -// Local Variables: -// verilog-library-directories:("." "../../common/hdl" "../../emesh/hdl" ) -// End: - - -////////////////////////////////////////////////////////////////////////////// -// The MIT License (MIT) // -// // -// Copyright (c) 2015-2016, Adapteva, Inc. // -// // -// Permission is hereby granted, free of charge, to any person obtaining a // -// copy of this software and associated documentation files (the "Software")// -// to deal in the Software without restriction, including without limitation// -// the rights to use, copy, modify, merge, publish, distribute, sublicense, // -// and/or sell copies of the Software, and to permit persons to whom the // -// Software is furnished to do so, subject to the following conditions: // -// // -// The above copyright notice and this permission notice shall be included // -// in all copies or substantial portions of the Software. // -// // -// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS // -// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF // -// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. // -// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY // -// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT// -// OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR // -// THE USE OR OTHER DEALINGS IN THE SOFTWARE. // -// // -////////////////////////////////////////////////////////////////////////////// - - - - diff --git a/src/accelerator/hdl/accelerator_regmap.vh b/src/accelerator/hdl/accelerator_regmap.vh deleted file mode 100644 index fc29aba..0000000 --- a/src/accelerator/hdl/accelerator_regmap.vh +++ /dev/null @@ -1,14 +0,0 @@ -`ifndef EMAILBOX_REGMAP_V_ - `define EMAILBOX_REGMAP_V_ - - `ifndef EGROUP_MMR - `define EGROUP_MMR 4'hf - `endif - - `define REG_INPUT0 6'h0 - `define REG_INPUT1 6'h1 - `define REG_OUTPUT 6'h2 - - `endif - - diff --git a/src/accelerator/hdl/axi_accelerator.v b/src/accelerator/hdl/axi_accelerator.v deleted file mode 100644 index d687377..0000000 --- a/src/accelerator/hdl/axi_accelerator.v +++ /dev/null @@ -1,341 +0,0 @@ -//############################################################################# -//# Purpose: Toy accelerator example with axi master/slave interface # -//############################################################################# -//# Author: Andreas Olofsson # -//# License: MIT (see below) # -//############################################################################# - -module axi_accelerator(/*AUTOARG*/ - // Outputs - irq, m_axi_awid, m_axi_awaddr, m_axi_awlen, m_axi_awsize, - m_axi_awburst, m_axi_awlock, m_axi_awcache, m_axi_awprot, - m_axi_awqos, m_axi_awvalid, m_axi_wid, m_axi_wdata, m_axi_wstrb, - m_axi_wlast, m_axi_wvalid, m_axi_bready, m_axi_arid, m_axi_araddr, - m_axi_arlen, m_axi_arsize, m_axi_arburst, m_axi_arlock, - m_axi_arcache, m_axi_arprot, m_axi_arqos, m_axi_arvalid, - m_axi_rready, s_axi_arready, s_axi_awready, s_axi_bid, s_axi_bresp, - s_axi_bvalid, s_axi_rid, s_axi_rdata, s_axi_rlast, s_axi_rresp, - s_axi_rvalid, s_axi_wready, - // Inputs - sys_nreset, sys_clk, m_axi_aresetn, m_axi_awready, m_axi_wready, - m_axi_bid, m_axi_bresp, m_axi_bvalid, m_axi_arready, m_axi_rid, - m_axi_rdata, m_axi_rresp, m_axi_rlast, m_axi_rvalid, s_axi_aresetn, - s_axi_arid, s_axi_araddr, s_axi_arburst, s_axi_arcache, - s_axi_arlock, s_axi_arlen, s_axi_arprot, s_axi_arqos, s_axi_arsize, - s_axi_arvalid, s_axi_awid, s_axi_awaddr, s_axi_awburst, - s_axi_awcache, s_axi_awlock, s_axi_awlen, s_axi_awprot, - s_axi_awqos, s_axi_awsize, s_axi_awvalid, s_axi_bready, - s_axi_rready, s_axi_wid, s_axi_wdata, s_axi_wlast, s_axi_wstrb, - s_axi_wvalid - ); - - //######################################################## - // INTERFACE - //######################################################## - parameter AW = 32; // address width - parameter PW = 2*AW+40; // packet width - parameter ID = 12'h810; // addr[31:20] id - parameter S_IDW = 12; // ID width for S_AXI - parameter M_IDW = 6; // ID width for M_AXI - - //clk, reset - input sys_nreset; // active low async reset - input sys_clk; // system clock for AXI - - //Interrupt - output irq; // accelerator interrupt - - //AXI master - input m_axi_aresetn; // global reset singal. - output [M_IDW-1:0] m_axi_awid; // write address ID - output [31 : 0] m_axi_awaddr; // master interface write address - output [7 : 0] m_axi_awlen; // burst length. - output [2 : 0] m_axi_awsize; // burst size. - output [1 : 0] m_axi_awburst; // burst type. - output m_axi_awlock; // lock type - output [3 : 0] m_axi_awcache; // memory type. - output [2 : 0] m_axi_awprot; // protection type. - output [3 : 0] m_axi_awqos; // quality of service - output m_axi_awvalid; // write address valid - input m_axi_awready; // write address ready - output [M_IDW-1:0] m_axi_wid; - output [63 : 0] m_axi_wdata; // master interface write data. - output [7 : 0] m_axi_wstrb; // byte write strobes - output m_axi_wlast; // last transfer in a write burst. - output m_axi_wvalid; // indicates data is ready to go - input m_axi_wready; // slave is ready for data - input [M_IDW-1:0] m_axi_bid; - input [1 : 0] m_axi_bresp; // status of the write transaction. - input m_axi_bvalid; // valid write response - output m_axi_bready; // master can accept write response. - output [M_IDW-1:0] m_axi_arid; // read address ID - output [31 : 0] m_axi_araddr; // initial address of a read burst - output [7 : 0] m_axi_arlen; // burst length - output [2 : 0] m_axi_arsize; // burst size - output [1 : 0] m_axi_arburst; // burst type - output m_axi_arlock; // lock type - output [3 : 0] m_axi_arcache; // memory type - output [2 : 0] m_axi_arprot; // protection type - output [3 : 0] m_axi_arqos; // -- - output m_axi_arvalid; // read address and control is valid - input m_axi_arready; // slave is ready to accept an address - input [M_IDW-1:0] m_axi_rid; - input [63 : 0] m_axi_rdata; // master read data - input [1 : 0] m_axi_rresp; // status of the read transfer - input m_axi_rlast; // signals last transfer in a read burst - input m_axi_rvalid; // signaling the required read data - output m_axi_rready; // master can accept the readback data - - //AXI slave - input s_axi_aresetn; - input [S_IDW-1:0] s_axi_arid; //write address ID - input [31:0] s_axi_araddr; - input [1:0] s_axi_arburst; - input [3:0] s_axi_arcache; - input s_axi_arlock; - input [7:0] s_axi_arlen; - input [2:0] s_axi_arprot; - input [3:0] s_axi_arqos; - output s_axi_arready; - input [2:0] s_axi_arsize; - input s_axi_arvalid; - input [S_IDW-1:0] s_axi_awid; //write address ID - input [31:0] s_axi_awaddr; - input [1:0] s_axi_awburst; - input [3:0] s_axi_awcache; - input s_axi_awlock; - input [7:0] s_axi_awlen; - input [2:0] s_axi_awprot; - input [3:0] s_axi_awqos; - input [2:0] s_axi_awsize; - input s_axi_awvalid; - output s_axi_awready; - output [S_IDW-1:0] s_axi_bid; //write address ID - output [1:0] s_axi_bresp; - output s_axi_bvalid; - input s_axi_bready; - output [S_IDW-1:0] s_axi_rid; //write address ID - output [31:0] s_axi_rdata; - output s_axi_rlast; - output [1:0] s_axi_rresp; - output s_axi_rvalid; - input s_axi_rready; - input [S_IDW-1:0] s_axi_wid; //write address ID - input [31:0] s_axi_wdata; - input s_axi_wlast; - input [3:0] s_axi_wstrb; - input s_axi_wvalid; - output s_axi_wready; - - //######################################################## - // BODY - //######################################################## - - /*AUTOINPUT*/ - /*AUTOOUTPUT*/ - // End of automatics - - /*AUTOWIRE*/ - // Beginning of automatic wires (for undeclared instantiated-module outputs) - wire m_rd_access; // From accelerator of accelerator.v - wire [PW-1:0] m_rd_packet; // From accelerator of accelerator.v - wire m_rd_wait; // From emaxi of emaxi.v - wire m_rr_access; // From emaxi of emaxi.v - wire [PW-1:0] m_rr_packet; // From emaxi of emaxi.v - wire m_rr_wait; // From accelerator of accelerator.v - wire m_wr_access; // From accelerator of accelerator.v - wire [PW-1:0] m_wr_packet; // From accelerator of accelerator.v - wire m_wr_wait; // From emaxi of emaxi.v - wire s_rd_access; // From esaxi of esaxi.v - wire [PW-1:0] s_rd_packet; // From esaxi of esaxi.v - wire s_rd_wait; // From accelerator of accelerator.v - wire s_rr_access; // From accelerator of accelerator.v - wire [PW-1:0] s_rr_packet; // From accelerator of accelerator.v - wire s_rr_wait; // From esaxi of esaxi.v - wire s_wr_access; // From esaxi of esaxi.v - wire [PW-1:0] s_wr_packet; // From esaxi of esaxi.v - wire s_wr_wait; // From accelerator of accelerator.v - // End of automatics - accelerator accelerator (.clk (sys_clk), - .nreset (sys_nreset), - /*AUTOINST*/ - // Outputs - .m_wr_access (m_wr_access), - .m_wr_packet (m_wr_packet[PW-1:0]), - .m_rd_access (m_rd_access), - .m_rd_packet (m_rd_packet[PW-1:0]), - .m_rr_wait (m_rr_wait), - .s_wr_wait (s_wr_wait), - .s_rd_wait (s_rd_wait), - .s_rr_access (s_rr_access), - .s_rr_packet (s_rr_packet[PW-1:0]), - // Inputs - .m_wr_wait (m_wr_wait), - .m_rd_wait (m_rd_wait), - .m_rr_access (m_rr_access), - .m_rr_packet (m_rr_packet[PW-1:0]), - .s_wr_access (s_wr_access), - .s_wr_packet (s_wr_packet[PW-1:0]), - .s_rd_access (s_rd_access), - .s_rd_packet (s_rd_packet[PW-1:0]), - .s_rr_wait (s_rr_wait)); - - - //######################################################## - //AXI SLAVE - //######################################################## - /*esaxi AUTO_TEMPLATE (//Stimulus - .rr_\(.*\) (s_rr_\1[]), - .rd_\(.*\) (s_rd_\1[]), - .wr_\(.*\) (s_wr_\1[]), - ); - */ - - esaxi #(.S_IDW(S_IDW)) - esaxi (.s_axi_aclk (sys_clk), - /*AUTOINST*/ - // Outputs - .wr_access (s_wr_access), // Templated - .wr_packet (s_wr_packet[PW-1:0]), // Templated - .rd_access (s_rd_access), // Templated - .rd_packet (s_rd_packet[PW-1:0]), // Templated - .rr_wait (s_rr_wait), // Templated - .s_axi_arready (s_axi_arready), - .s_axi_awready (s_axi_awready), - .s_axi_bid (s_axi_bid[S_IDW-1:0]), - .s_axi_bresp (s_axi_bresp[1:0]), - .s_axi_bvalid (s_axi_bvalid), - .s_axi_rid (s_axi_rid[S_IDW-1:0]), - .s_axi_rdata (s_axi_rdata[31:0]), - .s_axi_rlast (s_axi_rlast), - .s_axi_rresp (s_axi_rresp[1:0]), - .s_axi_rvalid (s_axi_rvalid), - .s_axi_wready (s_axi_wready), - // Inputs - .wr_wait (s_wr_wait), // Templated - .rd_wait (s_rd_wait), // Templated - .rr_access (s_rr_access), // Templated - .rr_packet (s_rr_packet[PW-1:0]), // Templated - .s_axi_aresetn (s_axi_aresetn), - .s_axi_arid (s_axi_arid[S_IDW-1:0]), - .s_axi_araddr (s_axi_araddr[31:0]), - .s_axi_arburst (s_axi_arburst[1:0]), - .s_axi_arcache (s_axi_arcache[3:0]), - .s_axi_arlock (s_axi_arlock), - .s_axi_arlen (s_axi_arlen[7:0]), - .s_axi_arprot (s_axi_arprot[2:0]), - .s_axi_arqos (s_axi_arqos[3:0]), - .s_axi_arsize (s_axi_arsize[2:0]), - .s_axi_arvalid (s_axi_arvalid), - .s_axi_awid (s_axi_awid[S_IDW-1:0]), - .s_axi_awaddr (s_axi_awaddr[31:0]), - .s_axi_awburst (s_axi_awburst[1:0]), - .s_axi_awcache (s_axi_awcache[3:0]), - .s_axi_awlock (s_axi_awlock), - .s_axi_awlen (s_axi_awlen[7:0]), - .s_axi_awprot (s_axi_awprot[2:0]), - .s_axi_awqos (s_axi_awqos[3:0]), - .s_axi_awsize (s_axi_awsize[2:0]), - .s_axi_awvalid (s_axi_awvalid), - .s_axi_bready (s_axi_bready), - .s_axi_rready (s_axi_rready), - .s_axi_wid (s_axi_wid[S_IDW-1:0]), - .s_axi_wdata (s_axi_wdata[31:0]), - .s_axi_wlast (s_axi_wlast), - .s_axi_wstrb (s_axi_wstrb[3:0]), - .s_axi_wvalid (s_axi_wvalid)); - - //######################################################## - //AXI MASTER INTERFACE - //######################################################## - /*emaxi AUTO_TEMPLATE (//Stimulus - .rr_\(.*\) (m_rr_\1[]), - .rd_\(.*\) (m_rd_\1[]), - .wr_\(.*\) (m_wr_\1[]), - ); - */ - emaxi #(.M_IDW(M_IDW)) - emaxi (.m_axi_aclk (sys_clk), - /*AUTOINST*/ - // Outputs - .wr_wait (m_wr_wait), // Templated - .rd_wait (m_rd_wait), // Templated - .rr_access (m_rr_access), // Templated - .rr_packet (m_rr_packet[PW-1:0]), // Templated - .m_axi_awid (m_axi_awid[M_IDW-1:0]), - .m_axi_awaddr (m_axi_awaddr[31:0]), - .m_axi_awlen (m_axi_awlen[7:0]), - .m_axi_awsize (m_axi_awsize[2:0]), - .m_axi_awburst (m_axi_awburst[1:0]), - .m_axi_awlock (m_axi_awlock), - .m_axi_awcache (m_axi_awcache[3:0]), - .m_axi_awprot (m_axi_awprot[2:0]), - .m_axi_awqos (m_axi_awqos[3:0]), - .m_axi_awvalid (m_axi_awvalid), - .m_axi_wid (m_axi_wid[M_IDW-1:0]), - .m_axi_wdata (m_axi_wdata[63:0]), - .m_axi_wstrb (m_axi_wstrb[7:0]), - .m_axi_wlast (m_axi_wlast), - .m_axi_wvalid (m_axi_wvalid), - .m_axi_bready (m_axi_bready), - .m_axi_arid (m_axi_arid[M_IDW-1:0]), - .m_axi_araddr (m_axi_araddr[31:0]), - .m_axi_arlen (m_axi_arlen[7:0]), - .m_axi_arsize (m_axi_arsize[2:0]), - .m_axi_arburst (m_axi_arburst[1:0]), - .m_axi_arlock (m_axi_arlock), - .m_axi_arcache (m_axi_arcache[3:0]), - .m_axi_arprot (m_axi_arprot[2:0]), - .m_axi_arqos (m_axi_arqos[3:0]), - .m_axi_arvalid (m_axi_arvalid), - .m_axi_rready (m_axi_rready), - // Inputs - .wr_access (m_wr_access), // Templated - .wr_packet (m_wr_packet[PW-1:0]), // Templated - .rd_access (m_rd_access), // Templated - .rd_packet (m_rd_packet[PW-1:0]), // Templated - .rr_wait (m_rr_wait), // Templated - .m_axi_aresetn (m_axi_aresetn), - .m_axi_awready (m_axi_awready), - .m_axi_wready (m_axi_wready), - .m_axi_bid (m_axi_bid[M_IDW-1:0]), - .m_axi_bresp (m_axi_bresp[1:0]), - .m_axi_bvalid (m_axi_bvalid), - .m_axi_arready (m_axi_arready), - .m_axi_rid (m_axi_rid[M_IDW-1:0]), - .m_axi_rdata (m_axi_rdata[63:0]), - .m_axi_rresp (m_axi_rresp[1:0]), - .m_axi_rlast (m_axi_rlast), - .m_axi_rvalid (m_axi_rvalid)); - - -endmodule // elink -// Local Variables: -// verilog-library-directories:("." "../../axi/hdl") -// End: - - -////////////////////////////////////////////////////////////////////////////// -// The MIT License (MIT) // -// // -// Copyright (c) 2015-2016, Adapteva, Inc. // -// // -// Permission is hereby granted, free of charge, to any person obtaining a // -// copy of this software and associated documentation files (the "Software")// -// to deal in the Software without restriction, including without limitation// -// the rights to use, copy, modify, merge, publish, distribute, sublicense, // -// and/or sell copies of the Software, and to permit persons to whom the // -// Software is furnished to do so, subject to the following conditions: // -// // -// The above copyright notice and this permission notice shall be included // -// in all copies or substantial portions of the Software. // -// // -// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS // -// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF // -// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. // -// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY // -// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT// -// OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR // -// THE USE OR OTHER DEALINGS IN THE SOFTWARE. // -// // -////////////////////////////////////////////////////////////////////////////// diff --git a/src/accelerator/sw/driver.c b/src/accelerator/sw/driver.c deleted file mode 100644 index da0dd6a..0000000 --- a/src/accelerator/sw/driver.c +++ /dev/null @@ -1,103 +0,0 @@ -#include -#include -#include -#include -#include -#include - -unsigned page_size = 0; -int mem_fd = -1; - -//Declarations -int e_map(unsigned addr, void **ptr, unsigned *offset); -void e_unmap(void *ptr); -int e_read(unsigned addr, unsigned *data); -int e_write(unsigned addr, unsigned data); - -//############################################ -//# Read from device -//############################################ -int e_read(unsigned addr, unsigned *data) { - - int ret; - unsigned offset; - char *ptr; - - //Map device into memory - ret = e_map(addr, (void **)&ptr, &offset); - - //Read value from the device register - *data = *((unsigned *)(ptr + offset)); - - //Unmap device memory - e_unmap(ptr); - - return 0; -} -//############################################ -//# Write to device -//############################################ -int e_write(unsigned addr, unsigned data) { - int ret; - unsigned offset; - char *ptr; - - //Map device into memory - ret = e_map(addr, (void **)&ptr, &offset); - - //Write to register - *((unsigned *)(ptr + offset)) = data; - - //Unmap device memory - e_unmap(ptr); - - return 0; -} - -//############################################ -//# Map Memory Using Generic Epiphany driver -//############################################ -int e_map(unsigned addr, void **ptr, unsigned *offset) { - - unsigned page_addr; - - //What does this do?? - if(!page_size) - page_size = sysconf(_SC_PAGESIZE); - - //Open /dev/mem file if not already - if(mem_fd < 1) { - mem_fd = open ("/dev/epiphany", O_RDWR); - if (mem_fd < 1) { - perror("f_map"); - return -1; - } - } - - //Get page address - page_addr = (addr & (~(page_size-1))); - - if(offset != NULL) - *offset = addr - page_addr; - - //Perform mmap - *ptr = mmap(NULL, page_size, PROT_READ|PROT_WRITE, MAP_SHARED, - mem_fd, page_addr); - - //Check for errors - if(*ptr == MAP_FAILED || !*ptr) - return -2; - else - return 0; -} - -//######################################### -//# Unmap Memory -//######################################### -void e_unmap(void *ptr) { - - //Unmap memory - if(ptr && page_size){ - munmap(ptr, page_size); - } -} diff --git a/src/accelerator/sw/test.c b/src/accelerator/sw/test.c deleted file mode 100644 index ea2b606..0000000 --- a/src/accelerator/sw/test.c +++ /dev/null @@ -1,21 +0,0 @@ -#include - -#define REG_INPUT0 0x810f0000 -#define REG_INPUT1 0x810f0004 -#define REG_OUTPUT 0x810f0008 - -//Hello World Test -int main(int argc, char *argv[]) -{ - unsigned int data,rdata; - - //Write data to accelerator - data=2; - e_write(REG_INPUT0,data); - data=3; - e_write(REG_INPUT1,data); - - //read back result - e_read(REG_OUTPUT, &rdata); - printf ("RESULT=%d\n", rdata); -} diff --git a/src/aes/LICENSE b/src/aes/LICENSE deleted file mode 100644 index d645695..0000000 --- a/src/aes/LICENSE +++ /dev/null @@ -1,202 +0,0 @@ - - Apache License - Version 2.0, January 2004 - http://www.apache.org/licenses/ - - TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION - - 1. 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If You - institute patent litigation against any entity (including a - cross-claim or counterclaim in a lawsuit) alleging that the Work - or a Contribution incorporated within the Work constitutes direct - or contributory patent infringement, then any patent licenses - granted to You under this License for that Work shall terminate - as of the date such litigation is filed. - - 4. Redistribution. You may reproduce and distribute copies of the - Work or Derivative Works thereof in any medium, with or without - modifications, and in Source or Object form, provided that You - meet the following conditions: - - (a) You must give any other recipients of the Work or - Derivative Works a copy of this License; and - - (b) You must cause any modified files to carry prominent notices - stating that You changed the files; and - - (c) You must retain, in the Source form of any Derivative Works - that You distribute, all copyright, patent, trademark, and - attribution notices from the Source form of the Work, - excluding those notices that do not pertain to any part of - the Derivative Works; and - - (d) If the Work includes a "NOTICE" text file as part of its - distribution, then any Derivative Works that You distribute must - include a readable copy of the attribution notices contained - within such NOTICE file, excluding those notices that do not - pertain to any part of the Derivative Works, in at least one - of the following places: within a NOTICE text file distributed - as part of the Derivative Works; within the Source form or - documentation, if provided along with the Derivative Works; or, - within a display generated by the Derivative Works, if and - wherever such third-party notices normally appear. The contents - of the NOTICE file are for informational purposes only and - do not modify the License. You may add Your own attribution - notices within Derivative Works that You distribute, alongside - or as an addendum to the NOTICE text from the Work, provided - that such additional attribution notices cannot be construed - as modifying the License. - - You may add Your own copyright statement to Your modifications and - may provide additional or different license terms and conditions - for use, reproduction, or distribution of Your modifications, or - for any such Derivative Works as a whole, provided Your use, - reproduction, and distribution of the Work otherwise complies with - the conditions stated in this License. - - 5. Submission of Contributions. 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We also recommend that a - file or class name and description of purpose be included on the - same "printed page" as the copyright notice for easier - identification within third-party archives. - - Copyright [yyyy] [name of copyright owner] - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. diff --git a/src/aes/NOTICE b/src/aes/NOTICE deleted file mode 100644 index 8f70e46..0000000 --- a/src/aes/NOTICE +++ /dev/null @@ -1,13 +0,0 @@ -Copyright 2012, Homer Hsing - -Licensed under the Apache License, Version 2.0 (the "License"); -you may not use this file except in compliance with the License. -You may obtain a copy of the License at - -http://www.apache.org/licenses/LICENSE-2.0 - -Unless required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS, -WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -See the License for the specific language governing permissions and -limitations under the License. diff --git a/src/aes/docs/aes.pdf b/src/aes/docs/aes.pdf deleted file mode 100644 index 83b2ca6..0000000 Binary files a/src/aes/docs/aes.pdf and /dev/null differ diff --git a/src/aes/dv/README b/src/aes/dv/README deleted file mode 100644 index 1e8998e..0000000 --- a/src/aes/dv/README +++ /dev/null @@ -1,6 +0,0 @@ -This is a C-program which generates many expected test vectors. ~ ~ - -How to build: - gcc gen_test_case.c aes.c - -Enjoy ~ ~ diff --git a/src/aes/dv/Read_Me.txt b/src/aes/dv/Read_Me.txt deleted file mode 100644 index 98b4d33..0000000 --- a/src/aes/dv/Read_Me.txt +++ /dev/null @@ -1,9 +0,0 @@ -How to start the simulation - -1. simulation.do ----------------- -This file is a batch file for Modelsim to compile the HDL files, setup the wave file, and begin function simulation. The working directory of Modelsim must be the same directory of the batch file. - -2. test_aes_128.v ----------------------- -This file is the main test bench. It is self-checked. It feeds input data to the core and compare the correct result with the output of the core. If the output is wrong, the test bench will display an error message. diff --git a/src/aes/dv/aes.c b/src/aes/dv/aes.c deleted file mode 100644 index e981f46..0000000 --- a/src/aes/dv/aes.c +++ /dev/null @@ -1,386 +0,0 @@ -/* - * Copyright 2012, Homer Hsing - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "sbox.h" - -#ifndef LOCAL -#define LOCAL -#endif - -#define byte unsigned char -typedef unsigned int word; - -#define sub_byte(w) { \ - byte *b = (byte *)&w; \ - b[0] = table_0[b[0]*4]; \ - b[1] = table_0[b[1]*4]; \ - b[2] = table_0[b[2]*4]; \ - b[3] = table_0[b[3]*4]; \ -} -#define rot_up_8(x) x = (x << 8) | (x >> 24) -#define rot_16(x) x = (x << 16) | (x >> 16) -#define rot_down_8(x) x = (x >> 8) | (x << 24) -#define table_lookup { \ - p0 = t0[b[0]]; \ - p1 = t0[b[1]]; \ - p2 = t0[b[2]]; \ - p3 = t0[b[3]]; \ -} -#define final_mask if(is_final_round) { \ - p0 &= 0xFF; \ - p1 &= 0xFF00; \ - rot_16(p2); \ - p2 &= 0xFF0000; \ - rot_down_8(p3); \ - p3 &= 0xFF000000; \ -} else { \ - rot_up_8(p0); \ - rot_16(p1); \ - rot_down_8(p2); \ -} -#define rot { \ - rot_up_8(p0); \ - rot_16(p1); \ - rot_down_8(p2); \ -} - -void encrypt_128_key_expand_inline(word state[], word key[]) { - int nr = 10; - int i; - word k0 = key[0], k1 = key[1], k2 = key[2], k3 = key[3]; - state[0] ^= k0; - state[1] ^= k1; - state[2] ^= k2; - state[3] ^= k3; - word *t0 = (word *)table_0; - word y, p0, p1, p2, p3; - byte *b = (byte *)&y; - byte rcon = 1; - - for(i=1; i<=nr; i++) { - word temp = k3; - rot_down_8(temp); - sub_byte(temp); - temp ^= rcon; - int j = (char)rcon; - j <<= 1; - j ^= (j >> 8) & 0x1B; // if (rcon&0x80 != 0) then (j ^= 0x1B) - rcon = (byte)j; - k0 ^= temp; - k1 ^= k0; - k2 ^= k1; - k3 ^= k2; - - word z0 = k0, z1 = k1, z2 = k2, z3 = k3; - int is_final_round = i == nr; - - y = state[0]; - table_lookup; - final_mask; - z0 ^= p0, z3 ^= p1, z2 ^= p2, z1 ^= p3; - - y = state[1]; - table_lookup; - final_mask; - z1 ^= p0, z0 ^= p1, z3 ^= p2, z2 ^= p3; - - y = state[2]; - table_lookup; - final_mask; - z2 ^= p0, z1 ^= p1, z0 ^= p2, z3 ^= p3; - - y = state[3]; - table_lookup; - final_mask; - - state[0] = z0 ^ p3; - state[1] = z1 ^ p2; - state[2] = z2 ^ p1; - state[3] = z3 ^ p0; - } -} - -void encrypt_128_key_expand_inline_no_branch(word state[], word key[]) { - int nr = 10; - int i; - word k0 = key[0], k1 = key[1], k2 = key[2], k3 = key[3]; - state[0] ^= k0; - state[1] ^= k1; - state[2] ^= k2; - state[3] ^= k3; - word *t0 = (word *)table_0; - word p0, p1, p2, p3; - byte *b; - byte rcon = 1; - - for(i=1; i> 8) & 0x1B; // if (rcon&0x80 != 0) then (j ^= 0x1B) - rcon = (byte)j; - k0 ^= temp; - k1 ^= k0; - k2 ^= k1; - k3 ^= k2; - word z0 = k0, z1 = k1, z2 = k2, z3 = k3; - b = (byte *)state; table_lookup; rot; - z0 ^= p0, z3 ^= p1, z2 ^= p2, z1 ^= p3; - b += 4; table_lookup; rot; - z1 ^= p0, z0 ^= p1, z3 ^= p2, z2 ^= p3; - b += 4; table_lookup; rot; - z2 ^= p0, z1 ^= p1, z0 ^= p2, z3 ^= p3; - b += 4; table_lookup; rot; - state[0] = z0 ^ p3; - state[1] = z1 ^ p2; - state[2] = z2 ^ p1; - state[3] = z3 ^ p0; - } - word temp = k3; - rot_down_8(temp); - sub_byte(temp); - temp ^= rcon; - k0 ^= temp; - k1 ^= k0; - k2 ^= k1; - k3 ^= k2; - byte *a = (byte *)state, *t = table_0; - b = (byte *)&k0; - b[0] ^= t[a[0]*4], b[1] ^= t[a[5]*4], b[2] ^= t[a[10]*4], b[3] ^= t[a[15]*4]; - b = (byte *)&k1; - b[0] ^= t[a[4]*4], b[1] ^= t[a[9]*4], b[2] ^= t[a[14]*4], b[3] ^= t[a[3]*4]; - b = (byte *)&k2; - b[0] ^= t[a[8]*4], b[1] ^= t[a[13]*4], b[2] ^= t[a[2]*4], b[3] ^= t[a[7]*4]; - b = (byte *)&k3; - b[0] ^= t[a[12]*4], b[1] ^= t[a[1]*4], b[2] ^= t[a[6]*4], b[3] ^= t[a[11]*4]; - state[0] = k0; - state[1] = k1; - state[2] = k2; - state[3] = k3; -} - -void encrypt_192_key_expand_inline_no_branch(word state[], word key[]) { - int i = 1, j; - word *t0 = (word *)table_0; - word k0 = key[0], k1 = key[1], k2 = key[2], k3 = key[3], k4 = key[4], k5 = key[5]; - word p0, p1, p2, p3, z0, z1, z2, z3, temp; - byte *a = (byte *)state, *b, *t = table_0; - byte rcon = 1; - - state[0] ^= k0; state[1] ^= k1; state[2] ^= k2; state[3] ^= k3; - - goto a; - - for(; i<=3; i++) { // round 1 ~ round 9 - k4 ^= k3; k5 ^= k4; -a: temp = k5; - rot_down_8(temp); - sub_byte(temp); - temp ^= rcon; - j = (int)((char)rcon) << 1; - rcon = (byte) (((j >> 8) & 0x1B) ^ j); // if (rcon&0x80 != 0) then (j ^= 0x1B) - k0 ^= temp; k1 ^= k0; - - z0 = k4, z1 = k5, z2 = k0, z3 = k1; - b = (byte *)state; table_lookup; rot; - z0 ^= p0, z3 ^= p1, z2 ^= p2, z1 ^= p3; - b += 4; table_lookup; rot; - z1 ^= p0, z0 ^= p1, z3 ^= p2, z2 ^= p3; - b += 4; table_lookup; rot; - z2 ^= p0, z1 ^= p1, z0 ^= p2, z3 ^= p3; - b += 4; table_lookup; rot; - state[0] = z0 ^ p3; - state[1] = z1 ^ p2; - state[2] = z2 ^ p1; - state[3] = z3 ^ p0; - - k2 ^= k1; k3 ^= k2; k4 ^= k3; k5 ^= k4; - - z0 = k2, z1 = k3, z2 = k4, z3 = k5; - b = (byte *)state; table_lookup; rot; - z0 ^= p0, z3 ^= p1, z2 ^= p2, z1 ^= p3; - b += 4; table_lookup; rot; - z1 ^= p0, z0 ^= p1, z3 ^= p2, z2 ^= p3; - b += 4; table_lookup; rot; - z2 ^= p0, z1 ^= p1, z0 ^= p2, z3 ^= p3; - b += 4; table_lookup; rot; - state[0] = z0 ^ p3; - state[1] = z1 ^ p2; - state[2] = z2 ^ p1; - state[3] = z3 ^ p0; - - temp = k5; - rot_down_8(temp); - sub_byte(temp); - temp ^= rcon; - j = (int)((char)rcon) << 1; - rcon = (byte) (((j >> 8) & 0x1B) ^ j); // if (rcon&0x80 != 0) then (j ^= 0x1B) - k0 ^= temp; k1 ^= k0; k2 ^= k1; k3 ^= k2; - - z0 = k0, z1 = k1, z2 = k2, z3 = k3; - b = (byte *)state; table_lookup; rot; - z0 ^= p0, z3 ^= p1, z2 ^= p2, z1 ^= p3; - b += 4; table_lookup; rot; - z1 ^= p0, z0 ^= p1, z3 ^= p2, z2 ^= p3; - b += 4; table_lookup; rot; - z2 ^= p0, z1 ^= p1, z0 ^= p2, z3 ^= p3; - b += 4; table_lookup; rot; - state[0] = z0 ^ p3; - state[1] = z1 ^ p2; - state[2] = z2 ^ p1; - state[3] = z3 ^ p0; - } - // round 10 ~ 12 - - k4 ^= k3; k5 ^= k4; - temp = k5; - rot_down_8(temp); - sub_byte(temp); - temp ^= rcon; - j = (int)((char)rcon) << 1; - rcon = (byte) (((j >> 8) & 0x1B) ^ j); // if (rcon&0x80 != 0) then (j ^= 0x1B) - k0 ^= temp; k1 ^= k0; - - z0 = k4, z1 = k5, z2 = k0, z3 = k1; - b = (byte *)state; table_lookup; rot; - z0 ^= p0, z3 ^= p1, z2 ^= p2, z1 ^= p3; - b += 4; table_lookup; rot; - z1 ^= p0, z0 ^= p1, z3 ^= p2, z2 ^= p3; - b += 4; table_lookup; rot; - z2 ^= p0, z1 ^= p1, z0 ^= p2, z3 ^= p3; - b += 4; table_lookup; rot; - state[0] = z0 ^ p3; - state[1] = z1 ^ p2; - state[2] = z2 ^ p1; - state[3] = z3 ^ p0; - - k2 ^= k1; k3 ^= k2; k4 ^= k3; k5 ^= k4; - - z0 = k2, z1 = k3, z2 = k4, z3 = k5; - b = (byte *)state; table_lookup; rot; - z0 ^= p0, z3 ^= p1, z2 ^= p2, z1 ^= p3; - b += 4; table_lookup; rot; - z1 ^= p0, z0 ^= p1, z3 ^= p2, z2 ^= p3; - b += 4; table_lookup; rot; - z2 ^= p0, z1 ^= p1, z0 ^= p2, z3 ^= p3; - b += 4; table_lookup; rot; - state[0] = z0 ^ p3; - state[1] = z1 ^ p2; - state[2] = z2 ^ p1; - state[3] = z3 ^ p0; - - temp = k5; - rot_down_8(temp); - sub_byte(temp); - temp ^= rcon; - k0 ^= temp; k1 ^= k0; k2 ^= k1; k3 ^= k2; - b = (byte *)&k0; b[0] ^= t[a[0]*4], b[1] ^= t[a[5]*4], b[2] ^= t[a[10]*4], b[3] ^= t[a[15]*4]; - b = (byte *)&k1; b[0] ^= t[a[4]*4], b[1] ^= t[a[9]*4], b[2] ^= t[a[14]*4], b[3] ^= t[a[3]*4]; - b = (byte *)&k2; b[0] ^= t[a[8]*4], b[1] ^= t[a[13]*4], b[2] ^= t[a[2]*4], b[3] ^= t[a[7]*4]; - b = (byte *)&k3; b[0] ^= t[a[12]*4], b[1] ^= t[a[1]*4], b[2] ^= t[a[6]*4], b[3] ^= t[a[11]*4]; - state[0] = k0; - state[1] = k1; - state[2] = k2; - state[3] = k3; -} - -void encrypt_256_key_expand_inline_no_branch(word state[], word key[]) { - int i=1, j; - word *t0 = (word *)table_0; - word k0 = key[0], k1 = key[1], k2 = key[2], k3 = key[3], - k4 = key[4], k5 = key[5], k6 = key[6], k7 = key[7]; - word p0, p1, p2, p3, z0, z1, z2, z3, temp; - byte *a = (byte *)state, *b, *t = table_0; - byte rcon = 1; - - state[0] ^= k0; state[1] ^= k1; state[2] ^= k2; state[3] ^= k3; - - goto a; - - for(; i<=6; i++) { // round 1 ~ round 12 - temp = k3; sub_byte(temp); k4 ^= temp; - k5 ^= k4; k6 ^= k5; k7 ^= k6; - -a: z0 = k4, z1 = k5, z2 = k6, z3 = k7; - b = (byte *)state; table_lookup; rot; - z0 ^= p0, z3 ^= p1, z2 ^= p2, z1 ^= p3; - b += 4; table_lookup; rot; - z1 ^= p0, z0 ^= p1, z3 ^= p2, z2 ^= p3; - b += 4; table_lookup; rot; - z2 ^= p0, z1 ^= p1, z0 ^= p2, z3 ^= p3; - b += 4; table_lookup; rot; - state[0] = z0 ^ p3; - state[1] = z1 ^ p2; - state[2] = z2 ^ p1; - state[3] = z3 ^ p0; - - temp = k7; - rot_down_8(temp); - sub_byte(temp); - temp ^= rcon; - j = (int)((char)rcon) << 1; - rcon = (byte) (((j >> 8) & 0x1B) ^ j); // if (rcon&0x80 != 0) then (j ^= 0x1B) - k0 ^= temp; k1 ^= k0; k2 ^= k1; k3 ^= k2; - - z0 = k0, z1 = k1, z2 = k2, z3 = k3; - b = (byte *)state; table_lookup; rot; - z0 ^= p0, z3 ^= p1, z2 ^= p2, z1 ^= p3; - b += 4; table_lookup; rot; - z1 ^= p0, z0 ^= p1, z3 ^= p2, z2 ^= p3; - b += 4; table_lookup; rot; - z2 ^= p0, z1 ^= p1, z0 ^= p2, z3 ^= p3; - b += 4; table_lookup; rot; - state[0] = z0 ^ p3; - state[1] = z1 ^ p2; - state[2] = z2 ^ p1; - state[3] = z3 ^ p0; - } - // round 13 ~ 14 - - temp = k3; sub_byte(temp); k4 ^= temp; - k5 ^= k4; k6 ^= k5; k7 ^= k6; - - z0 = k4, z1 = k5, z2 = k6, z3 = k7; - b = (byte *)state; table_lookup; rot; - z0 ^= p0, z3 ^= p1, z2 ^= p2, z1 ^= p3; - b += 4; table_lookup; rot; - z1 ^= p0, z0 ^= p1, z3 ^= p2, z2 ^= p3; - b += 4; table_lookup; rot; - z2 ^= p0, z1 ^= p1, z0 ^= p2, z3 ^= p3; - b += 4; table_lookup; rot; - state[0] = z0 ^ p3; - state[1] = z1 ^ p2; - state[2] = z2 ^ p1; - state[3] = z3 ^ p0; - - temp = k7; - rot_down_8(temp); - sub_byte(temp); - temp ^= rcon; - k0 ^= temp; k1 ^= k0; k2 ^= k1; k3 ^= k2; - - b = (byte *)&k0; b[0] ^= t[a[0]*4], b[1] ^= t[a[5]*4], b[2] ^= t[a[10]*4], b[3] ^= t[a[15]*4]; - b = (byte *)&k1; b[0] ^= t[a[4]*4], b[1] ^= t[a[9]*4], b[2] ^= t[a[14]*4], b[3] ^= t[a[3]*4]; - b = (byte *)&k2; b[0] ^= t[a[8]*4], b[1] ^= t[a[13]*4], b[2] ^= t[a[2]*4], b[3] ^= t[a[7]*4]; - b = (byte *)&k3; b[0] ^= t[a[12]*4], b[1] ^= t[a[1]*4], b[2] ^= t[a[6]*4], b[3] ^= t[a[11]*4]; - state[0] = k0; - state[1] = k1; - state[2] = k2; - state[3] = k3; -} diff --git a/src/aes/dv/gen_test_case.c b/src/aes/dv/gen_test_case.c deleted file mode 100644 index 60ac2bd..0000000 --- a/src/aes/dv/gen_test_case.c +++ /dev/null @@ -1,100 +0,0 @@ -#include -#include - -typedef unsigned char byte; -typedef unsigned int word; - -void encrypt_128_key_expand_inline_no_branch(word state[], word key[]); -void encrypt_192_key_expand_inline_no_branch(word state[], word key[]); -void encrypt_256_key_expand_inline_no_branch(word state[], word key[]); - -word rand_word(); -void rand_word_array(word w[], int bit_num); -void print_verilog_hex(word w[], int bit_num); - -int main() { - const int num_case = 5; - int bit_num; - int i; - word state[4]; - word key[8]; - - bit_num = 128; - printf("AES-%d test cases:\n\n", bit_num); - for(i=0; i - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#define byte unsigned char -static byte table_0[] = { 99,99,165,198,124,124,132,248,119,119,153,238,123,123,141,246,242,242,13,255,107,107,189,214,111,111,177,222,197,197,84,145,48,48,80,96,1,1,3,2,103,103,169,206,43,43,125,86,254,254,25,231,215,215,98,181,171,171,230,77,118,118,154,236,202,202,69,143,130,130,157,31,201,201,64,137,125,125,135,250,250,250,21,239,89,89,235,178,71,71,201,142,240,240,11,251,173,173,236,65,212,212,103,179,162,162,253,95,175,175,234,69,156,156,191,35,164,164,247,83,114,114,150,228,192,192,91,155,183,183,194,117,253,253,28,225,147,147,174,61,38,38,106,76,54,54,90,108,63,63,65,126,247,247,2,245,204,204,79,131,52,52,92,104,165,165,244,81,229,229,52,209,241,241,8,249,113,113,147,226,216,216,115,171,49,49,83,98,21,21,63,42,4,4,12,8,199,199,82,149,35,35,101,70,195,195,94,157,24,24,40,48,150,150,161,55,5,5,15,10,154,154,181,47,7,7,9,14,18,18,54,36,128,128,155,27,226,226,61,223,235,235,38,205,39,39,105,78,178,178,205,127,117,117,159,234,9,9,27,18,131,131,158,29,44,44,116,88,26,26,46,52,27,27,45,54,110,110,178,220,90,90,238,180,160,160,251,91,82,82,246,164,59,59,77,118,214,214,97,183,179,179,206,125,41,41,123,82,227,227,62,221,47,47,113,94,132,132,151,19,83,83,245,166,209,209,104,185,0,0,0,0,237,237,44,193,32,32,96,64,252,252,31,227,177,177,200,121,91,91,237,182,106,106,190,212,203,203,70,141,190,190,217,103,57,57,75,114,74,74,222,148,76,76,212,152,88,88,232,176,207,207,74,133,208,208,107,187,239,239,42,197,170,170,229,79,251,251,22,237,67,67,197,134,77,77,215,154,51,51,85,102,133,133,148,17,69,69,207,138,249,249,16,233,2,2,6,4,127,127,129,254,80,80,240,160,60,60,68,120,159,159,186,37,168,168,227,75,81,81,243,162,163,163,254,93,64,64,192,128,143,143,138,5,146,146,173,63,157,157,188,33,56,56,72,112,245,245,4,241,188,188,223,99,182,182,193,119,218,218,117,175,33,33,99,66,16,16,48,32,255,255,26,229,243,243,14,253,210,210,109,191,205,205,76,129,12,12,20,24,19,19,53,38,236,236,47,195,95,95,225,190,151,151,162,53,68,68,204,136,23,23,57,46,196,196,87,147,167,167,242,85,126,126,130,252,61,61,71,122,100,100,172,200,93,93,231,186,25,25,43,50,115,115,149,230,96,96,160,192,129,129,152,25,79,79,209,158,220,220,127,163,34,34,102,68,42,42,126,84,144,144,171,59,136,136,131,11,70,70,202,140,238,238,41,199,184,184,211,107,20,20,60,40,222,222,121,167,94,94,226,188,11,11,29,22,219,219,118,173,224,224,59,219,50,50,86,100,58,58,78,116,10,10,30,20,73,73,219,146,6,6,10,12,36,36,108,72,92,92,228,184,194,194,93,159,211,211,110,189,172,172,239,67,98,98,166,196,145,145,168,57,149,149,164,49,228,228,55,211,121,121,139,242,231,231,50,213,200,200,67,139,55,55,89,110,109,109,183,218,141,141,140,1,213,213,100,177,78,78,210,156,169,169,224,73,108,108,180,216,86,86,250,172,244,244,7,243,234,234,37,207,101,101,175,202,122,122,142,244,174,174,233,71,8,8,24,16,186,186,213,111,120,120,136,240,37,37,111,74,46,46,114,92,28,28,36,56,166,166,241,87,180,180,199,115,198,198,81,151,232,232,35,203,221,221,124,161,116,116,156,232,31,31,33,62,75,75,221,150,189,189,220,97,139,139,134,13,138,138,133,15,112,112,144,224,62,62,66,124,181,181,196,113,102,102,170,204,72,72,216,144,3,3,5,6,246,246,1,247,14,14,18,28,97,97,163,194,53,53,95,106,87,87,249,174,185,185,208,105,134,134,145,23,193,193,88,153,29,29,39,58,158,158,185,39,225,225,56,217,248,248,19,235,152,152,179,43,17,17,51,34,105,105,187,210,217,217,112,169,142,142,137,7,148,148,167,51,155,155,182,45,30,30,34,60,135,135,146,21,233,233,32,201,206,206,73,135,85,85,255,170,40,40,120,80,223,223,122,165,140,140,143,3,161,161,248,89,137,137,128,9,13,13,23,26,191,191,218,101,230,230,49,215,66,66,198,132,104,104,184,208,65,65,195,130,153,153,176,41,45,45,119,90,15,15,17,30,176,176,203,123,84,84,252,168,187,187,214,109,22,22,58,44, }; diff --git a/src/aes/dv/simulation.do b/src/aes/dv/simulation.do deleted file mode 100644 index 3ca8ca0..0000000 --- a/src/aes/dv/simulation.do +++ /dev/null @@ -1,11 +0,0 @@ -vlib work -vlog ../rtl/*.v -vlog *.v -vsim -novopt test_aes_128 -add wave -noupdate -format Logic -radix unsigned /test_aes_128/clk -add wave -noupdate -divider input -add wave -noupdate -format Literal -radix hexadecimal /test_aes_128/state -add wave -noupdate -format Literal -radix hexadecimal /test_aes_128/key -add wave -noupdate -divider output -add wave -noupdate -format Literal -radix hexadecimal /test_aes_128/out -run -all diff --git a/src/aes/dv/test_aes_128.v b/src/aes/dv/test_aes_128.v deleted file mode 100644 index 84578cc..0000000 --- a/src/aes/dv/test_aes_128.v +++ /dev/null @@ -1,85 +0,0 @@ -/* - * Copyright 2012, Homer Hsing - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -`timescale 1ns / 1ps - -module test_aes_128; - - // Inputs - reg clk; - reg [127:0] state; - reg [127:0] key; - - // Outputs - wire [127:0] out; - - // Instantiate the Unit Under Test (UUT) - aes_128 uut ( - .clk(clk), - .state(state), - .key(key), - .out(out) - ); - - initial begin - clk = 0; - state = 0; - key = 0; - - #100; - /* - * TIMEGRP "key" OFFSET = IN 6.4 ns VALID 6 ns AFTER "clk" HIGH; - * TIMEGRP "state" OFFSET = IN 6.4 ns VALID 6 ns AFTER "clk" HIGH; - * TIMEGRP "out" OFFSET = OUT 2.2 ns BEFORE "clk" HIGH; - */ - @ (negedge clk); - # 2; - state = 128'h3243f6a8_885a308d_313198a2_e0370734; - key = 128'h2b7e1516_28aed2a6_abf71588_09cf4f3c; - #10; - state = 128'h00112233_44556677_8899aabb_ccddeeff; - key = 128'h00010203_04050607_08090a0b_0c0d0e0f; - #10; - state = 128'h0; - key = 128'h0; - #10; - state = 128'h0; - key = 128'h1; - #10; - state = 128'h1; - key = 128'h0; - #170; - if (out !== 128'h3925841d02dc09fbdc118597196a0b32) - begin $display("E"); $finish; end - #10; - if (out !== 128'h69_c4_e0_d8_6a_7b_04_30_d8_cd_b7_80_70_b4_c5_5a) - begin $display("E"); $finish; end - #10; - if (out !== 128'h66_e9_4b_d4_ef_8a_2c_3b_88_4c_fa_59_ca_34_2b_2e) - begin $display("E"); $finish; end - #10; - if (out !== 128'h05_45_aa_d5_6d_a2_a9_7c_36_63_d1_43_2a_3d_1c_84) - begin $display("E"); $finish; end - #10; - if (out !== 128'h58_e2_fc_ce_fa_7e_30_61_36_7f_1d_57_a4_e7_45_5a) - begin $display("E"); $finish; end - $display("Good."); - $finish; - end - - always #5 clk = ~clk; -endmodule - diff --git a/src/aes/dv/test_aes_192.v b/src/aes/dv/test_aes_192.v deleted file mode 100644 index 7e4a2ba..0000000 --- a/src/aes/dv/test_aes_192.v +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Copyright 2012, Homer Hsing - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -`timescale 1ns / 1ps - -module test_aes_192; - - // Inputs - reg clk; - reg [127:0] state; - reg [191:0] key; - - // Outputs - wire [127:0] out; - - // Instantiate the Unit Under Test (UUT) - aes_192 uut ( - .clk(clk), - .state(state), - .key(key), - .out(out) - ); - - initial begin - clk = 0; - state = 0; - key = 0; - - #100; - /* - * TIMEGRP "key" OFFSET = IN 6.4 ns VALID 6 ns AFTER "clk" HIGH; - * TIMEGRP "state" OFFSET = IN 6.4 ns VALID 6 ns AFTER "clk" HIGH; - * TIMEGRP "out" OFFSET = OUT 2.2 ns BEFORE "clk" HIGH; - */ - @ (negedge clk); - #2; - state = 128'h3243f6a8885a308d313198a2e0370734; - key = 192'h2b7e151628aed2a6abf7158809cf4f3c762e7160f38b4da5; - #10; - state = 128'h00112233445566778899aabbccddeeff; - key = 192'h000102030405060708090a0b0c0d0e0f1011121314151617; - #10; - state = 128'h0; - key = 192'h0; - #230; - if (out !== 128'hf9fb29aefc384a250340d833b87ebc00) - begin $display("E"); $finish; end - #10; - if (out !== 128'hdda97ca4864cdfe06eaf70a0ec0d7191) - begin $display("E"); $finish; end - $display("Good."); - $finish; - end - - always #5 clk = ~clk; -endmodule - diff --git a/src/aes/dv/test_aes_256.v b/src/aes/dv/test_aes_256.v deleted file mode 100644 index 1f6edbc..0000000 --- a/src/aes/dv/test_aes_256.v +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Copyright 2012, Homer Hsing - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -`timescale 1ns / 1ps - -module test_aes_256; - - // Inputs - reg clk; - reg [127:0] state; - reg [255:0] key; - - // Outputs - wire [127:0] out; - - // Instantiate the Unit Under Test (UUT) - aes_256 uut ( - .clk(clk), - .state(state), - .key(key), - .out(out) - ); - - initial begin - clk = 0; - state = 0; - key = 0; - - #100; - /* - * TIMEGRP "key" OFFSET = IN 6.4 ns VALID 6 ns AFTER "clk" HIGH; - * TIMEGRP "state" OFFSET = IN 6.4 ns VALID 6 ns AFTER "clk" HIGH; - * TIMEGRP "out" OFFSET = OUT 2.2 ns BEFORE "clk" HIGH; - */ - @ (negedge clk); - #2; - state = 128'h3243f6a8885a308d313198a2e0370734; - key = 256'h2b7e151628aed2a6abf7158809cf4f3c_762e7160f38b4da56a784d9045190cfe; - #10; - state = 128'h00112233445566778899aabbccddeeff; - key = 256'h000102030405060708090a0b0c0d0e0f_101112131415161718191a1b1c1d1e1f; - #10; - state = 128'h0; - key = 256'h0; - #270; - if (out !== 128'h1a6e6c2c_662e7da6_501ffb62_bc9e93f3) - begin $display("E"); $finish; end - #10; - if (out !== 128'h8ea2b7ca_516745bf_eafc4990_4b496089) - begin $display("E"); $finish; end - $display("Good."); - $finish; - end - - always #5 clk = ~clk; -endmodule - diff --git a/src/aes/dv/test_endian.v b/src/aes/dv/test_endian.v deleted file mode 100644 index a2fb8c1..0000000 --- a/src/aes/dv/test_endian.v +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Copyright 2012, Homer Hsing - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -`timescale 1ns / 1ps - -module test_endian; - - reg [31:0] i; - - initial begin - i = 32'h12345678; // big endian - #100; - $display("%h %h %h %h", i[31:24], i[23:16], i[15:8], i[7:0]); - // 12 34 56 78 - $finish; - end - -endmodule - diff --git a/src/aes/dv/test_table_lookup.v b/src/aes/dv/test_table_lookup.v deleted file mode 100644 index 65f7d5d..0000000 --- a/src/aes/dv/test_table_lookup.v +++ /dev/null @@ -1,57 +0,0 @@ -/* - * Copyright 2012, Homer Hsing - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -`timescale 1ns / 1ps - -module test_table_lookup; - - // Inputs - reg clk; - reg [31:0] state; - - // Outputs - wire [31:0] p0; - wire [31:0] p1; - wire [31:0] p2; - wire [31:0] p3; - - // Instantiate the Unit Under Test (UUT) - table_lookup uut ( - .clk(clk), - .state(state), - .p0(p0), - .p1(p1), - .p2(p2), - .p3(p3) - ); - - initial begin - clk = 0; - state = 0; - #100; - state = 31'h193de3be; - #10; - if (p0 !== 32'hb3_d4_d4_67) begin $display("E"); $finish; end - if (p1 !== 32'h69_4e_27_27) begin $display("E"); $finish; end - if (p2 !== 32'h11_33_22_11) begin $display("E"); $finish; end - if (p3 !== 32'hae_ae_e9_47) begin $display("E"); $finish; end - $display("Good."); - $finish; - end - - always #5 clk = ~clk; -endmodule - diff --git a/src/aes/hdl/aes_128.v b/src/aes/hdl/aes_128.v deleted file mode 100644 index 653f6be..0000000 --- a/src/aes/hdl/aes_128.v +++ /dev/null @@ -1,93 +0,0 @@ -/* - * Copyright 2012, Homer Hsing - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -module aes_128(clk, state, key, out); - input clk; - input [127:0] state, key; - output [127:0] out; - reg [127:0] s0, k0; - wire [127:0] s1, s2, s3, s4, s5, s6, s7, s8, s9, - k1, k2, k3, k4, k5, k6, k7, k8, k9, - k0b, k1b, k2b, k3b, k4b, k5b, k6b, k7b, k8b, k9b; - - always @ (posedge clk) - begin - s0 <= state ^ key; - k0 <= key; - end - - expand_key_128 - a1 (clk, k0, k1, k0b, 8'h1), - a2 (clk, k1, k2, k1b, 8'h2), - a3 (clk, k2, k3, k2b, 8'h4), - a4 (clk, k3, k4, k3b, 8'h8), - a5 (clk, k4, k5, k4b, 8'h10), - a6 (clk, k5, k6, k5b, 8'h20), - a7 (clk, k6, k7, k6b, 8'h40), - a8 (clk, k7, k8, k7b, 8'h80), - a9 (clk, k8, k9, k8b, 8'h1b), - a10 (clk, k9, , k9b, 8'h36); - - one_round - r1 (clk, s0, k0b, s1), - r2 (clk, s1, k1b, s2), - r3 (clk, s2, k2b, s3), - r4 (clk, s3, k3b, s4), - r5 (clk, s4, k4b, s5), - r6 (clk, s5, k5b, s6), - r7 (clk, s6, k6b, s7), - r8 (clk, s7, k7b, s8), - r9 (clk, s8, k8b, s9); - - final_round - rf (clk, s9, k9b, out); -endmodule - -module expand_key_128(clk, in, out_1, out_2, rcon); - input clk; - input [127:0] in; - input [7:0] rcon; - output reg [127:0] out_1; - output [127:0] out_2; - wire [31:0] k0, k1, k2, k3, - v0, v1, v2, v3; - reg [31:0] k0a, k1a, k2a, k3a; - wire [31:0] k0b, k1b, k2b, k3b, k4a; - - assign {k0, k1, k2, k3} = in; - - assign v0 = {k0[31:24] ^ rcon, k0[23:0]}; - assign v1 = v0 ^ k1; - assign v2 = v1 ^ k2; - assign v3 = v2 ^ k3; - - always @ (posedge clk) - {k0a, k1a, k2a, k3a} <= {v0, v1, v2, v3}; - - S4 - S4_0 (clk, {k3[23:0], k3[31:24]}, k4a); - - assign k0b = k0a ^ k4a; - assign k1b = k1a ^ k4a; - assign k2b = k2a ^ k4a; - assign k3b = k3a ^ k4a; - - always @ (posedge clk) - out_1 <= {k0b, k1b, k2b, k3b}; - - assign out_2 = {k0b, k1b, k2b, k3b}; -endmodule - diff --git a/src/aes/hdl/aes_192.v b/src/aes/hdl/aes_192.v deleted file mode 100644 index b07fe3b..0000000 --- a/src/aes/hdl/aes_192.v +++ /dev/null @@ -1,193 +0,0 @@ -/* - * Copyright 2012, Homer Hsing - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -module aes_192 (clk, state, key, out); - input clk; - input [127:0] state; - input [191:0] key; - output [127:0] out; - reg [127:0] s0; - reg [191:0] k0; - wire [127:0] s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11; - wire [191:0] k1, k2, k3, k4, k5, k6, k7, k8, k9, k10, k11; - wire [127:0] k0b, k1b, k2b, k3b, k4b, k5b, k6b, k7b, k8b, k9b, k10b, k11b; - - always @ (posedge clk) - begin - s0 <= state ^ key[191:64]; - k0 <= key; - end - - expand_key_type_D_192 a0 (clk, k0, 8'h1, k1, k0b); - expand_key_type_B_192 a1 (clk, k1, k2, k1b); - expand_key_type_A_192 a2 (clk, k2, 8'h2, k3, k2b); - expand_key_type_C_192 a3 (clk, k3, 8'h4, k4, k3b); - expand_key_type_B_192 a4 (clk, k4, k5, k4b); - expand_key_type_A_192 a5 (clk, k5, 8'h8, k6, k5b); - expand_key_type_C_192 a6 (clk, k6, 8'h10, k7, k6b); - expand_key_type_B_192 a7 (clk, k7, k8, k7b); - expand_key_type_A_192 a8 (clk, k8, 8'h20, k9, k8b); - expand_key_type_C_192 a9 (clk, k9, 8'h40, k10, k9b); - expand_key_type_B_192 a10 (clk,k10, k11, k10b); - expand_key_type_A_192 a11 (clk,k11, 8'h80, , k11b); - - one_round - r1 (clk, s0, k0b, s1), - r2 (clk, s1, k1b, s2), - r3 (clk, s2, k2b, s3), - r4 (clk, s3, k3b, s4), - r5 (clk, s4, k4b, s5), - r6 (clk, s5, k5b, s6), - r7 (clk, s6, k6b, s7), - r8 (clk, s7, k7b, s8), - r9 (clk, s8, k8b, s9), - r10 (clk, s9, k9b, s10), - r11 (clk, s10, k10b, s11); - - final_round - rf (clk, s11, k11b, out); -endmodule - -/* expand k0,k1,k2,k3 for every two clock cycles */ -module expand_key_type_A_192 (clk, in, rcon, out_1, out_2); - input clk; - input [191:0] in; - input [7:0] rcon; - output reg [191:0] out_1; - output [127:0] out_2; - wire [31:0] k0, k1, k2, k3, k4, k5, - v0, v1, v2, v3; - reg [31:0] k0a, k1a, k2a, k3a, k4a, k5a; - wire [31:0] k0b, k1b, k2b, k3b, k4b, k5b, k6a; - - assign {k0, k1, k2, k3, k4, k5} = in; - - assign v0 = {k0[31:24] ^ rcon, k0[23:0]}; - assign v1 = v0 ^ k1; - assign v2 = v1 ^ k2; - assign v3 = v2 ^ k3; - - always @ (posedge clk) - {k0a, k1a, k2a, k3a, k4a, k5a} <= {v0, v1, v2, v3, k4, k5}; - - S4 - S4_0 (clk, {k5[23:0], k5[31:24]}, k6a); - - assign k0b = k0a ^ k6a; - assign k1b = k1a ^ k6a; - assign k2b = k2a ^ k6a; - assign k3b = k3a ^ k6a; - assign {k4b, k5b} = {k4a, k5a}; - - always @ (posedge clk) - out_1 <= {k0b, k1b, k2b, k3b, k4b, k5b}; - - assign out_2 = {k0b, k1b, k2b, k3b}; -endmodule - -/* expand k2,k3,k4,k5 for every two clock cycles */ -module expand_key_type_B_192 (clk, in, out_1, out_2); - input clk; - input [191:0] in; - output reg [191:0] out_1; - output [127:0] out_2; - wire [31:0] k0, k1, k2, k3, k4, k5, - v2, v3, v4, v5; - reg [31:0] k0a, k1a, k2a, k3a, k4a, k5a; - - assign {k0, k1, k2, k3, k4, k5} = in; - - assign v2 = k1 ^ k2; - assign v3 = v2 ^ k3; - assign v4 = v3 ^ k4; - assign v5 = v4 ^ k5; - - always @ (posedge clk) - {k0a, k1a, k2a, k3a, k4a, k5a} <= {k0, k1, v2, v3, v4, v5}; - - always @ (posedge clk) - out_1 <= {k0a, k1a, k2a, k3a, k4a, k5a}; - - assign out_2 = {k2a, k3a, k4a, k5a}; -endmodule - -/* expand k0,k1,k4,k5 for every two clock cycles */ -module expand_key_type_C_192 (clk, in, rcon, out_1, out_2); - input clk; - input [191:0] in; - input [7:0] rcon; - output reg [191:0] out_1; - output [127:0] out_2; - wire [31:0] k0, k1, k2, k3, k4, k5, - v4, v5, v0, v1; - reg [31:0] k0a, k1a, k2a, k3a, k4a, k5a; - wire [31:0] k0b, k1b, k2b, k3b, k4b, k5b, k6a; - - assign {k0, k1, k2, k3, k4, k5} = in; - - assign v4 = k3 ^ k4; - assign v5 = v4 ^ k5; - assign v0 = {k0[31:24] ^ rcon, k0[23:0]}; - assign v1 = v0 ^ k1; - - always @ (posedge clk) - {k0a, k1a, k2a, k3a, k4a, k5a} <= {v0, v1, k2, k3, v4, v5}; - - S4 - S4_0 (clk, {v5[23:0], v5[31:24]}, k6a); - - assign k0b = k0a ^ k6a; - assign k1b = k1a ^ k6a; - assign {k2b, k3b, k4b, k5b} = {k2a, k3a, k4a, k5a}; - - always @ (posedge clk) - out_1 <= {k0b, k1b, k2b, k3b, k4b, k5b}; - - assign out_2 = {k4b, k5b, k0b, k1b}; -endmodule - -/* expand k0,k1 for every two clock cycles */ -module expand_key_type_D_192 (clk, in, rcon, out_1, out_2); - input clk; - input [191:0] in; - input [7:0] rcon; - output reg [191:0] out_1; - output [127:0] out_2; - wire [31:0] k0, k1, k2, k3, k4, k5, - v0, v1; - reg [31:0] k0a, k1a, k2a, k3a, k4a, k5a; - wire [31:0] k0b, k1b, k2b, k3b, k4b, k5b, k6a; - - assign {k0, k1, k2, k3, k4, k5} = in; - - assign v0 = {k0[31:24] ^ rcon, k0[23:0]}; - assign v1 = v0 ^ k1; - - always @ (posedge clk) - {k0a, k1a, k2a, k3a, k4a, k5a} <= {v0, v1, k2, k3, k4, k5}; - - S4 - S4_0 (clk, {k5[23:0], k5[31:24]}, k6a); - - assign k0b = k0a ^ k6a; - assign k1b = k1a ^ k6a; - assign {k2b, k3b, k4b, k5b} = {k2a, k3a, k4a, k5a}; - - always @ (posedge clk) - out_1 <= {k0b, k1b, k2b, k3b, k4b, k5b}; - - assign out_2 = {k4b, k5b, k0b, k1b}; -endmodule diff --git a/src/aes/hdl/aes_256.v b/src/aes/hdl/aes_256.v deleted file mode 100644 index bf20935..0000000 --- a/src/aes/hdl/aes_256.v +++ /dev/null @@ -1,148 +0,0 @@ -/* - * Copyright 2012, Homer Hsing - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -module aes_256 (clk, state, key, out); - input clk; - input [127:0] state; - input [255:0] key; - output [127:0] out; - reg [127:0] s0; - reg [255:0] k0, k0a, k1; - wire [127:0] s1, s2, s3, s4, s5, s6, s7, s8, - s9, s10, s11, s12, s13; - wire [255:0] k2, k3, k4, k5, k6, k7, k8, - k9, k10, k11, k12, k13; - wire [127:0] k0b, k1b, k2b, k3b, k4b, k5b, k6b, k7b, k8b, - k9b, k10b, k11b, k12b, k13b; - - always @ (posedge clk) - begin - s0 <= state ^ key[255:128]; - k0 <= key; - k0a <= k0; - k1 <= k0a; - end - - assign k0b = k0a[127:0]; - - expand_key_type_A_256 - a1 (clk, k1, 8'h1, k2, k1b), - a3 (clk, k3, 8'h2, k4, k3b), - a5 (clk, k5, 8'h4, k6, k5b), - a7 (clk, k7, 8'h8, k8, k7b), - a9 (clk, k9, 8'h10, k10, k9b), - a11 (clk, k11, 8'h20, k12, k11b), - a13 (clk, k13, 8'h40, , k13b); - - expand_key_type_B_256 - a2 (clk, k2, k3, k2b), - a4 (clk, k4, k5, k4b), - a6 (clk, k6, k7, k6b), - a8 (clk, k8, k9, k8b), - a10 (clk, k10, k11, k10b), - a12 (clk, k12, k13, k12b); - - one_round - r1 (clk, s0, k0b, s1), - r2 (clk, s1, k1b, s2), - r3 (clk, s2, k2b, s3), - r4 (clk, s3, k3b, s4), - r5 (clk, s4, k4b, s5), - r6 (clk, s5, k5b, s6), - r7 (clk, s6, k6b, s7), - r8 (clk, s7, k7b, s8), - r9 (clk, s8, k8b, s9), - r10 (clk, s9, k9b, s10), - r11 (clk, s10, k10b, s11), - r12 (clk, s11, k11b, s12), - r13 (clk, s12, k12b, s13); - - final_round - rf (clk, s13, k13b, out); -endmodule - -/* expand k0,k1,k2,k3 for every two clock cycles */ -module expand_key_type_A_256 (clk, in, rcon, out_1, out_2); - input clk; - input [255:0] in; - input [7:0] rcon; - output reg [255:0] out_1; - output [127:0] out_2; - wire [31:0] k0, k1, k2, k3, k4, k5, k6, k7, - v0, v1, v2, v3; - reg [31:0] k0a, k1a, k2a, k3a, k4a, k5a, k6a, k7a; - wire [31:0] k0b, k1b, k2b, k3b, k4b, k5b, k6b, k7b, k8a; - - assign {k0, k1, k2, k3, k4, k5, k6, k7} = in; - - assign v0 = {k0[31:24] ^ rcon, k0[23:0]}; - assign v1 = v0 ^ k1; - assign v2 = v1 ^ k2; - assign v3 = v2 ^ k3; - - always @ (posedge clk) - {k0a, k1a, k2a, k3a, k4a, k5a, k6a, k7a} <= {v0, v1, v2, v3, k4, k5, k6, k7}; - - S4 - S4_0 (clk, {k7[23:0], k7[31:24]}, k8a); - - assign k0b = k0a ^ k8a; - assign k1b = k1a ^ k8a; - assign k2b = k2a ^ k8a; - assign k3b = k3a ^ k8a; - assign {k4b, k5b, k6b, k7b} = {k4a, k5a, k6a, k7a}; - - always @ (posedge clk) - out_1 <= {k0b, k1b, k2b, k3b, k4b, k5b, k6b, k7b}; - - assign out_2 = {k0b, k1b, k2b, k3b}; -endmodule - -/* expand k4,k5,k6,k7 for every two clock cycles */ -module expand_key_type_B_256 (clk, in, out_1, out_2); - input clk; - input [255:0] in; - output reg [255:0] out_1; - output [127:0] out_2; - wire [31:0] k0, k1, k2, k3, k4, k5, k6, k7, - v5, v6, v7; - reg [31:0] k0a, k1a, k2a, k3a, k4a, k5a, k6a, k7a; - wire [31:0] k0b, k1b, k2b, k3b, k4b, k5b, k6b, k7b, k8a; - - assign {k0, k1, k2, k3, k4, k5, k6, k7} = in; - - assign v5 = k4 ^ k5; - assign v6 = v5 ^ k6; - assign v7 = v6 ^ k7; - - always @ (posedge clk) - {k0a, k1a, k2a, k3a, k4a, k5a, k6a, k7a} <= {k0, k1, k2, k3, k4, v5, v6, v7}; - - S4 - S4_0 (clk, k3, k8a); - - assign {k0b, k1b, k2b, k3b} = {k0a, k1a, k2a, k3a}; - assign k4b = k4a ^ k8a; - assign k5b = k5a ^ k8a; - assign k6b = k6a ^ k8a; - assign k7b = k7a ^ k8a; - - always @ (posedge clk) - out_1 <= {k0b, k1b, k2b, k3b, k4b, k5b, k6b, k7b}; - - assign out_2 = {k4b, k5b, k6b, k7b}; -endmodule - diff --git a/src/aes/hdl/round.v b/src/aes/hdl/round.v deleted file mode 100644 index 1fd962a..0000000 --- a/src/aes/hdl/round.v +++ /dev/null @@ -1,81 +0,0 @@ -/* - * Copyright 2012, Homer Hsing - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* one AES round for every two clock cycles */ -module one_round (clk, state_in, key, state_out); - input clk; - input [127:0] state_in, key; - output reg [127:0] state_out; - wire [31:0] s0, s1, s2, s3, - z0, z1, z2, z3, - p00, p01, p02, p03, - p10, p11, p12, p13, - p20, p21, p22, p23, - p30, p31, p32, p33, - k0, k1, k2, k3; - - assign {k0, k1, k2, k3} = key; - - assign {s0, s1, s2, s3} = state_in; - - table_lookup - t0 (clk, s0, p00, p01, p02, p03), - t1 (clk, s1, p10, p11, p12, p13), - t2 (clk, s2, p20, p21, p22, p23), - t3 (clk, s3, p30, p31, p32, p33); - - assign z0 = p00 ^ p11 ^ p22 ^ p33 ^ k0; - assign z1 = p03 ^ p10 ^ p21 ^ p32 ^ k1; - assign z2 = p02 ^ p13 ^ p20 ^ p31 ^ k2; - assign z3 = p01 ^ p12 ^ p23 ^ p30 ^ k3; - - always @ (posedge clk) - state_out <= {z0, z1, z2, z3}; -endmodule - -/* AES final round for every two clock cycles */ -module final_round (clk, state_in, key_in, state_out); - input clk; - input [127:0] state_in; - input [127:0] key_in; - output reg [127:0] state_out; - wire [31:0] s0, s1, s2, s3, - z0, z1, z2, z3, - k0, k1, k2, k3; - wire [7:0] p00, p01, p02, p03, - p10, p11, p12, p13, - p20, p21, p22, p23, - p30, p31, p32, p33; - - assign {k0, k1, k2, k3} = key_in; - - assign {s0, s1, s2, s3} = state_in; - - S4 - S4_1 (clk, s0, {p00, p01, p02, p03}), - S4_2 (clk, s1, {p10, p11, p12, p13}), - S4_3 (clk, s2, {p20, p21, p22, p23}), - S4_4 (clk, s3, {p30, p31, p32, p33}); - - assign z0 = {p00, p11, p22, p33} ^ k0; - assign z1 = {p10, p21, p32, p03} ^ k1; - assign z2 = {p20, p31, p02, p13} ^ k2; - assign z3 = {p30, p01, p12, p23} ^ k3; - - always @ (posedge clk) - state_out <= {z0, z1, z2, z3}; -endmodule - diff --git a/src/aes/hdl/table.v b/src/aes/hdl/table.v deleted file mode 100644 index 666227f..0000000 --- a/src/aes/hdl/table.v +++ /dev/null @@ -1,590 +0,0 @@ -/* - * Copyright 2012, Homer Hsing - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -module table_lookup (clk, state, p0, p1, p2, p3); - input clk; - input [31:0] state; - output [31:0] p0, p1, p2, p3; - wire [7:0] b0, b1, b2, b3; - - assign {b0, b1, b2, b3} = state; - T - t0 (clk, b0, {p0[23:0], p0[31:24]}), - t1 (clk, b1, {p1[15:0], p1[31:16]}), - t2 (clk, b2, {p2[7:0], p2[31:8]} ), - t3 (clk, b3, p3); -endmodule - -/* substitue four bytes in a word */ -module S4 (clk, in, out); - input clk; - input [31:0] in; - output [31:0] out; - - S - S_0 (clk, in[31:24], out[31:24]), - S_1 (clk, in[23:16], out[23:16]), - S_2 (clk, in[15:8], out[15:8] ), - S_3 (clk, in[7:0], out[7:0] ); -endmodule - -/* S_box, S_box, S_box*(x+1), S_box*x */ -module T (clk, in, out); - input clk; - input [7:0] in; - output [31:0] out; - - S - s0 (clk, in, out[31:24]); - assign out[23:16] = out[31:24]; - xS - s4 (clk, in, out[7:0]); - assign out[15:8] = out[23:16] ^ out[7:0]; -endmodule - -/* S box */ -module S (clk, in, out); - input clk; - input [7:0] in; - output reg [7:0] out; - - always @ (posedge clk) - case (in) - 8'h00: out <= 8'h63; - 8'h01: out <= 8'h7c; - 8'h02: out <= 8'h77; - 8'h03: out <= 8'h7b; - 8'h04: out <= 8'hf2; - 8'h05: out <= 8'h6b; - 8'h06: out <= 8'h6f; - 8'h07: out <= 8'hc5; - 8'h08: out <= 8'h30; - 8'h09: out <= 8'h01; - 8'h0a: out <= 8'h67; - 8'h0b: out <= 8'h2b; - 8'h0c: out <= 8'hfe; - 8'h0d: out <= 8'hd7; - 8'h0e: out <= 8'hab; - 8'h0f: out <= 8'h76; - 8'h10: out <= 8'hca; - 8'h11: out <= 8'h82; - 8'h12: out <= 8'hc9; - 8'h13: out <= 8'h7d; - 8'h14: out <= 8'hfa; - 8'h15: out <= 8'h59; - 8'h16: out <= 8'h47; - 8'h17: out <= 8'hf0; - 8'h18: out <= 8'had; - 8'h19: out <= 8'hd4; - 8'h1a: out <= 8'ha2; - 8'h1b: out <= 8'haf; - 8'h1c: out <= 8'h9c; - 8'h1d: out <= 8'ha4; - 8'h1e: out <= 8'h72; - 8'h1f: out <= 8'hc0; - 8'h20: out <= 8'hb7; - 8'h21: out <= 8'hfd; - 8'h22: out <= 8'h93; - 8'h23: out <= 8'h26; - 8'h24: out <= 8'h36; - 8'h25: out <= 8'h3f; - 8'h26: out <= 8'hf7; - 8'h27: out <= 8'hcc; - 8'h28: out <= 8'h34; - 8'h29: out <= 8'ha5; - 8'h2a: out <= 8'he5; - 8'h2b: out <= 8'hf1; - 8'h2c: out <= 8'h71; - 8'h2d: out <= 8'hd8; - 8'h2e: out <= 8'h31; - 8'h2f: out <= 8'h15; - 8'h30: out <= 8'h04; - 8'h31: out <= 8'hc7; - 8'h32: out <= 8'h23; - 8'h33: out <= 8'hc3; - 8'h34: out <= 8'h18; - 8'h35: out <= 8'h96; - 8'h36: out <= 8'h05; - 8'h37: out <= 8'h9a; - 8'h38: out <= 8'h07; - 8'h39: out <= 8'h12; - 8'h3a: out <= 8'h80; - 8'h3b: out <= 8'he2; - 8'h3c: out <= 8'heb; - 8'h3d: out <= 8'h27; - 8'h3e: out <= 8'hb2; - 8'h3f: out <= 8'h75; - 8'h40: out <= 8'h09; - 8'h41: out <= 8'h83; - 8'h42: out <= 8'h2c; - 8'h43: out <= 8'h1a; - 8'h44: out <= 8'h1b; - 8'h45: out <= 8'h6e; - 8'h46: out <= 8'h5a; - 8'h47: out <= 8'ha0; - 8'h48: out <= 8'h52; - 8'h49: out <= 8'h3b; - 8'h4a: out <= 8'hd6; - 8'h4b: out <= 8'hb3; - 8'h4c: out <= 8'h29; - 8'h4d: out <= 8'he3; - 8'h4e: out <= 8'h2f; - 8'h4f: out <= 8'h84; - 8'h50: out <= 8'h53; - 8'h51: out <= 8'hd1; - 8'h52: out <= 8'h00; - 8'h53: out <= 8'hed; - 8'h54: out <= 8'h20; - 8'h55: out <= 8'hfc; - 8'h56: out <= 8'hb1; - 8'h57: out <= 8'h5b; - 8'h58: out <= 8'h6a; - 8'h59: out <= 8'hcb; - 8'h5a: out <= 8'hbe; - 8'h5b: out <= 8'h39; - 8'h5c: out <= 8'h4a; - 8'h5d: out <= 8'h4c; - 8'h5e: out <= 8'h58; - 8'h5f: out <= 8'hcf; - 8'h60: out <= 8'hd0; - 8'h61: out <= 8'hef; - 8'h62: out <= 8'haa; - 8'h63: out <= 8'hfb; - 8'h64: out <= 8'h43; - 8'h65: out <= 8'h4d; - 8'h66: out <= 8'h33; - 8'h67: out <= 8'h85; - 8'h68: out <= 8'h45; - 8'h69: out <= 8'hf9; - 8'h6a: out <= 8'h02; - 8'h6b: out <= 8'h7f; - 8'h6c: out <= 8'h50; - 8'h6d: out <= 8'h3c; - 8'h6e: out <= 8'h9f; - 8'h6f: out <= 8'ha8; - 8'h70: out <= 8'h51; - 8'h71: out <= 8'ha3; - 8'h72: out <= 8'h40; - 8'h73: out <= 8'h8f; - 8'h74: out <= 8'h92; - 8'h75: out <= 8'h9d; - 8'h76: out <= 8'h38; - 8'h77: out <= 8'hf5; - 8'h78: out <= 8'hbc; - 8'h79: out <= 8'hb6; - 8'h7a: out <= 8'hda; - 8'h7b: out <= 8'h21; - 8'h7c: out <= 8'h10; - 8'h7d: out <= 8'hff; - 8'h7e: out <= 8'hf3; - 8'h7f: out <= 8'hd2; - 8'h80: out <= 8'hcd; - 8'h81: out <= 8'h0c; - 8'h82: out <= 8'h13; - 8'h83: out <= 8'hec; - 8'h84: out <= 8'h5f; - 8'h85: out <= 8'h97; - 8'h86: out <= 8'h44; - 8'h87: out <= 8'h17; - 8'h88: out <= 8'hc4; - 8'h89: out <= 8'ha7; - 8'h8a: out <= 8'h7e; - 8'h8b: out <= 8'h3d; - 8'h8c: out <= 8'h64; - 8'h8d: out <= 8'h5d; - 8'h8e: out <= 8'h19; - 8'h8f: out <= 8'h73; - 8'h90: out <= 8'h60; - 8'h91: out <= 8'h81; - 8'h92: out <= 8'h4f; - 8'h93: out <= 8'hdc; - 8'h94: out <= 8'h22; - 8'h95: out <= 8'h2a; - 8'h96: out <= 8'h90; - 8'h97: out <= 8'h88; - 8'h98: out <= 8'h46; - 8'h99: out <= 8'hee; - 8'h9a: out <= 8'hb8; - 8'h9b: out <= 8'h14; - 8'h9c: out <= 8'hde; - 8'h9d: out <= 8'h5e; - 8'h9e: out <= 8'h0b; - 8'h9f: out <= 8'hdb; - 8'ha0: out <= 8'he0; - 8'ha1: out <= 8'h32; - 8'ha2: out <= 8'h3a; - 8'ha3: out <= 8'h0a; - 8'ha4: out <= 8'h49; - 8'ha5: out <= 8'h06; - 8'ha6: out <= 8'h24; - 8'ha7: out <= 8'h5c; - 8'ha8: out <= 8'hc2; - 8'ha9: out <= 8'hd3; - 8'haa: out <= 8'hac; - 8'hab: out <= 8'h62; - 8'hac: out <= 8'h91; - 8'had: out <= 8'h95; - 8'hae: out <= 8'he4; - 8'haf: out <= 8'h79; - 8'hb0: out <= 8'he7; - 8'hb1: out <= 8'hc8; - 8'hb2: out <= 8'h37; - 8'hb3: out <= 8'h6d; - 8'hb4: out <= 8'h8d; - 8'hb5: out <= 8'hd5; - 8'hb6: out <= 8'h4e; - 8'hb7: out <= 8'ha9; - 8'hb8: out <= 8'h6c; - 8'hb9: out <= 8'h56; - 8'hba: out <= 8'hf4; - 8'hbb: out <= 8'hea; - 8'hbc: out <= 8'h65; - 8'hbd: out <= 8'h7a; - 8'hbe: out <= 8'hae; - 8'hbf: out <= 8'h08; - 8'hc0: out <= 8'hba; - 8'hc1: out <= 8'h78; - 8'hc2: out <= 8'h25; - 8'hc3: out <= 8'h2e; - 8'hc4: out <= 8'h1c; - 8'hc5: out <= 8'ha6; - 8'hc6: out <= 8'hb4; - 8'hc7: out <= 8'hc6; - 8'hc8: out <= 8'he8; - 8'hc9: out <= 8'hdd; - 8'hca: out <= 8'h74; - 8'hcb: out <= 8'h1f; - 8'hcc: out <= 8'h4b; - 8'hcd: out <= 8'hbd; - 8'hce: out <= 8'h8b; - 8'hcf: out <= 8'h8a; - 8'hd0: out <= 8'h70; - 8'hd1: out <= 8'h3e; - 8'hd2: out <= 8'hb5; - 8'hd3: out <= 8'h66; - 8'hd4: out <= 8'h48; - 8'hd5: out <= 8'h03; - 8'hd6: out <= 8'hf6; - 8'hd7: out <= 8'h0e; - 8'hd8: out <= 8'h61; - 8'hd9: out <= 8'h35; - 8'hda: out <= 8'h57; - 8'hdb: out <= 8'hb9; - 8'hdc: out <= 8'h86; - 8'hdd: out <= 8'hc1; - 8'hde: out <= 8'h1d; - 8'hdf: out <= 8'h9e; - 8'he0: out <= 8'he1; - 8'he1: out <= 8'hf8; - 8'he2: out <= 8'h98; - 8'he3: out <= 8'h11; - 8'he4: out <= 8'h69; - 8'he5: out <= 8'hd9; - 8'he6: out <= 8'h8e; - 8'he7: out <= 8'h94; - 8'he8: out <= 8'h9b; - 8'he9: out <= 8'h1e; - 8'hea: out <= 8'h87; - 8'heb: out <= 8'he9; - 8'hec: out <= 8'hce; - 8'hed: out <= 8'h55; - 8'hee: out <= 8'h28; - 8'hef: out <= 8'hdf; - 8'hf0: out <= 8'h8c; - 8'hf1: out <= 8'ha1; - 8'hf2: out <= 8'h89; - 8'hf3: out <= 8'h0d; - 8'hf4: out <= 8'hbf; - 8'hf5: out <= 8'he6; - 8'hf6: out <= 8'h42; - 8'hf7: out <= 8'h68; - 8'hf8: out <= 8'h41; - 8'hf9: out <= 8'h99; - 8'hfa: out <= 8'h2d; - 8'hfb: out <= 8'h0f; - 8'hfc: out <= 8'hb0; - 8'hfd: out <= 8'h54; - 8'hfe: out <= 8'hbb; - 8'hff: out <= 8'h16; - endcase -endmodule - -/* S box * x */ -module xS (clk, in, out); - input clk; - input [7:0] in; - output reg [7:0] out; - - always @ (posedge clk) - case (in) - 8'h00: out <= 8'hc6; - 8'h01: out <= 8'hf8; - 8'h02: out <= 8'hee; - 8'h03: out <= 8'hf6; - 8'h04: out <= 8'hff; - 8'h05: out <= 8'hd6; - 8'h06: out <= 8'hde; - 8'h07: out <= 8'h91; - 8'h08: out <= 8'h60; - 8'h09: out <= 8'h02; - 8'h0a: out <= 8'hce; - 8'h0b: out <= 8'h56; - 8'h0c: out <= 8'he7; - 8'h0d: out <= 8'hb5; - 8'h0e: out <= 8'h4d; - 8'h0f: out <= 8'hec; - 8'h10: out <= 8'h8f; - 8'h11: out <= 8'h1f; - 8'h12: out <= 8'h89; - 8'h13: out <= 8'hfa; - 8'h14: out <= 8'hef; - 8'h15: out <= 8'hb2; - 8'h16: out <= 8'h8e; - 8'h17: out <= 8'hfb; - 8'h18: out <= 8'h41; - 8'h19: out <= 8'hb3; - 8'h1a: out <= 8'h5f; - 8'h1b: out <= 8'h45; - 8'h1c: out <= 8'h23; - 8'h1d: out <= 8'h53; - 8'h1e: out <= 8'he4; - 8'h1f: out <= 8'h9b; - 8'h20: out <= 8'h75; - 8'h21: out <= 8'he1; - 8'h22: out <= 8'h3d; - 8'h23: out <= 8'h4c; - 8'h24: out <= 8'h6c; - 8'h25: out <= 8'h7e; - 8'h26: out <= 8'hf5; - 8'h27: out <= 8'h83; - 8'h28: out <= 8'h68; - 8'h29: out <= 8'h51; - 8'h2a: out <= 8'hd1; - 8'h2b: out <= 8'hf9; - 8'h2c: out <= 8'he2; - 8'h2d: out <= 8'hab; - 8'h2e: out <= 8'h62; - 8'h2f: out <= 8'h2a; - 8'h30: out <= 8'h08; - 8'h31: out <= 8'h95; - 8'h32: out <= 8'h46; - 8'h33: out <= 8'h9d; - 8'h34: out <= 8'h30; - 8'h35: out <= 8'h37; - 8'h36: out <= 8'h0a; - 8'h37: out <= 8'h2f; - 8'h38: out <= 8'h0e; - 8'h39: out <= 8'h24; - 8'h3a: out <= 8'h1b; - 8'h3b: out <= 8'hdf; - 8'h3c: out <= 8'hcd; - 8'h3d: out <= 8'h4e; - 8'h3e: out <= 8'h7f; - 8'h3f: out <= 8'hea; - 8'h40: out <= 8'h12; - 8'h41: out <= 8'h1d; - 8'h42: out <= 8'h58; - 8'h43: out <= 8'h34; - 8'h44: out <= 8'h36; - 8'h45: out <= 8'hdc; - 8'h46: out <= 8'hb4; - 8'h47: out <= 8'h5b; - 8'h48: out <= 8'ha4; - 8'h49: out <= 8'h76; - 8'h4a: out <= 8'hb7; - 8'h4b: out <= 8'h7d; - 8'h4c: out <= 8'h52; - 8'h4d: out <= 8'hdd; - 8'h4e: out <= 8'h5e; - 8'h4f: out <= 8'h13; - 8'h50: out <= 8'ha6; - 8'h51: out <= 8'hb9; - 8'h52: out <= 8'h00; - 8'h53: out <= 8'hc1; - 8'h54: out <= 8'h40; - 8'h55: out <= 8'he3; - 8'h56: out <= 8'h79; - 8'h57: out <= 8'hb6; - 8'h58: out <= 8'hd4; - 8'h59: out <= 8'h8d; - 8'h5a: out <= 8'h67; - 8'h5b: out <= 8'h72; - 8'h5c: out <= 8'h94; - 8'h5d: out <= 8'h98; - 8'h5e: out <= 8'hb0; - 8'h5f: out <= 8'h85; - 8'h60: out <= 8'hbb; - 8'h61: out <= 8'hc5; - 8'h62: out <= 8'h4f; - 8'h63: out <= 8'hed; - 8'h64: out <= 8'h86; - 8'h65: out <= 8'h9a; - 8'h66: out <= 8'h66; - 8'h67: out <= 8'h11; - 8'h68: out <= 8'h8a; - 8'h69: out <= 8'he9; - 8'h6a: out <= 8'h04; - 8'h6b: out <= 8'hfe; - 8'h6c: out <= 8'ha0; - 8'h6d: out <= 8'h78; - 8'h6e: out <= 8'h25; - 8'h6f: out <= 8'h4b; - 8'h70: out <= 8'ha2; - 8'h71: out <= 8'h5d; - 8'h72: out <= 8'h80; - 8'h73: out <= 8'h05; - 8'h74: out <= 8'h3f; - 8'h75: out <= 8'h21; - 8'h76: out <= 8'h70; - 8'h77: out <= 8'hf1; - 8'h78: out <= 8'h63; - 8'h79: out <= 8'h77; - 8'h7a: out <= 8'haf; - 8'h7b: out <= 8'h42; - 8'h7c: out <= 8'h20; - 8'h7d: out <= 8'he5; - 8'h7e: out <= 8'hfd; - 8'h7f: out <= 8'hbf; - 8'h80: out <= 8'h81; - 8'h81: out <= 8'h18; - 8'h82: out <= 8'h26; - 8'h83: out <= 8'hc3; - 8'h84: out <= 8'hbe; - 8'h85: out <= 8'h35; - 8'h86: out <= 8'h88; - 8'h87: out <= 8'h2e; - 8'h88: out <= 8'h93; - 8'h89: out <= 8'h55; - 8'h8a: out <= 8'hfc; - 8'h8b: out <= 8'h7a; - 8'h8c: out <= 8'hc8; - 8'h8d: out <= 8'hba; - 8'h8e: out <= 8'h32; - 8'h8f: out <= 8'he6; - 8'h90: out <= 8'hc0; - 8'h91: out <= 8'h19; - 8'h92: out <= 8'h9e; - 8'h93: out <= 8'ha3; - 8'h94: out <= 8'h44; - 8'h95: out <= 8'h54; - 8'h96: out <= 8'h3b; - 8'h97: out <= 8'h0b; - 8'h98: out <= 8'h8c; - 8'h99: out <= 8'hc7; - 8'h9a: out <= 8'h6b; - 8'h9b: out <= 8'h28; - 8'h9c: out <= 8'ha7; - 8'h9d: out <= 8'hbc; - 8'h9e: out <= 8'h16; - 8'h9f: out <= 8'had; - 8'ha0: out <= 8'hdb; - 8'ha1: out <= 8'h64; - 8'ha2: out <= 8'h74; - 8'ha3: out <= 8'h14; - 8'ha4: out <= 8'h92; - 8'ha5: out <= 8'h0c; - 8'ha6: out <= 8'h48; - 8'ha7: out <= 8'hb8; - 8'ha8: out <= 8'h9f; - 8'ha9: out <= 8'hbd; - 8'haa: out <= 8'h43; - 8'hab: out <= 8'hc4; - 8'hac: out <= 8'h39; - 8'had: out <= 8'h31; - 8'hae: out <= 8'hd3; - 8'haf: out <= 8'hf2; - 8'hb0: out <= 8'hd5; - 8'hb1: out <= 8'h8b; - 8'hb2: out <= 8'h6e; - 8'hb3: out <= 8'hda; - 8'hb4: out <= 8'h01; - 8'hb5: out <= 8'hb1; - 8'hb6: out <= 8'h9c; - 8'hb7: out <= 8'h49; - 8'hb8: out <= 8'hd8; - 8'hb9: out <= 8'hac; - 8'hba: out <= 8'hf3; - 8'hbb: out <= 8'hcf; - 8'hbc: out <= 8'hca; - 8'hbd: out <= 8'hf4; - 8'hbe: out <= 8'h47; - 8'hbf: out <= 8'h10; - 8'hc0: out <= 8'h6f; - 8'hc1: out <= 8'hf0; - 8'hc2: out <= 8'h4a; - 8'hc3: out <= 8'h5c; - 8'hc4: out <= 8'h38; - 8'hc5: out <= 8'h57; - 8'hc6: out <= 8'h73; - 8'hc7: out <= 8'h97; - 8'hc8: out <= 8'hcb; - 8'hc9: out <= 8'ha1; - 8'hca: out <= 8'he8; - 8'hcb: out <= 8'h3e; - 8'hcc: out <= 8'h96; - 8'hcd: out <= 8'h61; - 8'hce: out <= 8'h0d; - 8'hcf: out <= 8'h0f; - 8'hd0: out <= 8'he0; - 8'hd1: out <= 8'h7c; - 8'hd2: out <= 8'h71; - 8'hd3: out <= 8'hcc; - 8'hd4: out <= 8'h90; - 8'hd5: out <= 8'h06; - 8'hd6: out <= 8'hf7; - 8'hd7: out <= 8'h1c; - 8'hd8: out <= 8'hc2; - 8'hd9: out <= 8'h6a; - 8'hda: out <= 8'hae; - 8'hdb: out <= 8'h69; - 8'hdc: out <= 8'h17; - 8'hdd: out <= 8'h99; - 8'hde: out <= 8'h3a; - 8'hdf: out <= 8'h27; - 8'he0: out <= 8'hd9; - 8'he1: out <= 8'heb; - 8'he2: out <= 8'h2b; - 8'he3: out <= 8'h22; - 8'he4: out <= 8'hd2; - 8'he5: out <= 8'ha9; - 8'he6: out <= 8'h07; - 8'he7: out <= 8'h33; - 8'he8: out <= 8'h2d; - 8'he9: out <= 8'h3c; - 8'hea: out <= 8'h15; - 8'heb: out <= 8'hc9; - 8'hec: out <= 8'h87; - 8'hed: out <= 8'haa; - 8'hee: out <= 8'h50; - 8'hef: out <= 8'ha5; - 8'hf0: out <= 8'h03; - 8'hf1: out <= 8'h59; - 8'hf2: out <= 8'h09; - 8'hf3: out <= 8'h1a; - 8'hf4: out <= 8'h65; - 8'hf5: out <= 8'hd7; - 8'hf6: out <= 8'h84; - 8'hf7: out <= 8'hd0; - 8'hf8: out <= 8'h82; - 8'hf9: out <= 8'h29; - 8'hfa: out <= 8'h5a; - 8'hfb: out <= 8'h1e; - 8'hfc: out <= 8'h7b; - 8'hfd: out <= 8'ha8; - 8'hfe: out <= 8'h6d; - 8'hff: out <= 8'h2c; - endcase -endmodule diff --git a/src/common/dv/dv_ctrl.v b/src/common/dv/dv_ctrl.v deleted file mode 100644 index 4c1b685..0000000 --- a/src/common/dv/dv_ctrl.v +++ /dev/null @@ -1,115 +0,0 @@ -/* verilator lint_off STMTDLY */ -module dv_ctrl(/*AUTOARG*/ - // Outputs - nreset, clk1, clk2, start, vdd, vss, - // Inputs - dut_active, stim_done, test_done - ); - - parameter CFG_CLK1_PERIOD = 10; - parameter CFG_CLK1_PHASE = CFG_CLK1_PERIOD/2; - parameter CFG_CLK2_PERIOD = 100; - parameter CFG_CLK2_PHASE = CFG_CLK2_PERIOD/2; - parameter CFG_TIMEOUT = 50000; - - output nreset; // async active low reset - output clk1; // main clock - output clk2; // secondary clock - output start; // start test (level) - output vdd; // driving vdd - output vss; // driving vss - - input dut_active; // reset sequence is done - input stim_done; //stimulus is done - input test_done; //test is done - - //signal declarations - reg vdd; - reg vss; - reg nreset; - reg start; - reg clk1=0; - reg clk2=0; - reg [6:0] clk1_phase; - reg [6:0] clk2_phase; - integer seed,r; - - //################################# - // RANDOM NUMBER GENERATOR - // (SEED SUPPLIED EXERNALLY) - //################################# - initial - begin - r=$value$plusargs("SEED=%s", seed); - $display("SEED=%d", seed); -`ifdef CFG_RANDOM - clk1_phase = 1 + {$random(seed)}; //generate random values - clk2_phase = 1 + {$random(seed)}; //generate random values -`else - clk1_phase = CFG_CLK1_PHASE; - clk2_phase = CFG_CLK2_PHASE; -`endif - $display("clk1_phase=%d clk2_phase=%d", clk1_phase,clk2_phase); - end - - //################################# - //CLK1 GENERATOR - //################################# - - always - #(clk1_phase) clk1 = ~clk1; //add one to avoid "DC" state - - //################################# - //CLK2 GENERATOR - //################################# - - always - #(clk2_phase) clk2 = ~clk2; - - //################################# - //ASYNC - //################################# - - initial - begin - #(1) - nreset = 'b0; - vdd = 'b0; - vss = 'b0; - #(clk1_phase * 10 + 100) //ramping voltage - vdd = 'bx; - #(clk1_phase * 10 + 100) //voltage is safe - vdd = 'b1; - #(clk1_phase * 40 + 100) //hold reset for 20 clk cycles - nreset = 'b1; - end - - //################################# - //SYNCHRONOUS STIMULUS - //################################# - //START TEST - always @ (posedge clk1 or negedge nreset) - if(!nreset) - start <= 1'b0; - else if(dut_active) - start <= 1'b1; - - //STOP SIMULATION - always @ (posedge clk1) - if(stim_done & test_done) - #(CFG_TIMEOUT) $finish; - - //WAVEFORM DUMP - //Better solution? -`ifndef VERILATOR - initial - begin - $dumpfile("waveform.vcd"); - $dumpvars(0, dv_top); - end -`endif - -endmodule // dv_ctrl - - - diff --git a/src/common/dv/stimulus.v b/src/common/dv/stimulus.v deleted file mode 100644 index c9cb304..0000000 --- a/src/common/dv/stimulus.v +++ /dev/null @@ -1,170 +0,0 @@ -/* - * Reads transctions from file in Epiphany Memory Format (EMF) and drives - * packet output. - * - * NOTE: wait comes in one next cycle, this block adjusts for that! - * - */ -`timescale 1ns/1ps -module stimulus (/*AUTOARG*/ - // Outputs - stim_access, stim_packet, stim_count, stim_done, stim_wait, - // Inputs - clk, nreset, start, dut_wait - ); - - //stimulus - parameter PW = 32; //size of packet - parameter MAW = 15; - parameter MD = 1<0) - begin - mem_access <= 1'b0; - wait_counter[15:0] <= wait_counter[15:0] - 1'b1; - end - - //Use to finish simulation - assign stim_done = ~dut_wait & (state[1:0]==`DONE); - - //Removing delay value - //assign stim_packet[PW-1:0] = mem_data[PW+16-1: - always @ (posedge clk or negedge nreset) - if(~nreset) - begin - mem_access_reg <= 'b0; - mem_packet_reg <= 'b0; - stim_packet <= 'b0; - stim_access <= 'b0; - end - else if(~dut_wait) - begin - mem_access_reg <= mem_access; - mem_packet_reg <= mem_data[PW+16-1:16]; - stim_packet <= mem_packet_reg; - stim_access <= mem_access_reg; - end - - //assign stim_packet = dut_wait ? stim_packet_reg : mem_data[PW+16-1:16]; - //assign stim_access = dut_wait ? stim_access_reg : mem_access; - //assign stim_access = dut_wait ? 1'b0 : mem_access; - - //TODO: Implement - assign stim_wait = stall_random; - - //Random wait generator - //TODO: make this a module - - generate - if(WAIT) - begin - reg [15:0] stall_counter; - always @ (posedge clk or negedge nreset) - if(!nreset) - stall_counter[15:0] <= 'b0; - else - stall_counter[15:0] <= stall_counter+1'b1; - assign stall_random = (|stall_counter[6:0]);//(|wait_counter[3:0]);//1'b0; - end - else - begin - assign stall_random = 1'b0; - end // else: !if(WAIT) - endgenerate - - -endmodule // stimulus - - diff --git a/src/common/hdl/oh_counter.v b/src/common/hdl/oh_counter.v deleted file mode 100644 index c405735..0000000 --- a/src/common/hdl/oh_counter.v +++ /dev/null @@ -1,73 +0,0 @@ -//############################################################################# -//# Function: Binary to gray encoder # -//############################################################################# -//# Author: Andreas Olofsson # -//# License: MIT (see LICENSE file in OH! repository) # -//############################################################################# - -module oh_counter #(parameter DW = 32, // width of data inputs - parameter TYPE = "INCREMENT" // also DECREMENT, GRAY, LFSR - ) - ( - input clk, // clk input - input in, // input to count - input en, // enable counter - input load, // load counter - input [DW-1:0] load_data,// load data - output [DW-1:0] count, // current count value - output carry, // carry out from counter - output zero // counter is zero - ); - - // local variables - reg [DW-1:0] count; - reg carry; - wire [DW-1:0] count_in; - wire carry_in; - - // configure counter based on type - generate - if(TYPE=="INCREMENT") - begin - assign {carry_in,count_in[DW-1:0]} = count[DW-1:0] + in; - end - else if(TYPE=="DECREMENT") - begin - assign count_in[DW-1:0] = count[DW-1:0] + in; - end - else if (TYPE=="GRAY") - begin - initial - $display ("NOT IMPLEMENTED"); - end - else if (TYPE=="LFSR") - begin - initial - $display ("NOT IMPLEMENTED"); - end - endgenerate - - // counter - always @(posedge clk) - if(load) - begin - carry <= 1'b0; - count[DW-1:0] <= load_data[DW-1:0]; - end - else if (en) - begin - carry <= carry_in; - count[DW-1:0] <= count_in[DW-1:0]; - end - - // counter expired - assign zero = ~(count[DW-1:0]); - -endmodule // oh_counter - - - - - - - diff --git a/src/common/hdl/oh_csa42.v b/src/common/hdl/oh_csa42.v deleted file mode 100644 index c7a3047..0000000 --- a/src/common/hdl/oh_csa42.v +++ /dev/null @@ -1,60 +0,0 @@ -//############################################################################# -//# Function: Carry Save Adder (4:2) # -//############################################################################# -//# Author: Andreas Olofsson # -//# License: MIT (see LICENSE file in OH! repository) # -//############################################################################# - -module oh_csa42 #( parameter DW = 1 // data width - ) - ( input [DW-1:0] in0, //input - input [DW-1:0] in1,//input - input [DW-1:0] in2,//input - input [DW-1:0] in3,//input - input [DW-1:0] cin,//carry in - output [DW-1:0] s, //sum - output [DW-1:0] c, //carry - output [DW-1:0] cout //carry out - ); - - localparam ASIC = `CFG_ASIC; // use asic library - - generate - if(ASIC) - begin - asic_csa42 i_csa42[DW-1:0] (.s(s[DW-1:0]), - .cout(cout[DW-1:0]), - .c(c[DW-1:0]), - .cin(cin[DW-1:0]), - .in3(in3[DW-1:0]), - .in2(in2[DW-1:0]), - .in1(in1[DW-1:0]), - .in0(in0[DW-1:0])); - end - else - begin - wire [DW-1:0] s_int; - - assign s[DW-1:0] = in0[DW-1:0] ^ - in1[DW-1:0] ^ - in2[DW-1:0] ^ - in3[DW-1:0] ^ - cin[DW-1:0]; - - assign s_int[DW-1:0] = in1[DW-1:0] ^ - in2[DW-1:0] ^ - in3[DW-1:0]; - - assign c[DW-1:0] = (in0[DW-1:0] & s_int[DW-1:0]) | - (in0[DW-1:0] & cin[DW-1:0]) | - (s_int[DW-1:0] & cin[DW-1:0]); - - assign cout[DW-1:0] = (in1[DW-1:0] & in2[DW-1:0]) | - (in1[DW-1:0] & in3[DW-1:0]) | - (in2[DW-1:0] & in3[DW-1:0]); - end // else: !if(ASIC) - endgenerate - -endmodule // oh_csa42 - - diff --git a/src/common/hdl/oh_delay.v b/src/common/hdl/oh_delay.v deleted file mode 100644 index 2e20744..0000000 --- a/src/common/hdl/oh_delay.v +++ /dev/null @@ -1,33 +0,0 @@ -//############################################################################# -//# Function: Delay element # -//############################################################################# -//# Author: Andreas Olofsson # -//# License: MIT (see LICENSE file in OH! repository) # -//############################################################################# - -module oh_delay #(parameter DW = 1, // width of data - parameter DELAY= 0 // delay - ) - ( - input [DW-1:0] in, // input - output [DW-1:0] out // output - ); - - localparam ASIC = `CFG_ASIC; // use asic library - - generate - if(ASIC) - begin - asic_delay i_delay[DW-1:0] (.in(in[DW-1:0]), - .out(out[DW-1:0])); - end - else - begin - assign out[DW-1:0] = in [DW-1:0]; - end -endgenerate - -endmodule // oh_delay - - - diff --git a/src/common/hdl/oh_fifo_sync.v b/src/common/hdl/oh_fifo_sync.v deleted file mode 100644 index 52eb2f3..0000000 --- a/src/common/hdl/oh_fifo_sync.v +++ /dev/null @@ -1,76 +0,0 @@ -//############################################################################# -//# Function: Synchronous FIFO # -//############################################################################# -//# Author: Andreas Olofsson # -//# License: MIT (see LICENSE file in OH! repository) # -//############################################################################# - -module oh_fifo_sync #(parameter DW = 104, //FIFO width - parameter DEPTH = 32, //FIFO depth - parameter PROG_FULL = (DEPTH/2),//prog_full threshold - parameter AW = $clog2(DEPTH) //rd_count width - ) -( - input clk, // clock - input nreset, // active high async reset - input [DW-1:0] din, // data to write - input wr_en, // write fifo - input rd_en, // read fifo - output [DW-1:0] dout, // output data (next cycle) - output full, // fifo full - output prog_full, // fifo is almost full - output empty, // fifo is empty - output reg [AW-1:0] rd_count // valid entries in fifo - ); - - reg [AW-1:0] wr_addr; - reg [AW-1:0] rd_addr; - wire fifo_read; - wire fifo_write; - - assign empty = (rd_count[AW-1:0] == 0); - assign prog_full = (rd_count[AW-1:0] >= PROG_FULL); - assign full = (rd_count[AW-1:0] == (DEPTH-1)); - assign fifo_read = rd_en & ~empty; - assign fifo_write = wr_en & ~full; - - always @ ( posedge clk or negedge nreset) - if(!nreset) - begin - wr_addr[AW-1:0] <= 'd0; - rd_addr[AW-1:0] <= 'b0; - rd_count[AW-1:0] <= 'b0; - end - else if(fifo_write & fifo_read) - begin - wr_addr[AW-1:0] <= wr_addr[AW-1:0] + 'd1; - rd_addr[AW-1:0] <= rd_addr[AW-1:0] + 'd1; - end - else if(fifo_write) - begin - wr_addr[AW-1:0] <= wr_addr[AW-1:0] + 'd1; - rd_count[AW-1:0]<= rd_count[AW-1:0] + 'd1; - end - else if(fifo_read) - begin - rd_addr[AW-1:0] <= rd_addr[AW-1:0] + 'd1; - rd_count[AW-1:0]<= rd_count[AW-1:0] - 'd1; - end - - // GENERIC DUAL PORTED MEMORY - oh_memory_dp - #(.DW(DW), - .DEPTH(DEPTH)) - mem (// read port - .rd_dout (dout[DW-1:0]), - .rd_clk (clk), - .rd_en (fifo_read), - .rd_addr (rd_addr[AW-1:0]), - // write port - .wr_clk (clk), - .wr_en (fifo_write), - .wr_wem ({(DW){1'b1}}), - .wr_addr (wr_addr[AW-1:0]), - .wr_din (din[DW-1:0])); - -endmodule // oh_fifo_sync diff --git a/src/common/hdl/oh_iddr.v b/src/common/hdl/oh_iddr.v deleted file mode 100644 index eaff3e4..0000000 --- a/src/common/hdl/oh_iddr.v +++ /dev/null @@ -1,40 +0,0 @@ -//############################################################################# -//# Function: Dual data rate input buffer (2 cycle delay) # -//############################################################################# -//# Author: Andreas Olofsson # -//# License: MIT (see LICENSE file in OH! repository) # -//############################################################################# - -module oh_iddr #(parameter DW = 1 // width of data inputs - ) - ( - input clk, // clock - input ce, // clock enable, set to high to clock in data - input [DW-1:0] din, // data input sampled on both edges of clock - output reg [DW-1:0] q1, // iddr rising edge sampled data - output reg [DW-1:0] q2 // iddr falling edge sampled data - ); - - //regs("sl"=stable low, "sh"=stable high) - reg [DW-1:0] q1_sl; - reg [DW-1:0] q2_sh; - - // rising edge sample - always @ (posedge clk) - if(ce) - q1_sl[DW-1:0] <= din[DW-1:0]; - - // falling edge sample - always @ (negedge clk) - q2_sh[DW-1:0] <= din[DW-1:0]; - - // pipeline for alignment - always @ (posedge clk) - begin - q1[DW-1:0] <= q1_sl[DW-1:0]; - q2[DW-1:0] <= q2_sh[DW-1:0]; - end - -endmodule // oh_iddr - - diff --git a/src/common/hdl/oh_memory_dp.v b/src/common/hdl/oh_memory_dp.v deleted file mode 100644 index 6d1b1f9..0000000 --- a/src/common/hdl/oh_memory_dp.v +++ /dev/null @@ -1,76 +0,0 @@ -//############################################################################# -//# Function: Dual Port Memory # -//############################################################################# -//# Author: Andreas Olofsson # -//# License: MIT (see LICENSE file in OH! repository) # -//############################################################################# - -module oh_memory_dp # (parameter DW = 104, //memory width - parameter DEPTH = 32, //memory depth - parameter PROJ = "", //project name - parameter MCW = 8, //repair/config vector width - parameter AW = $clog2(DEPTH) // address bus width - ) - (// Memory interface (dual port) - input wr_clk, //write clock - input wr_en, //write enable - input [DW-1:0] wr_wem, //per bit write enable - input [AW-1:0] wr_addr,//write address - input [DW-1:0] wr_din, //write data - input rd_clk, //read clock - input rd_en, //read enable - input [AW-1:0] rd_addr,//read address - output [DW-1:0] rd_dout,//read output data - // Power/repair (ASICs) - input shutdown, // shutdown signal from always on domain - input [MCW-1:0] memconfig, // generic memory config - input [MCW-1:0] memrepair, // repair vector - // BIST interface (ASICs) - input bist_en, // bist enable - input bist_we, // write enable global signal - input [DW-1:0] bist_wem, // write enable vector - input [AW-1:0] bist_addr, // address - input [DW-1:0] bist_din // data input - ); - - localparam ASIC = `CFG_ASIC; // use asic library - - generate - if(ASIC) - begin : asic - oh_memory_ram #(.DW(DW), - .DEPTH(DEPTH)) - memory_dp (//read port - .rd_dout (rd_dout[DW-1:0]), - .rd_clk (rd_clk), - .rd_en (rd_en), - .rd_addr (rd_addr[AW-1:0]), - //write port - .wr_en (wr_en), - .wr_clk (wr_clk), - .wr_addr (wr_addr[AW-1:0]), - .wr_wem (wr_wem[DW-1:0]), - .wr_din (wr_din[DW-1:0])); - end // if (ASIC) - else - begin : generic - oh_memory_ram #(.DW(DW), - .DEPTH(DEPTH)) - memory_dp (//read port - .rd_dout (rd_dout[DW-1:0]), - .rd_clk (rd_clk), - .rd_en (rd_en), - .rd_addr (rd_addr[AW-1:0]), - //write port - .wr_en (wr_en), - .wr_clk (wr_clk), - .wr_addr (wr_addr[AW-1:0]), - .wr_wem (wr_wem[DW-1:0]), - .wr_din (wr_din[DW-1:0])); - end // else: !if(ASIC) - endgenerate - -endmodule // oh_memory_dp - - - diff --git a/src/common/hdl/oh_memory_ram.v b/src/common/hdl/oh_memory_ram.v deleted file mode 100644 index 10a387f..0000000 --- a/src/common/hdl/oh_memory_ram.v +++ /dev/null @@ -1,47 +0,0 @@ -//############################################################################# -//# Function: Generic RAM memory # -//############################################################################# -//# Author: Andreas Olofsson # -//# License: MIT (see LICENSE file in OH! repository) # -//############################################################################# - -module oh_memory_ram # (parameter DW = 104, //memory width - parameter DEPTH = 32, //memory depth - parameter AW = $clog2(DEPTH) // address width - ) - (// read-port - input rd_clk,// rd clock - input rd_en, // memory access - input [AW-1:0] rd_addr, // address - output reg [DW-1:0] rd_dout, // data output - // write-port - input wr_clk,// wr clock - input wr_en, // memory access - input [AW-1:0] wr_addr, // address - input [DW-1:0] wr_wem, // write enable vector - input [DW-1:0] wr_din // data input - ); - - reg [DW-1:0] ram [DEPTH-1:0]; - integer i; - - //registered read port - always @ (posedge rd_clk) - if(rd_en) - rd_dout[DW-1:0] <= ram[rd_addr[AW-1:0]]; - - //write port with vector enable - always @(posedge wr_clk) - for (i=0;i=0;q=q-1) begin : gen_ipend - assign ic_ipend_in[q]=(ic_irq_entry[q]) | - (ic_ipend_reg[q] & ~de_rti) | - (|ic_ipend_shifted_reg[q:0]); //BUG????? - end - endgenerate - - always @ (posedge clk or negedge nreset) - if (!nreset) - ic_ipend_reg[IW-1:0] <= 'b0; - else if(ic_write_ipend) - ic_ipend_reg[IW-1:0] <= reg_wdata[IW-1:0]; - else - ic_ipend_reg[IW-1:0] <= ic_ipend_in[IW-1:0]; - - //########################### - //# IMASK - //########################### - - always @ (posedge clk or negedge nreset) - if (!nreset) - ic_imask_reg[IW-1:0] <= 'b0; - else if(ic_write_imask) - ic_imask_reg[IW-1:0] <= reg_wdata[IW-1:0]; - - //########################### - //# IRET - //########################### - always @ (posedge clk) - if(ic_flush) - ic_iret_reg[AW-1:0] <= sq_pc_next[AW-1:0]; - else if(ic_write_iret) - ic_iret_reg[AW-1:0] <= reg_wdata[AW-1:0]; - - //########################### - //# IRQ VECTOR TABLE - //########################### - genvar k; - generate - for(k=0;k0;m1=m1-1) - begin - ic_ilat_priority_en_n[m1]=1'b0; - for(m2=m1-1;m2>=0;m2=m2-1) - ic_ilat_priority_en_n[m1]=ic_ilat_priority_en_n[m1] | ic_masked_ilat[m2]; - end - //No priority needed for bit[0], highest priority, so it's always enabled - ic_ilat_priority_en_n[0]=1'b0; - end - - //IPEND PRIORITY - always @* - begin - for(n1=IW-1;n1>=0;n1=n1-1) - begin - ic_ipend_priority_en_n[n1]=1'b0; - for(n2=n1;n2>=0;n2=n2-1) - ic_ipend_priority_en_n[n1]=ic_ipend_priority_en_n[n1] | ic_ipend_reg[n2];//ic_ipend_reg[n2-1] - end - //Bit zero has no IPEND priority: NO - //ic_ipend_priority_en_n[0]=1'b0; - end - - //Outgoing Interrupt (to sequencer) - assign ic_irq_select[IW-1:0]= ic_masked_ilat[IW-1:0] & //only if the ILAT bit is not masked by IMASK - ~ic_ilat_priority_en_n[IW-1:0] & //only if there is no masked ilat bit BD IN GUI (ONE TIME..) -1. create ports -2. connect wires -3. run connection automation -4. create memory map -5. validate_bd_design -6. write_bd_tcl ./system_bd.tcl - ----- -## DESIGN LOOP -1. Make verilog change.. -2. make -3. profit - diff --git a/src/zcu102/fpga/zcu102/Makefile b/src/zcu102/fpga/zcu102/Makefile deleted file mode 100644 index aff223f..0000000 --- a/src/zcu102/fpga/zcu102/Makefile +++ /dev/null @@ -1,42 +0,0 @@ -M_DEPS += Makefile -M_DEPS += run.tcl -M_DEPS += system_bd.tcl -M_DEPS += system_params.tcl -M_DEPS += ../zcu102_base/zcu102_base.xpr -M_DEPS += ../zcu102_base/zcu102_base.zip -M_DEPS += ../zcu102_base/run.tcl - -M_VIVADO := vivado -mode batch -source - -M_FLIST := *.cache -M_FLIST += *.data -M_FLIST += *.xpr -M_FLIST += *.log -M_FLIST += *.jou -M_FLIST += xgui -M_FLIST += *.runs -M_FLIST += *.srcs -M_FLIST += *.sdk -M_FLIST += .Xil -M_FLIST += zcu102_elink.bit.bin -M_FLIST += system_wrapper.bit.bin -M_FLIST += reports -M_FLIST += results -M_FLIST += system.hw -M_FLIST += system.ip_user_files -M_FLIST += system.sim -M_FLIST += system.bin -M_FLIST += system.bit -M_FLIST += system.hdf -M_FLIST += system.hwdef -M_FLIST += vivado_*.str - -.PHONY: all clean - -all: $(M_DEPS) - #rm -f system_wrapper.bit.bin bit2bin.bin - $(M_VIVADO) run.tcl - #cp -f system_wrapper.bit.bin parallella_e16_headless_gpiose_7010.bit.bin - -clean: - rm -rf $(M_FLIST) diff --git a/src/zcu102/fpga/zcu102/build.sh b/src/zcu102/fpga/zcu102/build.sh deleted file mode 100755 index 4bd9cb3..0000000 --- a/src/zcu102/fpga/zcu102/build.sh +++ /dev/null @@ -1,7 +0,0 @@ -#!/bin/bash -make all -#rm system_wrapper.bit.bin bit2bin.bin -#vivado -mode batch -source run.tcl -#bootgen -image bit2bin.bif -split bin -#cp system_wrapper.bit.bin parallella_e16_headless_gpiose_7010.bit.bin -#archive results based on time stamp diff --git a/src/zcu102/fpga/zcu102/run.tcl b/src/zcu102/fpga/zcu102/run.tcl deleted file mode 100644 index 0ab34af..0000000 --- a/src/zcu102/fpga/zcu102/run.tcl +++ /dev/null @@ -1,12 +0,0 @@ - -#STEP1: DEFINE KEY PARAMETERS -source ./system_params.tcl - -#STEP2: CREATE PROJECT AND READ IN FILES -source ../../../common/fpga/system_init.tcl - -#STEP 3 (OPTIONAL): EDIT system.bd in VIVADO gui, then go to STEP 4. -##... - -#STEP 4: SYNTEHSIZE AND CREATE BITSTRAM -source ../../../common/fpga/system_build.tcl diff --git a/src/zcu102/fpga/zcu102/system_bd.tcl b/src/zcu102/fpga/zcu102/system_bd.tcl deleted file mode 100644 index 0366eae..0000000 --- a/src/zcu102/fpga/zcu102/system_bd.tcl +++ /dev/null @@ -1,2443 +0,0 @@ - -################################################################ -# This is a generated script based on design: system -# -# Though there are limitations about the generated script, -# the main purpose of this utility is to make learning -# IP Integrator Tcl commands easier. -################################################################ - -namespace eval _tcl { -proc get_script_folder {} { - set script_path [file normalize [info script]] - set script_folder [file dirname $script_path] - return $script_folder -} -} -variable script_folder -set script_folder [_tcl::get_script_folder] - -################################################################ -# Check if script is running in correct Vivado version. -################################################################ -set scripts_vivado_version 2016.4 -set current_vivado_version [version -short] - -if { [string first $scripts_vivado_version $current_vivado_version] == -1 } { - puts "" - catch {common::send_msg_id "BD_TCL-109" "ERROR" "This script was generated using Vivado <$scripts_vivado_version> and is being run in <$current_vivado_version> of Vivado. Please run the script in Vivado <$scripts_vivado_version> then open the design in Vivado <$current_vivado_version>. Upgrade the design by running \"Tools => Report => Report IP Status...\", then run write_bd_tcl to create an updated script."} - - return 1 -} - -################################################################ -# START -################################################################ - -# To test this script, run the following commands from Vivado Tcl console: -# source system_script.tcl - -# If there is no project opened, this script will create a -# project, but make sure you do not have an existing project -# <./myproj/project_1.xpr> in the current working folder. - -set list_projs [get_projects -quiet] -if { $list_projs eq "" } { - create_project project_1 myproj -part xczu9eg-ffvb1156-1-i-es2 -} - - -# CHANGE DESIGN NAME HERE -set design_name system - -# If you do not already have an existing IP Integrator design open, -# you can create a design using the following command: -# create_bd_design $design_name - -# Creating design if needed -set errMsg "" -set nRet 0 - -set cur_design [current_bd_design -quiet] -set list_cells [get_bd_cells -quiet] - -if { ${design_name} eq "" } { - # USE CASES: - # 1) Design_name not set - - set errMsg "Please set the variable to a non-empty value." - set nRet 1 - -} elseif { ${cur_design} ne "" && ${list_cells} eq "" } { - # USE CASES: - # 2): Current design opened AND is empty AND names same. - # 3): Current design opened AND is empty AND names diff; design_name NOT in project. - # 4): Current design opened AND is empty AND names diff; design_name exists in project. - - if { $cur_design ne $design_name } { - common::send_msg_id "BD_TCL-001" "INFO" "Changing value of from <$design_name> to <$cur_design> since current design is empty." - set design_name [get_property NAME $cur_design] - } - common::send_msg_id "BD_TCL-002" "INFO" "Constructing design in IPI design <$cur_design>..." - -} elseif { ${cur_design} ne "" && $list_cells ne "" && $cur_design eq $design_name } { - # USE CASES: - # 5) Current design opened AND has components AND same names. - - set errMsg "Design <$design_name> already exists in your project, please set the variable to another value." - set nRet 1 -} elseif { [get_files -quiet ${design_name}.bd] ne "" } { - # USE CASES: - # 6) Current opened design, has components, but diff names, design_name exists in project. - # 7) No opened design, design_name exists in project. - - set errMsg "Design <$design_name> already exists in your project, please set the variable to another value." - set nRet 2 - -} else { - # USE CASES: - # 8) No opened design, design_name not in project. - # 9) Current opened design, has components, but diff names, design_name not in project. - - common::send_msg_id "BD_TCL-003" "INFO" "Currently there is no design <$design_name> in project, so creating one..." - - create_bd_design $design_name - - common::send_msg_id "BD_TCL-004" "INFO" "Making design <$design_name> as current_bd_design." - current_bd_design $design_name - -} - -common::send_msg_id "BD_TCL-005" "INFO" "Currently the variable is equal to \"$design_name\"." - -if { $nRet != 0 } { - catch {common::send_msg_id "BD_TCL-114" "ERROR" $errMsg} - return $nRet -} - -################################################################## -# DESIGN PROCs -################################################################## - - - -# Procedure to create entire design; Provide argument to make -# procedure reusable. If parentCell is "", will use root. -proc create_root_design { parentCell } { - - variable script_folder - - if { $parentCell eq "" } { - set parentCell [get_bd_cells /] - } - - # Get object for parentCell - set parentObj [get_bd_cells $parentCell] - if { $parentObj == "" } { - catch {common::send_msg_id "BD_TCL-100" "ERROR" "Unable to find parent cell <$parentCell>!"} - return - } - - # Make sure parentObj is hier blk - set parentType [get_property TYPE $parentObj] - if { $parentType ne "hier" } { - catch {common::send_msg_id "BD_TCL-101" "ERROR" "Parent <$parentObj> has TYPE = <$parentType>. Expected to be ."} - return - } - - # Save current instance; Restore later - set oldCurInst [current_bd_instance .] - - # Set parent object as current - current_bd_instance $parentObj - - - # Create interface ports - - # Create ports - set cclk0_n [ create_bd_port -dir O cclk0_n ] - set cclk0_p [ create_bd_port -dir O cclk0_p ] - set chip_nreset [ create_bd_port -dir O chip_nreset ] - set clkpd_1p8v [ create_bd_port -dir O clkpd_1p8v ] - set gpio_n [ create_bd_port -dir IO -from 11 -to 0 gpio_n ] - set gpio_p [ create_bd_port -dir IO -from 11 -to 0 gpio_p ] - set i2c_scl [ create_bd_port -dir IO i2c_scl ] - set i2c_sda [ create_bd_port -dir IO i2c_sda ] - set rxi_data_n [ create_bd_port -dir I -from 7 -to 0 rxi_data_n ] - set rxi_data_p [ create_bd_port -dir I -from 7 -to 0 rxi_data_p ] - set rxi_frame_n [ create_bd_port -dir I rxi_frame_n ] - set rxi_frame_p [ create_bd_port -dir I rxi_frame_p ] - set rxi_lclk_n [ create_bd_port -dir I rxi_lclk_n ] - set rxi_lclk_p [ create_bd_port -dir I rxi_lclk_p ] - set rxo_rd_wait_n [ create_bd_port -dir O rxo_rd_wait_n ] - set rxo_rd_wait_p [ create_bd_port -dir O rxo_rd_wait_p ] - set rxo_wr_wait_n [ create_bd_port -dir O rxo_wr_wait_n ] - set rxo_wr_wait_p [ create_bd_port -dir O rxo_wr_wait_p ] - set txi_rd_wait_n [ create_bd_port -dir I txi_rd_wait_n ] - set txi_rd_wait_p [ create_bd_port -dir I txi_rd_wait_p ] - set txi_wr_wait_n [ create_bd_port -dir I txi_wr_wait_n ] - set txi_wr_wait_p [ create_bd_port -dir I txi_wr_wait_p ] - set txo_data_n [ create_bd_port -dir O -from 7 -to 0 txo_data_n ] - set txo_data_p [ create_bd_port -dir O -from 7 -to 0 txo_data_p ] - set txo_frame_n [ create_bd_port -dir O txo_frame_n ] - set txo_frame_p [ create_bd_port -dir O txo_frame_p ] - set txo_lclk_n [ create_bd_port -dir O txo_lclk_n ] - set txo_lclk_p [ create_bd_port -dir O txo_lclk_p ] - - # Create instance: axi_mem_intercon, and set properties - set axi_mem_intercon [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 axi_mem_intercon ] - set_property -dict [ list \ -CONFIG.NUM_MI {1} \ - ] $axi_mem_intercon - - # Create instance: proc_sys_reset_0, and set properties - set proc_sys_reset_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:proc_sys_reset:5.0 proc_sys_reset_0 ] - - # Create instance: sys_concat_intc, and set properties - set sys_concat_intc [ create_bd_cell -type ip -vlnv xilinx.com:ip:xlconcat:2.1 sys_concat_intc ] - set_property -dict [ list \ -CONFIG.NUM_PORTS {8} \ - ] $sys_concat_intc - - # Create instance: zcu102_base_0, and set properties - set zcu102_base_0 [ create_bd_cell -type ip -vlnv www.parallella.org:user:zcu102_base:1.0 zcu102_base_0 ] - set_property -dict [ list \ -CONFIG.NGPIO {12} \ - ] $zcu102_base_0 - - set_property -dict [ list \ -CONFIG.SUPPORTS_NARROW_BURST {1} \ -CONFIG.NUM_READ_OUTSTANDING {2} \ -CONFIG.NUM_WRITE_OUTSTANDING {2} \ -CONFIG.MAX_BURST_LENGTH {256} \ - ] [get_bd_intf_pins /zcu102_base_0/m_axi] - - set_property -dict [ list \ -CONFIG.NUM_READ_OUTSTANDING {2} \ -CONFIG.NUM_WRITE_OUTSTANDING {2} \ - ] [get_bd_intf_pins /zcu102_base_0/s_axi] - - # Create instance: zynq_ultra_ps_e_0, and set properties - set zynq_ultra_ps_e_0 [ create_bd_cell -type ip -vlnv xilinx.com:ip:zynq_ultra_ps_e:2.0 zynq_ultra_ps_e_0 ] - set_property -dict [ list \ -CONFIG.PSU_BANK_0_IO_STANDARD {LVCMOS33} \ -CONFIG.PSU_BANK_1_IO_STANDARD {LVCMOS33} \ -CONFIG.PSU_BANK_2_IO_STANDARD {LVCMOS33} \ -CONFIG.PSU_DDR_RAM_HIGHADDR {0xFFFFFFFF} \ -CONFIG.PSU_DDR_RAM_HIGHADDR_OFFSET {0x80000000} \ -CONFIG.PSU_MIO_0_DIRECTION {out} \ -CONFIG.PSU_MIO_0_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_0_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_0_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_0_SLEW {slow} \ -CONFIG.PSU_MIO_10_DIRECTION {inout} \ -CONFIG.PSU_MIO_10_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_10_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_10_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_10_SLEW {slow} \ -CONFIG.PSU_MIO_11_DIRECTION {inout} \ -CONFIG.PSU_MIO_11_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_11_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_11_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_11_SLEW {slow} \ -CONFIG.PSU_MIO_12_DIRECTION {out} \ -CONFIG.PSU_MIO_12_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_12_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_12_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_12_SLEW {slow} \ -CONFIG.PSU_MIO_13_DIRECTION {inout} \ -CONFIG.PSU_MIO_13_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_13_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_13_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_13_SLEW {slow} \ -CONFIG.PSU_MIO_14_DIRECTION {inout} \ -CONFIG.PSU_MIO_14_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_14_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_14_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_14_SLEW {slow} \ -CONFIG.PSU_MIO_15_DIRECTION {inout} \ -CONFIG.PSU_MIO_15_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_15_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_15_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_15_SLEW {slow} \ -CONFIG.PSU_MIO_16_DIRECTION {inout} \ -CONFIG.PSU_MIO_16_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_16_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_16_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_16_SLEW {slow} \ -CONFIG.PSU_MIO_17_DIRECTION {inout} \ -CONFIG.PSU_MIO_17_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_17_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_17_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_17_SLEW {slow} \ -CONFIG.PSU_MIO_18_DIRECTION {in} \ -CONFIG.PSU_MIO_18_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_18_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_18_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_18_SLEW {slow} \ -CONFIG.PSU_MIO_19_DIRECTION {out} \ -CONFIG.PSU_MIO_19_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_19_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_19_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_19_SLEW {slow} \ -CONFIG.PSU_MIO_1_DIRECTION {inout} \ -CONFIG.PSU_MIO_1_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_1_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_1_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_1_SLEW {slow} \ -CONFIG.PSU_MIO_20_DIRECTION {out} \ -CONFIG.PSU_MIO_20_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_20_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_20_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_20_SLEW {slow} \ -CONFIG.PSU_MIO_21_DIRECTION {in} \ -CONFIG.PSU_MIO_21_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_21_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_21_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_21_SLEW {slow} \ -CONFIG.PSU_MIO_22_DIRECTION {inout} \ -CONFIG.PSU_MIO_22_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_22_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_22_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_22_SLEW {slow} \ -CONFIG.PSU_MIO_23_DIRECTION {inout} \ -CONFIG.PSU_MIO_23_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_23_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_23_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_23_SLEW {slow} \ -CONFIG.PSU_MIO_24_DIRECTION {out} \ -CONFIG.PSU_MIO_24_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_24_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_24_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_24_SLEW {slow} \ -CONFIG.PSU_MIO_25_DIRECTION {in} \ -CONFIG.PSU_MIO_25_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_25_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_25_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_25_SLEW {slow} \ -CONFIG.PSU_MIO_26_DIRECTION {inout} \ -CONFIG.PSU_MIO_26_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_26_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_26_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_26_SLEW {slow} \ -CONFIG.PSU_MIO_27_DIRECTION {inout} \ -CONFIG.PSU_MIO_27_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_27_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_27_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_27_SLEW {slow} \ -CONFIG.PSU_MIO_28_DIRECTION {inout} \ -CONFIG.PSU_MIO_28_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_28_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_28_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_28_SLEW {slow} \ -CONFIG.PSU_MIO_29_DIRECTION {inout} \ -CONFIG.PSU_MIO_29_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_29_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_29_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_29_SLEW {slow} \ -CONFIG.PSU_MIO_2_DIRECTION {inout} \ -CONFIG.PSU_MIO_2_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_2_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_2_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_2_SLEW {slow} \ -CONFIG.PSU_MIO_30_DIRECTION {inout} \ -CONFIG.PSU_MIO_30_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_30_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_30_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_30_SLEW {slow} \ -CONFIG.PSU_MIO_31_DIRECTION {out} \ -CONFIG.PSU_MIO_31_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_31_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_31_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_31_SLEW {slow} \ -CONFIG.PSU_MIO_32_DIRECTION {out} \ -CONFIG.PSU_MIO_32_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_32_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_32_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_32_SLEW {slow} \ -CONFIG.PSU_MIO_33_DIRECTION {out} \ -CONFIG.PSU_MIO_33_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_33_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_33_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_33_SLEW {slow} \ -CONFIG.PSU_MIO_34_DIRECTION {out} \ -CONFIG.PSU_MIO_34_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_34_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_34_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_34_SLEW {slow} \ -CONFIG.PSU_MIO_35_DIRECTION {out} \ -CONFIG.PSU_MIO_35_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_35_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_35_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_35_SLEW {slow} \ -CONFIG.PSU_MIO_36_DIRECTION {out} \ -CONFIG.PSU_MIO_36_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_36_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_36_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_36_SLEW {slow} \ -CONFIG.PSU_MIO_37_DIRECTION {out} \ -CONFIG.PSU_MIO_37_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_37_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_37_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_37_SLEW {slow} \ -CONFIG.PSU_MIO_38_DIRECTION {inout} \ -CONFIG.PSU_MIO_38_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_38_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_38_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_38_SLEW {slow} \ -CONFIG.PSU_MIO_39_DIRECTION {inout} \ -CONFIG.PSU_MIO_39_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_39_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_39_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_39_SLEW {slow} \ -CONFIG.PSU_MIO_3_DIRECTION {inout} \ -CONFIG.PSU_MIO_3_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_3_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_3_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_3_SLEW {slow} \ -CONFIG.PSU_MIO_40_DIRECTION {inout} \ -CONFIG.PSU_MIO_40_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_40_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_40_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_40_SLEW {slow} \ -CONFIG.PSU_MIO_41_DIRECTION {inout} \ -CONFIG.PSU_MIO_41_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_41_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_41_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_41_SLEW {slow} \ -CONFIG.PSU_MIO_42_DIRECTION {inout} \ -CONFIG.PSU_MIO_42_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_42_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_42_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_42_SLEW {slow} \ -CONFIG.PSU_MIO_43_DIRECTION {out} \ -CONFIG.PSU_MIO_43_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_43_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_43_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_43_SLEW {slow} \ -CONFIG.PSU_MIO_44_DIRECTION {in} \ -CONFIG.PSU_MIO_44_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_44_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_44_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_44_SLEW {slow} \ -CONFIG.PSU_MIO_45_DIRECTION {in} \ -CONFIG.PSU_MIO_45_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_45_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_45_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_45_SLEW {slow} \ -CONFIG.PSU_MIO_46_DIRECTION {inout} \ -CONFIG.PSU_MIO_46_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_46_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_46_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_46_SLEW {slow} \ -CONFIG.PSU_MIO_47_DIRECTION {inout} \ -CONFIG.PSU_MIO_47_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_47_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_47_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_47_SLEW {slow} \ -CONFIG.PSU_MIO_48_DIRECTION {inout} \ -CONFIG.PSU_MIO_48_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_48_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_48_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_48_SLEW {slow} \ -CONFIG.PSU_MIO_49_DIRECTION {inout} \ -CONFIG.PSU_MIO_49_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_49_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_49_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_49_SLEW {slow} \ -CONFIG.PSU_MIO_4_DIRECTION {inout} \ -CONFIG.PSU_MIO_4_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_4_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_4_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_4_SLEW {slow} \ -CONFIG.PSU_MIO_50_DIRECTION {inout} \ -CONFIG.PSU_MIO_50_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_50_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_50_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_50_SLEW {slow} \ -CONFIG.PSU_MIO_51_DIRECTION {out} \ -CONFIG.PSU_MIO_51_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_51_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_51_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_51_SLEW {slow} \ -CONFIG.PSU_MIO_52_DIRECTION {in} \ -CONFIG.PSU_MIO_52_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_52_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_52_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_52_SLEW {slow} \ -CONFIG.PSU_MIO_53_DIRECTION {in} \ -CONFIG.PSU_MIO_53_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_53_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_53_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_53_SLEW {slow} \ -CONFIG.PSU_MIO_54_DIRECTION {inout} \ -CONFIG.PSU_MIO_54_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_54_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_54_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_54_SLEW {slow} \ -CONFIG.PSU_MIO_55_DIRECTION {in} \ -CONFIG.PSU_MIO_55_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_55_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_55_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_55_SLEW {slow} \ -CONFIG.PSU_MIO_56_DIRECTION {inout} \ -CONFIG.PSU_MIO_56_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_56_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_56_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_56_SLEW {slow} \ -CONFIG.PSU_MIO_57_DIRECTION {inout} \ -CONFIG.PSU_MIO_57_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_57_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_57_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_57_SLEW {slow} \ -CONFIG.PSU_MIO_58_DIRECTION {out} \ -CONFIG.PSU_MIO_58_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_58_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_58_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_58_SLEW {slow} \ -CONFIG.PSU_MIO_59_DIRECTION {inout} \ -CONFIG.PSU_MIO_59_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_59_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_59_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_59_SLEW {slow} \ -CONFIG.PSU_MIO_5_DIRECTION {out} \ -CONFIG.PSU_MIO_5_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_5_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_5_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_5_SLEW {slow} \ -CONFIG.PSU_MIO_60_DIRECTION {inout} \ -CONFIG.PSU_MIO_60_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_60_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_60_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_60_SLEW {slow} \ -CONFIG.PSU_MIO_61_DIRECTION {inout} \ -CONFIG.PSU_MIO_61_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_61_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_61_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_61_SLEW {slow} \ -CONFIG.PSU_MIO_62_DIRECTION {inout} \ -CONFIG.PSU_MIO_62_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_62_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_62_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_62_SLEW {slow} \ -CONFIG.PSU_MIO_63_DIRECTION {inout} \ -CONFIG.PSU_MIO_63_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_63_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_63_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_63_SLEW {slow} \ -CONFIG.PSU_MIO_64_DIRECTION {out} \ -CONFIG.PSU_MIO_64_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_64_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_64_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_64_SLEW {slow} \ -CONFIG.PSU_MIO_65_DIRECTION {out} \ -CONFIG.PSU_MIO_65_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_65_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_65_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_65_SLEW {slow} \ -CONFIG.PSU_MIO_66_DIRECTION {out} \ -CONFIG.PSU_MIO_66_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_66_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_66_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_66_SLEW {slow} \ -CONFIG.PSU_MIO_67_DIRECTION {out} \ -CONFIG.PSU_MIO_67_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_67_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_67_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_67_SLEW {slow} \ -CONFIG.PSU_MIO_68_DIRECTION {out} \ -CONFIG.PSU_MIO_68_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_68_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_68_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_68_SLEW {slow} \ -CONFIG.PSU_MIO_69_DIRECTION {out} \ -CONFIG.PSU_MIO_69_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_69_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_69_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_69_SLEW {slow} \ -CONFIG.PSU_MIO_6_DIRECTION {out} \ -CONFIG.PSU_MIO_6_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_6_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_6_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_6_SLEW {slow} \ -CONFIG.PSU_MIO_70_DIRECTION {in} \ -CONFIG.PSU_MIO_70_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_70_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_70_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_70_SLEW {slow} \ -CONFIG.PSU_MIO_71_DIRECTION {in} \ -CONFIG.PSU_MIO_71_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_71_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_71_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_71_SLEW {slow} \ -CONFIG.PSU_MIO_72_DIRECTION {in} \ -CONFIG.PSU_MIO_72_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_72_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_72_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_72_SLEW {slow} \ -CONFIG.PSU_MIO_73_DIRECTION {in} \ -CONFIG.PSU_MIO_73_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_73_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_73_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_73_SLEW {slow} \ -CONFIG.PSU_MIO_74_DIRECTION {in} \ -CONFIG.PSU_MIO_74_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_74_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_74_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_74_SLEW {slow} \ -CONFIG.PSU_MIO_75_DIRECTION {in} \ -CONFIG.PSU_MIO_75_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_75_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_75_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_75_SLEW {slow} \ -CONFIG.PSU_MIO_76_DIRECTION {out} \ -CONFIG.PSU_MIO_76_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_76_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_76_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_76_SLEW {slow} \ -CONFIG.PSU_MIO_77_DIRECTION {inout} \ -CONFIG.PSU_MIO_77_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_77_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_77_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_77_SLEW {slow} \ -CONFIG.PSU_MIO_7_DIRECTION {out} \ -CONFIG.PSU_MIO_7_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_7_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_7_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_7_SLEW {slow} \ -CONFIG.PSU_MIO_8_DIRECTION {inout} \ -CONFIG.PSU_MIO_8_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_8_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_8_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_8_SLEW {slow} \ -CONFIG.PSU_MIO_9_DIRECTION {inout} \ -CONFIG.PSU_MIO_9_DRIVE_STRENGTH {12} \ -CONFIG.PSU_MIO_9_INPUT_TYPE {schmitt} \ -CONFIG.PSU_MIO_9_PULLUPDOWN {pullup} \ -CONFIG.PSU_MIO_9_SLEW {slow} \ -CONFIG.PSU_MIO_TREE_PERIPHERALS {Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Feedback Clk#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#GPIO0 MIO#I2C 0#I2C 0#I2C 1#I2C 1#UART 0#UART 0#UART 1#UART 1#GPIO0 MIO#GPIO0 MIO#CAN 1#CAN 1#GPIO1 MIO#GPIO1 MIO#GPIO1 MIO#GPIO1 MIO#GPIO1 MIO#PCIE#PMU GPO 0#PMU GPO 1#PMU GPO 2#PMU GPO 3#PMU GPO 4#PMU GPO 5#GPIO1 MIO#SD 1#SD 1#SD 1#SD 1#SD 1#SD 1#SD 1#SD 1#SD 1#SD 1#SD 1#SD 1#SD 1#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#Gem 3#Gem 3#Gem 3#Gem 3#Gem 3#Gem 3#Gem 3#Gem 3#Gem 3#Gem 3#Gem 3#Gem 3#MDIO 3#MDIO 3} \ -CONFIG.PSU_MIO_TREE_SIGNALS {sclk_out#so_mo1#mo2#mo3#si_mi0#n_ss_out#clk_for_lpbk#n_ss_out_upper#mo_upper[0]#mo_upper[1]#mo_upper[2]#mo_upper[3]#sclk_out_upper#gpio0[13]#scl_out#sda_out#scl_out#sda_out#rxd#txd#txd#rxd#gpio0[22]#gpio0[23]#phy_tx#phy_rx#gpio1[26]#gpio1[27]#gpio1[28]#gpio1[29]#gpio1[30]#reset_n#gpo[0]#gpo[1]#gpo[2]#gpo[3]#gpo[4]#gpo[5]#gpio1[38]#sdio1_data_out[4]#sdio1_data_out[5]#sdio1_data_out[6]#sdio1_data_out[7]#sdio1_bus_pow#sdio1_wp#sdio1_cd_n#sdio1_data_out[0]#sdio1_data_out[1]#sdio1_data_out[2]#sdio1_data_out[3]#sdio1_cmd_out#sdio1_clk_out#ulpi_clk_in#ulpi_dir#ulpi_tx_data[2]#ulpi_nxt#ulpi_tx_data[0]#ulpi_tx_data[1]#ulpi_stp#ulpi_tx_data[3]#ulpi_tx_data[4]#ulpi_tx_data[5]#ulpi_tx_data[6]#ulpi_tx_data[7]#rgmii_tx_clk#rgmii_txd[0]#rgmii_txd[1]#rgmii_txd[2]#rgmii_txd[3]#rgmii_tx_ctl#rgmii_rx_clk#rgmii_rxd[0]#rgmii_rxd[1]#rgmii_rxd[2]#rgmii_rxd[3]#rgmii_rx_ctl#gem3_mdc#gem3_mdio_out} \ -CONFIG.PSU_UIPARAM_GENERATE_SUMMARY {} \ -CONFIG.PSU__CAN0__PERIPHERAL__ENABLE {0} \ -CONFIG.PSU__CAN0__PERIPHERAL__IO {} \ -CONFIG.PSU__CAN1__PERIPHERAL__ENABLE {1} \ -CONFIG.PSU__CAN1__PERIPHERAL__IO {MIO 24 .. 25} \ -CONFIG.PSU__CRF_APB__ACPU_CTRL__ACT_FREQMHZ {1199.988} \ -CONFIG.PSU__CRF_APB__ACPU_CTRL__DIVISOR0 {1} \ -CONFIG.PSU__CRF_APB__ACPU_CTRL__FREQMHZ {1200} \ -CONFIG.PSU__CRF_APB__ACPU_CTRL__SRCSEL {APLL} \ -CONFIG.PSU__CRF_APB__AFI0_REF_CTRL__ACT_FREQMHZ {667} \ -CONFIG.PSU__CRF_APB__AFI0_REF_CTRL__DIVISOR0 {2} \ -CONFIG.PSU__CRF_APB__AFI0_REF_CTRL__FREQMHZ {667} \ -CONFIG.PSU__CRF_APB__AFI0_REF_CTRL__SRCSEL {DPLL} \ -CONFIG.PSU__CRF_APB__AFI0_REF__ENABLE {0} \ -CONFIG.PSU__CRF_APB__AFI1_REF_CTRL__ACT_FREQMHZ {667} \ -CONFIG.PSU__CRF_APB__AFI1_REF_CTRL__DIVISOR0 {2} \ -CONFIG.PSU__CRF_APB__AFI1_REF_CTRL__FREQMHZ {667} \ -CONFIG.PSU__CRF_APB__AFI1_REF_CTRL__SRCSEL {DPLL} \ -CONFIG.PSU__CRF_APB__AFI1_REF__ENABLE {0} \ -CONFIG.PSU__CRF_APB__AFI2_REF_CTRL__ACT_FREQMHZ {667} \ -CONFIG.PSU__CRF_APB__AFI2_REF_CTRL__DIVISOR0 {2} \ -CONFIG.PSU__CRF_APB__AFI2_REF_CTRL__FREQMHZ {667} \ -CONFIG.PSU__CRF_APB__AFI2_REF_CTRL__SRCSEL {DPLL} \ -CONFIG.PSU__CRF_APB__AFI2_REF__ENABLE {0} \ -CONFIG.PSU__CRF_APB__AFI3_REF_CTRL__ACT_FREQMHZ {667} \ -CONFIG.PSU__CRF_APB__AFI3_REF_CTRL__DIVISOR0 {2} \ -CONFIG.PSU__CRF_APB__AFI3_REF_CTRL__FREQMHZ {667} \ -CONFIG.PSU__CRF_APB__AFI3_REF_CTRL__SRCSEL {DPLL} \ -CONFIG.PSU__CRF_APB__AFI3_REF__ENABLE {0} \ -CONFIG.PSU__CRF_APB__AFI4_REF_CTRL__ACT_FREQMHZ {667} \ -CONFIG.PSU__CRF_APB__AFI4_REF_CTRL__DIVISOR0 {2} \ -CONFIG.PSU__CRF_APB__AFI4_REF_CTRL__FREQMHZ {667} \ -CONFIG.PSU__CRF_APB__AFI4_REF_CTRL__SRCSEL {DPLL} \ -CONFIG.PSU__CRF_APB__AFI4_REF__ENABLE {0} \ -CONFIG.PSU__CRF_APB__AFI5_REF_CTRL__ACT_FREQMHZ {667} \ -CONFIG.PSU__CRF_APB__AFI5_REF_CTRL__DIVISOR0 {2} \ -CONFIG.PSU__CRF_APB__AFI5_REF_CTRL__FREQMHZ {667} \ -CONFIG.PSU__CRF_APB__AFI5_REF_CTRL__SRCSEL {DPLL} \ -CONFIG.PSU__CRF_APB__AFI5_REF__ENABLE {0} \ -CONFIG.PSU__CRF_APB__APLL_CTRL__DIV2 {1} \ -CONFIG.PSU__CRF_APB__APLL_CTRL__FBDIV {72} \ -CONFIG.PSU__CRF_APB__APLL_CTRL__FRACDATA {0.000000} \ -CONFIG.PSU__CRF_APB__APLL_CTRL__FRACFREQ {27.138} \ -CONFIG.PSU__CRF_APB__APLL_CTRL__SRCSEL {PSS_REF_CLK} \ -CONFIG.PSU__CRF_APB__APLL_FRAC_CFG__ENABLED {0} \ -CONFIG.PSU__CRF_APB__APLL_TO_LPD_CTRL__DIVISOR0 {3} \ -CONFIG.PSU__CRF_APB__APM_CTRL__ACT_FREQMHZ {1} \ -CONFIG.PSU__CRF_APB__APM_CTRL__DIVISOR0 {1} \ -CONFIG.PSU__CRF_APB__APM_CTRL__FREQMHZ {1} \ -CONFIG.PSU__CRF_APB__APM_CTRL__SRCSEL {} \ -CONFIG.PSU__CSU__CSU_TAMPER_10__ENABLE {0} \ -CONFIG.PSU__CSU__CSU_TAMPER_10__ERASE_BBRAM {0} \ -CONFIG.PSU__CSU__CSU_TAMPER_10__RESPONSE {} \ -CONFIG.PSU__CSU__CSU_TAMPER_12__ENABLE {0} \ -CONFIG.PSU__CSU__CSU_TAMPER_12__ERASE_BBRAM {0} \ -CONFIG.PSU__CSU__CSU_TAMPER_12__RESPONSE {} \ -CONFIG.PSU__CSU__CSU_TAMPER_2__ENABLE {0} \ -CONFIG.PSU__CSU__CSU_TAMPER_2__ERASE_BBRAM {0} \ -CONFIG.PSU__CSU__CSU_TAMPER_2__RESPONSE {} \ -CONFIG.PSU__CSU__CSU_TAMPER_4__ENABLE {0} \ -CONFIG.PSU__CSU__CSU_TAMPER_4__ERASE_BBRAM {0} \ -CONFIG.PSU__CSU__CSU_TAMPER_4__RESPONSE {} \ -CONFIG.PSU__CSU__CSU_TAMPER_6__ENABLE {0} \ -CONFIG.PSU__CSU__CSU_TAMPER_6__ERASE_BBRAM {0} \ -CONFIG.PSU__CSU__CSU_TAMPER_6__RESPONSE {} \ -CONFIG.PSU__CSU__CSU_TAMPER_8__ENABLE {0} \ -CONFIG.PSU__CSU__CSU_TAMPER_8__ERASE_BBRAM {0} \ -CONFIG.PSU__CSU__CSU_TAMPER_8__RESPONSE {} \ -CONFIG.PSU__CSU__PERIPHERAL__ENABLE {0} \ -CONFIG.PSU__CSU__PERIPHERAL__IO {} \ -CONFIG.PSU__DDRC__DERATE_INT_D {} \ -CONFIG.PSU__DDRC__LP_ASR {manual normal} \ -CONFIG.PSU__DDRC__MEMORY_TYPE {DDR 4} \ -CONFIG.PSU__DDRC__PARITY_ENABLE {0} \ -CONFIG.PSU__DDRC__PARTNO {} \ -CONFIG.PSU__DISPLAYPORT__LANE1__ENABLE {0} \ -CONFIG.PSU__DISPLAYPORT__LANE1__IO {} \ -CONFIG.PSU__DP__LANE_SEL {} \ -CONFIG.PSU__DP__REF_CLK_SEL {} \ -CONFIG.PSU__ENET0__PERIPHERAL__ENABLE {0} \ -CONFIG.PSU__ENET0__PERIPHERAL__IO {} \ -CONFIG.PSU__ENET1__PERIPHERAL__ENABLE {0} \ -CONFIG.PSU__ENET1__PERIPHERAL__IO {} \ -CONFIG.PSU__ENET2__PERIPHERAL__ENABLE {0} \ -CONFIG.PSU__ENET2__PERIPHERAL__IO {} \ -CONFIG.PSU__GEM0__REF_CLK_SEL {} \ -CONFIG.PSU__GEM1__REF_CLK_SEL {} \ -CONFIG.PSU__GEM2__REF_CLK_SEL {} \ -CONFIG.PSU__GEM3__REF_CLK_SEL {} \ -CONFIG.PSU__GEN_IPI_0__MASTER {APU} \ -CONFIG.PSU__GEN_IPI_10__MASTER {NONE} \ -CONFIG.PSU__GEN_IPI_1__MASTER {RPU0} \ -CONFIG.PSU__GEN_IPI_2__MASTER {RPU1} \ -CONFIG.PSU__GEN_IPI_3__MASTER {PMU} \ -CONFIG.PSU__GEN_IPI_4__MASTER {PMU} \ -CONFIG.PSU__GEN_IPI_5__MASTER {PMU} \ -CONFIG.PSU__GEN_IPI_6__MASTER {PMU} \ -CONFIG.PSU__GEN_IPI_7__MASTER {NONE} \ -CONFIG.PSU__GEN_IPI_8__MASTER {NONE} \ -CONFIG.PSU__GEN_IPI_9__MASTER {NONE} \ -CONFIG.PSU__GPIO0_MIO__IO {MIO 0 .. 25} \ -CONFIG.PSU__GPIO0_MIO__PERIPHERAL__ENABLE {1} \ -CONFIG.PSU__GPIO1_MIO__IO {MIO 26 .. 51} \ -CONFIG.PSU__GPIO1_MIO__PERIPHERAL__ENABLE {1} \ -CONFIG.PSU__GPIO2_MIO__IO {} \ -CONFIG.PSU__GPIO_EMIO__WIDTH {[94:0]} \ -CONFIG.PSU__GPU_PP0__POWER__ON {1} \ -CONFIG.PSU__GPU_PP1__POWER__ON {1} \ -CONFIG.PSU__GT_REF_CLK__FREQMHZ {33.333} \ -CONFIG.PSU__GT__LINK_SPEED {} \ -CONFIG.PSU__I2C0__PERIPHERAL__ENABLE {1} \ -CONFIG.PSU__I2C0__PERIPHERAL__IO {MIO 14 .. 15} \ -CONFIG.PSU__I2C1__GRP_INT__ENABLE {0} \ -CONFIG.PSU__I2C1__GRP_INT__IO {} \ -CONFIG.PSU__NAND__DATA_STROBE__ENABLE {0} \ -CONFIG.PSU__NAND__DATA_STROBE__IO {} \ -CONFIG.PSU__NAND__READY_BUSY__ENABLE {0} \ -CONFIG.PSU__NAND__READY_BUSY__IO {} \ -CONFIG.PSU__PCIE__BAR0_SIZE {} \ -CONFIG.PSU__PCIE__BAR0_VAL {0x0} \ -CONFIG.PSU__PCIE__BAR1_64BIT {0} \ -CONFIG.PSU__PCIE__BAR1_ENABLE {0} \ -CONFIG.PSU__PCIE__BAR1_PREFETCHABLE {0} \ -CONFIG.PSU__PCIE__BAR1_SCALE {} \ -CONFIG.PSU__PCIE__BAR1_TYPE {} \ -CONFIG.PSU__PCIE__BAR2_SIZE {} \ -CONFIG.PSU__PCIE__BAR2_VAL {0x0} \ -CONFIG.PSU__PCIE__BAR3_64BIT {0} \ -CONFIG.PSU__PCIE__BAR3_ENABLE {0} \ -CONFIG.PSU__PCIE__BAR3_PREFETCHABLE {0} \ -CONFIG.PSU__PCIE__BAR3_SCALE {} \ -CONFIG.PSU__PCIE__BAR3_TYPE {} \ -CONFIG.PSU__PCIE__BAR4_SIZE {} \ -CONFIG.PSU__PCIE__BAR4_VAL {0x0} \ -CONFIG.PSU__PCIE__BAR5_64BIT {0} \ -CONFIG.PSU__PCIE__BAR5_ENABLE {0} \ -CONFIG.PSU__PCIE__BAR5_PREFETCHABLE {0} \ -CONFIG.PSU__PCIE__BAR5_SCALE {} \ -CONFIG.PSU__PCIE__BAR5_TYPE {} \ -CONFIG.PSU__PCIE__BRIDGE_BAR_INDICATOR {} \ -CONFIG.PSU__PCIE__CLASS_CODE_BASE {0x06} \ -CONFIG.PSU__PCIE__CLASS_CODE_INTERFACE {0x0} \ -CONFIG.PSU__PCIE__CLASS_CODE_SUB {0x4} \ -CONFIG.PSU__PCIE__CLASS_CODE_VALUE {0x60400} \ -CONFIG.PSU__PCIE__COMPLETER_ABORT {0} \ -CONFIG.PSU__PCIE__COMPLTION_TIMEOUT {0} \ -CONFIG.PSU__PCIE__CORRECTABLE_INT_ERR {0} \ -CONFIG.PSU__PCIE__CRS_SW_VISIBILITY {1} \ -CONFIG.PSU__PCIE__DEVICE_ID {0xD022} \ -CONFIG.PSU__PCIE__DEVICE_PORT_TYPE {Root Port} \ -CONFIG.PSU__PCIE__ECRC_CHECK {0} \ -CONFIG.PSU__PCIE__ECRC_ERR {0} \ -CONFIG.PSU__PCIE__ECRC_GEN {0} \ -CONFIG.PSU__PCIE__EROM_ENABLE {0} \ -CONFIG.PSU__PCIE__EROM_SCALE {} \ -CONFIG.PSU__PCIE__EROM_VAL {0x0} \ -CONFIG.PSU__PCIE__FLOW_CONTROL_ERR {0} \ -CONFIG.PSU__PCIE__FLOW_CONTROL_PROTOCOL_ERR {0} \ -CONFIG.PSU__PCIE__HEADER_LOG_OVERFLOW {0} \ -CONFIG.PSU__PCIE__INTERFACE_WIDTH {} \ -CONFIG.PSU__PCIE__LANE0__ENABLE {1} \ -CONFIG.PSU__PCIE__LANE0__IO {GT Lane0} \ -CONFIG.PSU__PCIE__LANE1__ENABLE {1} \ -CONFIG.PSU__PCIE__LANE1__IO {GT Lane1} \ -CONFIG.PSU__PCIE__LANE2__ENABLE {0} \ -CONFIG.PSU__PCIE__LANE2__IO {} \ -CONFIG.PSU__PCIE__LEGACY_INTERRUPT {} \ -CONFIG.PSU__PCIE__MULTIHEADER {0} \ -CONFIG.PSU__PCIE__PERIPHERAL__ENABLE {1} \ -CONFIG.PSU__PCIE__PERIPHERAL__ENDPOINT_ENABLE {0} \ -CONFIG.PSU__PCIE__PERIPHERAL__ENDPOINT_IO {} \ -CONFIG.PSU__PCIE__SURPRISE_DOWN {0} \ -CONFIG.PSU__PCIE__TLP_PREFIX_BLOCKED {0} \ -CONFIG.PSU__PCIE__UNCORRECTABL_INT_ERR {0} \ -CONFIG.PSU__PCIE__USE_CLASS_CODE_LOOKUP_ASSISTANT {} \ -CONFIG.PSU__PL_CLK0_BUF {TRUE} \ -CONFIG.PSU__PL_CLK1_BUF {TRUE} \ -CONFIG.PSU__PL_CLK2_BUF {TRUE} \ -CONFIG.PSU__PL_CLK3_BUF {TRUE} \ -CONFIG.PSU__PL__POWER__ON {1} \ -CONFIG.PSU__PMU__EMIO_GPI__ENABLE {0} \ -CONFIG.PSU__PMU__EMIO_GPO__ENABLE {0} \ -CONFIG.PSU__PMU__GPI0__ENABLE {0} \ -CONFIG.PSU__PMU__GPI0__IO {} \ -CONFIG.PSU__PMU__GPI2__ENABLE {0} \ -CONFIG.PSU__PMU__GPI2__IO {} \ -CONFIG.PSU__PMU__GPI4__ENABLE {0} \ -CONFIG.PSU__PMU__GPI4__IO {} \ -CONFIG.PSU__PMU__GPO0__ENABLE {1} \ -CONFIG.PSU__PMU__GPO0__IO {MIO 32} \ -CONFIG.PSU__PMU__GPO1__ENABLE {1} \ -CONFIG.PSU__PMU__GPO1__IO {MIO 33} \ -CONFIG.PSU__PMU__GPO2__ENABLE {1} \ -CONFIG.PSU__PMU__GPO2__IO {MIO 34} \ -CONFIG.PSU__PMU__GPO3__ENABLE {1} \ -CONFIG.PSU__PMU__GPO3__IO {MIO 35} \ -CONFIG.PSU__PMU__GPO4__ENABLE {1} \ -CONFIG.PSU__PMU__GPO4__IO {MIO 36} \ -CONFIG.PSU__PMU__GPO5__ENABLE {1} \ -CONFIG.PSU__PMU__GPO5__IO {MIO 37} \ -CONFIG.PSU__PMU__PERIPHERAL__ENABLE {1} \ -CONFIG.PSU__PMU__PERIPHERAL__IO {} \ -CONFIG.PSU__PSS_REF_CLK__FREQMHZ {33.333} \ -CONFIG.PSU__QSPI__GRP_FBCLK__ENABLE {1} \ -CONFIG.PSU__QSPI__GRP_FBCLK__IO {MIO 6} \ -CONFIG.PSU__QSPI__PERIPHERAL__DATA_MODE {x4} \ -CONFIG.PSU__QSPI__PERIPHERAL__ENABLE {1} \ -CONFIG.PSU__QSPI__PERIPHERAL__IO {MIO 0 .. 12} \ -CONFIG.PSU__QSPI__PERIPHERAL__MODE {Dual Parallel} \ -CONFIG.PSU__RPU__POWER__ON {1} \ -CONFIG.PSU__SATA__LANE0__ENABLE {0} \ -CONFIG.PSU__SATA__LANE0__IO {} \ -CONFIG.PSU__SD0__GRP_CD__ENABLE {0} \ -CONFIG.PSU__SD0__GRP_CD__IO {} \ -CONFIG.PSU__SD0__GRP_WP__ENABLE {0} \ -CONFIG.PSU__SD0__GRP_WP__IO {} \ -CONFIG.PSU__SD0__RESET__ENABLE {0} \ -CONFIG.PSU__SD0__SLOT_TYPE {} \ -CONFIG.PSU__SPI0__GRP_SS1__ENABLE {0} \ -CONFIG.PSU__SPI0__GRP_SS1__IO {} \ -CONFIG.PSU__SPI0__PERIPHERAL__ENABLE {0} \ -CONFIG.PSU__SPI0__PERIPHERAL__IO {} \ -CONFIG.PSU__SPI1__GRP_SS1__ENABLE {0} \ -CONFIG.PSU__SPI1__GRP_SS1__IO {} \ -CONFIG.PSU__SPI1__PERIPHERAL__ENABLE {0} \ -CONFIG.PSU__SPI1__PERIPHERAL__IO {} \ -CONFIG.PSU__SWDT0__PERIPHERAL__ENABLE {1} \ -CONFIG.PSU__SWDT0__PERIPHERAL__IO {EMIO} \ -CONFIG.PSU__SWDT0__RESET__ENABLE {0} \ -CONFIG.PSU__SWDT0__RESET__IO {} \ -CONFIG.PSU__SWDT1__PERIPHERAL__ENABLE {1} \ -CONFIG.PSU__SWDT1__PERIPHERAL__IO {EMIO} \ -CONFIG.PSU__SWDT1__RESET__ENABLE {0} \ -CONFIG.PSU__SWDT1__RESET__IO {} \ -CONFIG.PSU__TRACE__WIDTH {} \ -CONFIG.PSU__TTC0__PERIPHERAL__ENABLE {1} \ -CONFIG.PSU__TTC0__PERIPHERAL__IO {EMIO} \ -CONFIG.PSU__TTC0__WAVEOUT__ENABLE {0} \ -CONFIG.PSU__TTC0__WAVEOUT__IO {} \ -CONFIG.PSU__TTC1__PERIPHERAL__ENABLE {1} \ -CONFIG.PSU__TTC1__PERIPHERAL__IO {EMIO} \ -CONFIG.PSU__TTC1__WAVEOUT__ENABLE {0} \ -CONFIG.PSU__TTC1__WAVEOUT__IO {} \ -CONFIG.PSU__TTC2__PERIPHERAL__ENABLE {1} \ -CONFIG.PSU__TTC2__PERIPHERAL__IO {EMIO} \ -CONFIG.PSU__TTC2__WAVEOUT__ENABLE {0} \ -CONFIG.PSU__TTC2__WAVEOUT__IO {} \ -CONFIG.PSU__TTC3__PERIPHERAL__ENABLE {1} \ -CONFIG.PSU__TTC3__PERIPHERAL__IO {EMIO} \ -CONFIG.PSU__TTC3__WAVEOUT__ENABLE {0} \ -CONFIG.PSU__TTC3__WAVEOUT__IO {} \ -CONFIG.PSU__USB1__REF_CLK_FREQ {} \ -CONFIG.PSU__USB2_0__EMIO__ENABLE {0} \ -CONFIG.PSU__USB2_1__EMIO__ENABLE {0} \ -CONFIG.PSU__USB3_0__EMIO__ENABLE {0} \ -CONFIG.PSU__USB3_0__PERIPHERAL__ENABLE {1} \ -CONFIG.PSU__USB3_0__PERIPHERAL__IO {GT Lane2} \ -CONFIG.PSU__USB3_1__EMIO__ENABLE {0} \ -CONFIG.PSU__USB3_1__PERIPHERAL__ENABLE {0} \ -CONFIG.PSU__USB3_1__PERIPHERAL__IO {} \ - ] $zynq_ultra_ps_e_0 - - # Need to retain value_src of defaults - set_property -dict [ list \ -CONFIG.PSU_BANK_0_IO_STANDARD.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_BANK_1_IO_STANDARD.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_BANK_2_IO_STANDARD.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_DDR_RAM_HIGHADDR.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_DDR_RAM_HIGHADDR_OFFSET.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_0_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_0_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_0_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_0_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_0_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_10_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_10_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_10_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_10_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_10_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_11_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_11_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_11_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_11_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_11_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_12_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_12_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_12_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_12_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_12_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_13_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_13_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_13_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_13_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_13_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_14_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_14_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_14_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_14_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_14_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_15_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_15_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_15_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_15_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_15_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_16_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_16_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_16_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_16_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_16_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_17_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_17_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_17_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_17_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_17_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_18_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_18_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_18_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_18_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_18_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_19_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_19_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_19_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_19_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_19_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_1_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_1_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_1_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_1_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_1_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_20_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_20_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_20_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_20_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_20_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_21_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_21_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_21_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_21_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_21_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_22_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_22_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_22_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_22_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_22_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_23_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_23_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_23_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_23_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_23_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_24_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_24_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_24_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_24_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_24_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_25_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_25_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_25_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_25_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_25_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_26_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_26_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_26_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_26_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_26_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_27_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_27_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_27_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_27_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_27_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_28_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_28_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_28_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_28_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_28_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_29_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_29_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_29_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_29_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_29_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_2_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_2_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_2_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_2_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_2_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_30_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_30_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_30_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_30_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_30_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_31_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_31_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_31_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_31_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_31_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_32_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_32_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_32_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_32_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_32_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_33_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_33_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_33_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_33_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_33_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_34_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_34_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_34_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_34_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_34_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_35_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_35_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_35_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_35_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_35_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_36_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_36_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_36_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_36_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_36_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_37_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_37_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_37_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_37_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_37_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_38_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_38_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_38_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_38_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_38_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_39_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_39_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_39_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_39_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_39_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_3_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_3_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_3_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_3_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_3_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_40_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_40_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_40_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_40_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_40_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_41_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_41_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_41_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_41_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_41_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_42_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_42_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_42_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_42_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_42_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_43_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_43_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_43_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_43_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_43_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_44_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_44_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_44_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_44_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_44_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_45_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_45_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_45_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_45_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_45_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_46_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_46_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_46_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_46_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_46_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_47_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_47_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_47_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_47_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_47_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_48_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_48_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_48_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_48_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_48_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_49_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_49_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_49_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_49_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_49_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_4_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_4_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_4_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_4_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_4_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_50_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_50_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_50_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_50_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_50_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_51_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_51_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_51_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_51_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_51_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_52_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_52_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_52_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_52_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_52_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_53_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_53_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_53_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_53_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_53_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_54_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_54_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_54_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_54_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_54_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_55_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_55_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_55_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_55_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_55_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_56_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_56_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_56_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_56_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_56_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_57_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_57_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_57_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_57_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_57_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_58_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_58_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_58_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_58_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_58_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_59_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_59_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_59_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_59_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_59_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_5_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_5_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_5_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_5_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_5_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_60_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_60_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_60_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_60_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_60_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_61_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_61_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_61_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_61_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_61_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_62_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_62_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_62_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_62_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_62_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_63_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_63_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_63_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_63_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_63_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_64_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_64_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_64_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_64_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_64_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_65_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_65_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_65_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_65_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_65_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_66_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_66_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_66_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_66_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_66_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_67_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_67_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_67_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_67_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_67_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_68_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_68_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_68_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_68_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_68_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_69_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_69_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_69_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_69_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_69_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_6_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_6_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_6_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_6_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_6_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_70_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_70_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_70_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_70_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_70_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_71_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_71_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_71_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_71_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_71_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_72_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_72_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_72_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_72_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_72_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_73_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_73_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_73_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_73_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_73_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_74_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_74_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_74_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_74_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_74_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_75_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_75_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_75_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_75_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_75_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_76_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_76_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_76_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_76_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_76_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_77_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_77_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_77_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_77_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_77_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_7_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_7_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_7_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_7_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_7_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_8_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_8_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_8_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_8_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_8_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_9_DIRECTION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_9_DRIVE_STRENGTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_9_INPUT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_9_PULLUPDOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_9_SLEW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_TREE_PERIPHERALS.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_MIO_TREE_SIGNALS.VALUE_SRC {DEFAULT} \ -CONFIG.PSU_UIPARAM_GENERATE_SUMMARY.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__ACPU0__POWER__ON.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__ACPU1__POWER__ON.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__ACPU2__POWER__ON.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__ACPU3__POWER__ON.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__ACT_DDR_FREQ_MHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__AUX_REF_CLK__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CAN0_LOOP_CAN1__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CAN0__GRP_CLK__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CAN0__GRP_CLK__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CAN0__PERIPHERAL__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CAN0__PERIPHERAL__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CAN1__GRP_CLK__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CAN1__GRP_CLK__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__ACPU_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__ACPU_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__AFI0_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__AFI0_REF_CTRL__DIVISOR0.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__AFI0_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__AFI0_REF_CTRL__SRCSEL.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__AFI0_REF__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__AFI1_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__AFI1_REF_CTRL__DIVISOR0.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__AFI1_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__AFI1_REF_CTRL__SRCSEL.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__AFI1_REF__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__AFI2_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__AFI2_REF_CTRL__DIVISOR0.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__AFI2_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__AFI2_REF_CTRL__SRCSEL.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__AFI2_REF__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__AFI3_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__AFI3_REF_CTRL__DIVISOR0.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__AFI3_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__AFI3_REF_CTRL__SRCSEL.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__AFI3_REF__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__AFI4_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__AFI4_REF_CTRL__DIVISOR0.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__AFI4_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__AFI4_REF_CTRL__SRCSEL.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__AFI4_REF__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__AFI5_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__AFI5_REF_CTRL__DIVISOR0.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__AFI5_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__AFI5_REF_CTRL__SRCSEL.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__AFI5_REF__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__APLL_CTRL__FRACDATA.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__APLL_CTRL__FRACFREQ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__APLL_FRAC_CFG__ENABLED.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__APM_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__APM_CTRL__DIVISOR0.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__APM_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__APM_CTRL__SRCSEL.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__DBG_FPD_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__DBG_FPD_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__DBG_TRACE_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__DBG_TRACE_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__DBG_TSTMP_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__DBG_TSTMP_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__DDR_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__DDR_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__DPDMA_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__DPDMA_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__DPLL_CTRL__FRACDATA.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__DPLL_CTRL__FRACFREQ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__DPLL_FRAC_CFG__ENABLED.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__DP_AUDIO_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__DP_AUDIO_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__DP_STC_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__DP_STC_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__DP_VIDEO_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__DP_VIDEO_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__GDMA_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__GDMA_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__GPU_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__GPU_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__PCIE_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__PCIE_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__SATA_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__SATA_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__TOPSW_LSBUS_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__TOPSW_LSBUS_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__TOPSW_MAIN_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__TOPSW_MAIN_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRF_APB__VPLL_CTRL__FRACFREQ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__ADMA_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__ADMA_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__AFI6_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__AFI6_REF_CTRL__DIVISOR0.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__AFI6_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__AFI6_REF_CTRL__SRCSEL.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__AFI6__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__AMS_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__AMS_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__CAN0_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__CAN0_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__CAN1_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__CAN1_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__CPU_R5_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__CPU_R5_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__CSU_PLL_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__CSU_PLL_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__DBG_LPD_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__DBG_LPD_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__DEBUG_R5_ATCLK_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__DEBUG_R5_ATCLK_CTRL__DIVISOR0.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__DEBUG_R5_ATCLK_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__DEBUG_R5_ATCLK_CTRL__SRCSEL.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__DLL_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__DLL_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__DLL_REF_CTRL__SRCSEL.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__GEM0_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__GEM0_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__GEM1_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__GEM1_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__GEM2_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__GEM2_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__GEM3_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__GEM3_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__GEM_TSU_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__GEM_TSU_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__I2C0_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__I2C0_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__I2C1_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__I2C1_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__IOPLL_CTRL__FRACDATA.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__IOPLL_CTRL__FRACFREQ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__IOPLL_FRAC_CFG__ENABLED.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__IOU_SWITCH_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__IOU_SWITCH_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__LPD_LSBUS_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__LPD_LSBUS_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__LPD_SWITCH_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__LPD_SWITCH_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__NAND_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__NAND_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__OCM_MAIN_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__OCM_MAIN_CTRL__DIVISOR0.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__OCM_MAIN_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__OCM_MAIN_CTRL__SRCSEL.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__PCAP_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__PCAP_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__PL0_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__PL0_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__PL1_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__PL1_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__PL2_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__PL2_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__PL3_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__PL3_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__QSPI_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__QSPI_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__RPLL_CTRL__FRACDATA.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__RPLL_CTRL__FRACFREQ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__RPLL_FRAC_CFG__ENABLED.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__SDIO0_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__SDIO0_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__SDIO1_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__SDIO1_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__SPI0_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__SPI0_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__SPI1_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__SPI1_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__TIMESTAMP_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__TIMESTAMP_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__UART0_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__UART0_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__UART1_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__UART1_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__USB0_BUS_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__USB0_BUS_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__USB1_BUS_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__USB1_BUS_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__USB3_DUAL_REF_CTRL__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CRL_APB__USB3_DUAL_REF_CTRL__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_0__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_0__ERASE_BBRAM.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_0__RESPONSE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_10__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_10__ERASE_BBRAM.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_10__RESPONSE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_11__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_11__ERASE_BBRAM.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_11__RESPONSE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_12__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_12__ERASE_BBRAM.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_12__RESPONSE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_1__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_1__ERASE_BBRAM.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_1__RESPONSE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_2__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_2__ERASE_BBRAM.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_2__RESPONSE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_3__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_3__ERASE_BBRAM.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_3__RESPONSE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_4__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_4__ERASE_BBRAM.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_4__RESPONSE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_5__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_5__ERASE_BBRAM.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_5__RESPONSE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_6__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_6__ERASE_BBRAM.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_6__RESPONSE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_7__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_7__ERASE_BBRAM.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_7__RESPONSE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_8__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_8__ERASE_BBRAM.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_8__RESPONSE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_9__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_9__ERASE_BBRAM.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__CSU_TAMPER_9__RESPONSE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__PERIPHERAL__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__CSU__PERIPHERAL__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__DDRC__COMPONENTS.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__DDRC__DDR4_MAXPWR_SAVING_EN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__DDRC__DEEP_PWR_DOWN_EN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__DDRC__DERATE_INT_D.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__DDRC__DM_DBI.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__DDRC__ECC_SCRUB.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__DDRC__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__DDRC__EN_2ND_CLK.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__DDRC__HIGH_TEMP.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__DDRC__PARTNO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__DDRC__PLL_BYPASS.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__DDRC__PWR_DOWN_EN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__DDRC__SB_TARGET.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__DDRC__T_FAW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__DDRC__T_RAS_MIN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__DDRC__T_RC.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__DDRC__T_RCD.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__DDRC__T_RP.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__DDRC__VENDOR_PART.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__DDRC__VIDEO_BUFFER_SIZE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__DDR_HIGH_ADDRESS_GUI_ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__DDR__INTERFACE__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__DEVICE_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__DISPLAYPORT__LANE0__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__DISPLAYPORT__LANE0__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__DISPLAYPORT__LANE1__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__DISPLAYPORT__LANE1__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__DISPLAYPORT__PERIPHERAL__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__DPAUX__PERIPHERAL__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__DPAUX__PERIPHERAL__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__DP__LANE_SEL.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__DP__REF_CLK_FREQ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__DP__REF_CLK_SEL.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__ENET0__GRP_MDIO__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__ENET0__GRP_MDIO__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__ENET0__PERIPHERAL__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__ENET0__PERIPHERAL__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__ENET1__GRP_MDIO__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__ENET1__GRP_MDIO__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__ENET1__PERIPHERAL__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__ENET1__PERIPHERAL__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__ENET2__GRP_MDIO__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__ENET2__GRP_MDIO__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__ENET2__PERIPHERAL__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__ENET2__PERIPHERAL__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__FPD_SLCR__WDT1__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__FPD_SLCR__WDT1__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__FPD_SLCR__WDT_CLK_SEL__SELECT.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__FP__POWER__ON.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__GEM0__REF_CLK_FREQ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__GEM0__REF_CLK_SEL.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__GEM1__REF_CLK_FREQ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__GEM1__REF_CLK_SEL.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__GEM2__REF_CLK_FREQ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__GEM2__REF_CLK_SEL.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__GEM3__REF_CLK_FREQ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__GEM3__REF_CLK_SEL.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__GEM__TSU__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__GEM__TSU__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__GEN_IPI_0__MASTER.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__GEN_IPI_10__MASTER.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__GEN_IPI_1__MASTER.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__GEN_IPI_2__MASTER.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__GEN_IPI_3__MASTER.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__GEN_IPI_4__MASTER.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__GEN_IPI_5__MASTER.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__GEN_IPI_6__MASTER.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__GEN_IPI_7__MASTER.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__GEN_IPI_8__MASTER.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__GEN_IPI_9__MASTER.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__GPIO2_MIO__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__GPIO2_MIO__PERIPHERAL__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__GPIO_EMIO__PERIPHERAL__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__GPIO_EMIO__PERIPHERAL__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__GPIO_EMIO__WIDTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__GPU_PP0__POWER__ON.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__GPU_PP1__POWER__ON.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__GT_REF_CLK__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__GT__LINK_SPEED.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__I2C0_LOOP_I2C1__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__I2C0__GRP_INT__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__I2C0__GRP_INT__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__I2C1__GRP_INT__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__I2C1__GRP_INT__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__IOU_SLCR__IOU_TTC_APB_CLK__TTC0_SEL.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__IOU_SLCR__IOU_TTC_APB_CLK__TTC1_SEL.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__IOU_SLCR__IOU_TTC_APB_CLK__TTC2_SEL.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__IOU_SLCR__IOU_TTC_APB_CLK__TTC3_SEL.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__IOU_SLCR__TTC0__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__IOU_SLCR__TTC0__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__IOU_SLCR__TTC1__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__IOU_SLCR__TTC1__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__IOU_SLCR__TTC2__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__IOU_SLCR__TTC2__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__IOU_SLCR__TTC3__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__IOU_SLCR__TTC3__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__IOU_SLCR__WDT0__ACT_FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__IOU_SLCR__WDT0__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__IOU_SLCR__WDT_CLK_SEL__SELECT.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__L2_BANK0__POWER__ON.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__NAND__CHIP_ENABLE__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__NAND__CHIP_ENABLE__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__NAND__DATA_STROBE__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__NAND__DATA_STROBE__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__NAND__PERIPHERAL__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__NAND__PERIPHERAL__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__NAND__READY_BUSY__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__NAND__READY_BUSY__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__OCM_BANK0__POWER__ON.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__OCM_BANK1__POWER__ON.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__OCM_BANK2__POWER__ON.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__OCM_BANK3__POWER__ON.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__OVERRIDE__BASIC_CLOCK.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__ACS_VIOLATION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__AER_CAPABILITY.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__ATOMICOP_EGRESS_BLOCKED.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR0_64BIT.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR0_PREFETCHABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR0_SCALE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR0_SIZE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR0_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR0_VAL.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR1_64BIT.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR1_ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR1_PREFETCHABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR1_SCALE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR1_SIZE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR1_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR1_VAL.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR2_64BIT.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR2_ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR2_PREFETCHABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR2_SCALE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR2_SIZE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR2_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR2_VAL.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR3_64BIT.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR3_ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR3_PREFETCHABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR3_SCALE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR3_SIZE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR3_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR3_VAL.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR4_64BIT.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR4_ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR4_PREFETCHABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR4_SCALE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR4_SIZE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR4_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR4_VAL.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR5_64BIT.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR5_ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR5_PREFETCHABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR5_SCALE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR5_SIZE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR5_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BAR5_VAL.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BASE_CLASS_MENU.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__BRIDGE_BAR_INDICATOR.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__CAP_SLOT_IMPLEMENTED.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__CLASS_CODE_INTERFACE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__CLASS_CODE_VALUE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__COMPLETER_ABORT.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__COMPLTION_TIMEOUT.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__CORRECTABLE_INT_ERR.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__ECRC_CHECK.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__ECRC_ERR.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__ECRC_GEN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__EROM_ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__EROM_SCALE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__EROM_SIZE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__EROM_VAL.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__FLOW_CONTROL_ERR.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__FLOW_CONTROL_PROTOCOL_ERR.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__HEADER_LOG_OVERFLOW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__INTERFACE_WIDTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__INTX_GENERATION.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__INTX_PIN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__LANE2__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__LANE2__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__LANE3__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__LANE3__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__LEGACY_INTERRUPT.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__MAX_PAYLOAD_SIZE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__MC_BLOCKED_TLP.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__MSIX_CAPABILITY.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__MSIX_PBA_OFFSET.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__MSIX_TABLE_OFFSET.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__MSIX_TABLE_SIZE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__MSI_64BIT_ADDR_CAPABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__MSI_CAPABILITY.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__MSI_MULTIPLE_MSG_CAPABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__MULTIHEADER.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__PERIPHERAL__ENDPOINT_ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__PERIPHERAL__ENDPOINT_IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__PERIPHERAL__ROOTPORT_ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__PERM_ROOT_ERR_UPDATE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__RECEIVER_ERR.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__RECEIVER_OVERFLOW.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__REVISION_ID.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__SUBSYSTEM_ID.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__SUBSYSTEM_VENDOR_ID.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__SUB_CLASS_INTERFACE_MENU.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__SURPRISE_DOWN.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__TLP_PREFIX_BLOCKED.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__UNCORRECTABL_INT_ERR.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__USE_CLASS_CODE_LOOKUP_ASSISTANT.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PCIE__VENDOR_ID.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PJTAG__PERIPHERAL__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PJTAG__PERIPHERAL__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PL_CLK0_BUF.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PL_CLK1_BUF.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PL_CLK2_BUF.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PL_CLK3_BUF.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PL__POWER__ON.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PMU__EMIO_GPI__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PMU__EMIO_GPO__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PMU__PERIPHERAL__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PROTECTION__DEBUG.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PROTECTION__MASTERS.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PROTECTION__SLAVES.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PSS_ALT_REF_CLK__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PSS_ALT_REF_CLK__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__PSS_ALT_REF_CLK__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__RPU__POWER__ON.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SATA__LANE0__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SATA__LANE0__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SD0__DATA_TRANSFER_MODE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SD0__GRP_CD__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SD0__GRP_CD__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SD0__GRP_POW__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SD0__GRP_POW__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SD0__GRP_WP__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SD0__GRP_WP__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SD0__PERIPHERAL__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SD0__PERIPHERAL__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SD0__RESET__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SD0__SLOT_TYPE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SD1__RESET__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SPI0_LOOP_SPI1__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SPI0__GRP_SS0__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SPI0__GRP_SS0__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SPI0__GRP_SS1__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SPI0__GRP_SS1__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SPI0__GRP_SS2__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SPI0__GRP_SS2__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SPI0__PERIPHERAL__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SPI0__PERIPHERAL__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SPI1__GRP_SS0__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SPI1__GRP_SS0__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SPI1__GRP_SS1__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SPI1__GRP_SS1__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SPI1__GRP_SS2__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SPI1__GRP_SS2__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SPI1__PERIPHERAL__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SPI1__PERIPHERAL__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SWDT0__CLOCK__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SWDT0__CLOCK__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SWDT0__RESET__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SWDT0__RESET__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SWDT1__CLOCK__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SWDT1__CLOCK__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SWDT1__RESET__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__SWDT1__RESET__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__TCM0A__POWER__ON.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__TCM0B__POWER__ON.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__TCM1A__POWER__ON.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__TCM1B__POWER__ON.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__TESTSCAN__PERIPHERAL__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__TRACE__PERIPHERAL__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__TRACE__PERIPHERAL__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__TRACE__WIDTH.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__TTC0__CLOCK__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__TTC0__CLOCK__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__TTC0__WAVEOUT__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__TTC0__WAVEOUT__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__TTC1__CLOCK__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__TTC1__CLOCK__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__TTC1__WAVEOUT__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__TTC1__WAVEOUT__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__TTC2__CLOCK__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__TTC2__CLOCK__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__TTC2__WAVEOUT__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__TTC2__WAVEOUT__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__TTC3__CLOCK__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__TTC3__CLOCK__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__TTC3__WAVEOUT__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__TTC3__WAVEOUT__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__UART0_LOOP_UART1__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__UART0__BAUD_RATE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__UART0__MODEM__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__UART1__BAUD_RATE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__UART1__MODEM__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__USB1__PERIPHERAL__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__USB1__PERIPHERAL__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__USB1__REF_CLK_FREQ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__USB1__REF_CLK_SEL.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__USB2_0__EMIO__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__USB2_1__EMIO__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__USB3_0__EMIO__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__USB3_1__EMIO__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__USB3_1__PERIPHERAL__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__USB3_1__PERIPHERAL__IO.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__USE__FABRIC__RST.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__VIDEO_REF_CLK__ENABLE.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__VIDEO_REF_CLK__FREQMHZ.VALUE_SRC {DEFAULT} \ -CONFIG.PSU__VIDEO_REF_CLK__IO.VALUE_SRC {DEFAULT} \ - ] $zynq_ultra_ps_e_0 - - # Create instance: zynq_ultra_ps_e_0_axi_periph, and set properties - set zynq_ultra_ps_e_0_axi_periph [ create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 zynq_ultra_ps_e_0_axi_periph ] - set_property -dict [ list \ -CONFIG.NUM_MI {1} \ - ] $zynq_ultra_ps_e_0_axi_periph - - # Create interface connections - connect_bd_intf_net -intf_net axi_mem_intercon_M00_AXI [get_bd_intf_pins axi_mem_intercon/M00_AXI] [get_bd_intf_pins zynq_ultra_ps_e_0/S_AXI_HP1_FPD] - connect_bd_intf_net -intf_net zcu102_base_0_m_axi [get_bd_intf_pins axi_mem_intercon/S00_AXI] [get_bd_intf_pins zcu102_base_0/m_axi] - connect_bd_intf_net -intf_net zynq_ultra_ps_e_0_M_AXI_HPM1_FPD [get_bd_intf_pins zynq_ultra_ps_e_0/M_AXI_HPM1_FPD] [get_bd_intf_pins zynq_ultra_ps_e_0_axi_periph/S00_AXI] - connect_bd_intf_net -intf_net zynq_ultra_ps_e_0_axi_periph_M00_AXI [get_bd_intf_pins zcu102_base_0/s_axi] [get_bd_intf_pins zynq_ultra_ps_e_0_axi_periph/M00_AXI] - - # Create port connections - connect_bd_net -net Net [get_bd_ports gpio_n] [get_bd_pins zcu102_base_0/gpio_n] - connect_bd_net -net Net1 [get_bd_ports gpio_p] [get_bd_pins zcu102_base_0/gpio_p] - connect_bd_net -net Net2 [get_bd_ports i2c_scl] [get_bd_pins zcu102_base_0/i2c_scl] - connect_bd_net -net Net3 [get_bd_ports i2c_sda] [get_bd_pins zcu102_base_0/i2c_sda] - connect_bd_net -net proc_sys_reset_0_interconnect_aresetn [get_bd_pins axi_mem_intercon/ARESETN] [get_bd_pins proc_sys_reset_0/interconnect_aresetn] [get_bd_pins zynq_ultra_ps_e_0_axi_periph/ARESETN] - connect_bd_net -net proc_sys_reset_0_peripheral_aresetn [get_bd_pins axi_mem_intercon/M00_ARESETN] [get_bd_pins axi_mem_intercon/S00_ARESETN] [get_bd_pins proc_sys_reset_0/peripheral_aresetn] [get_bd_pins zcu102_base_0/m_axi_aresetn] [get_bd_pins zcu102_base_0/s_axi_aresetn] [get_bd_pins zcu102_base_0/sys_nreset] [get_bd_pins zynq_ultra_ps_e_0_axi_periph/M00_ARESETN] [get_bd_pins zynq_ultra_ps_e_0_axi_periph/S00_ARESETN] - connect_bd_net -net rxi_data_n_1 [get_bd_ports rxi_data_n] [get_bd_pins zcu102_base_0/rxi_data_n] - connect_bd_net -net rxi_data_p_1 [get_bd_ports rxi_data_p] [get_bd_pins zcu102_base_0/rxi_data_p] - connect_bd_net -net rxi_frame_n_1 [get_bd_ports rxi_frame_n] [get_bd_pins zcu102_base_0/rxi_frame_n] - connect_bd_net -net rxi_frame_p_1 [get_bd_ports rxi_frame_p] [get_bd_pins zcu102_base_0/rxi_frame_p] - connect_bd_net -net rxi_lclk_n_1 [get_bd_ports rxi_lclk_n] [get_bd_pins zcu102_base_0/rxi_lclk_n] - connect_bd_net -net rxi_lclk_p_1 [get_bd_ports rxi_lclk_p] [get_bd_pins zcu102_base_0/rxi_lclk_p] - connect_bd_net -net sys_concat_intc_dout [get_bd_pins sys_concat_intc/dout] [get_bd_pins zynq_ultra_ps_e_0/pl_ps_irq1] - connect_bd_net -net txi_rd_wait_n_1 [get_bd_ports txi_rd_wait_n] [get_bd_pins zcu102_base_0/txi_rd_wait_n] - connect_bd_net -net txi_rd_wait_p_1 [get_bd_ports txi_rd_wait_p] [get_bd_pins zcu102_base_0/txi_rd_wait_p] - connect_bd_net -net txi_wr_wait_n_1 [get_bd_ports txi_wr_wait_n] [get_bd_pins zcu102_base_0/txi_wr_wait_n] - connect_bd_net -net txi_wr_wait_p_1 [get_bd_ports txi_wr_wait_p] [get_bd_pins zcu102_base_0/txi_wr_wait_p] - connect_bd_net -net zcu102_base_0_cclk0_n [get_bd_ports cclk0_n] [get_bd_pins zcu102_base_0/cclk_n] - connect_bd_net -net zcu102_base_0_cclk0_p [get_bd_ports cclk0_p] [get_bd_pins zcu102_base_0/cclk_p] - connect_bd_net -net zcu102_base_0_chip_resetb [get_bd_ports chip_nreset] [get_bd_ports clkpd_1p8v] [get_bd_pins zcu102_base_0/chip_nreset] - connect_bd_net -net zcu102_base_0_constant_zero [get_bd_pins sys_concat_intc/In0] [get_bd_pins sys_concat_intc/In1] [get_bd_pins sys_concat_intc/In2] [get_bd_pins sys_concat_intc/In4] [get_bd_pins sys_concat_intc/In5] [get_bd_pins sys_concat_intc/In6] [get_bd_pins sys_concat_intc/In7] [get_bd_pins zcu102_base_0/constant_zero] - connect_bd_net -net zcu102_base_0_i2c_scl_i [get_bd_pins zcu102_base_0/i2c_scl_i] - connect_bd_net -net zcu102_base_0_i2c_sda_i [get_bd_pins zcu102_base_0/i2c_sda_i] - connect_bd_net -net zcu102_base_0_mailbox_irq [get_bd_pins sys_concat_intc/In3] [get_bd_pins zcu102_base_0/mailbox_irq] - connect_bd_net -net zcu102_base_0_ps_gpio_i [get_bd_pins zcu102_base_0/ps_gpio_i] - connect_bd_net -net zcu102_base_0_rxo_rd_wait_n [get_bd_ports rxo_rd_wait_n] [get_bd_pins zcu102_base_0/rxo_rd_wait_n] - connect_bd_net -net zcu102_base_0_rxo_rd_wait_p [get_bd_ports rxo_rd_wait_p] [get_bd_pins zcu102_base_0/rxo_rd_wait_p] - connect_bd_net -net zcu102_base_0_rxo_wr_wait_n [get_bd_ports rxo_wr_wait_n] [get_bd_pins zcu102_base_0/rxo_wr_wait_n] - connect_bd_net -net zcu102_base_0_rxo_wr_wait_p [get_bd_ports rxo_wr_wait_p] [get_bd_pins zcu102_base_0/rxo_wr_wait_p] - connect_bd_net -net zcu102_base_0_txo_data_n [get_bd_ports txo_data_n] [get_bd_pins zcu102_base_0/txo_data_n] - connect_bd_net -net zcu102_base_0_txo_data_p [get_bd_ports txo_data_p] [get_bd_pins zcu102_base_0/txo_data_p] - connect_bd_net -net zcu102_base_0_txo_frame_n [get_bd_ports txo_frame_n] [get_bd_pins zcu102_base_0/txo_frame_n] - connect_bd_net -net zcu102_base_0_txo_frame_p [get_bd_ports txo_frame_p] [get_bd_pins zcu102_base_0/txo_frame_p] - connect_bd_net -net zcu102_base_0_txo_lclk_n [get_bd_ports txo_lclk_n] [get_bd_pins zcu102_base_0/txo_lclk_n] - connect_bd_net -net zcu102_base_0_txo_lclk_p [get_bd_ports txo_lclk_p] [get_bd_pins zcu102_base_0/txo_lclk_p] - connect_bd_net -net zynq_ultra_ps_e_0_GPIO_O [get_bd_pins zcu102_base_0/ps_gpio_o] - connect_bd_net -net zynq_ultra_ps_e_0_GPIO_T [get_bd_pins zcu102_base_0/ps_gpio_t] - connect_bd_net -net zynq_ultra_ps_e_0_I2C0_SCL_O [get_bd_pins zcu102_base_0/i2c_scl_o] - connect_bd_net -net zynq_ultra_ps_e_0_I2C0_SCL_T [get_bd_pins zcu102_base_0/i2c_scl_t] - connect_bd_net -net zynq_ultra_ps_e_0_I2C0_SDA_O [get_bd_pins zcu102_base_0/i2c_sda_o] - connect_bd_net -net zynq_ultra_ps_e_0_I2C0_SDA_T [get_bd_pins zcu102_base_0/i2c_sda_t] - connect_bd_net -net zynq_ultra_ps_e_0_pl_clk0 [get_bd_pins axi_mem_intercon/ACLK] [get_bd_pins axi_mem_intercon/M00_ACLK] [get_bd_pins axi_mem_intercon/S00_ACLK] [get_bd_pins proc_sys_reset_0/slowest_sync_clk] [get_bd_pins zcu102_base_0/sys_clk] [get_bd_pins zynq_ultra_ps_e_0/maxihpm1_fpd_aclk] [get_bd_pins zynq_ultra_ps_e_0/pl_clk0] [get_bd_pins zynq_ultra_ps_e_0/saxihp1_fpd_aclk] [get_bd_pins zynq_ultra_ps_e_0_axi_periph/ACLK] [get_bd_pins zynq_ultra_ps_e_0_axi_periph/M00_ACLK] [get_bd_pins zynq_ultra_ps_e_0_axi_periph/S00_ACLK] - connect_bd_net -net zynq_ultra_ps_e_0_pl_resetn0 [get_bd_pins proc_sys_reset_0/ext_reset_in] [get_bd_pins zynq_ultra_ps_e_0/pl_resetn0] - - # Create address segments - create_bd_addr_seg -range 0x80000000 -offset 0x00000000 [get_bd_addr_spaces zcu102_base_0/m_axi] [get_bd_addr_segs zynq_ultra_ps_e_0/SAXIGP3/HP1_DDR_LOW] SEG_zynq_ultra_ps_e_0_HP1_DDR_LOW - create_bd_addr_seg -range 0x000100000000 -offset 0x000500000000 [get_bd_addr_spaces zynq_ultra_ps_e_0/Data] [get_bd_addr_segs zcu102_base_0/s_axi/axi_lite] SEG_zcu102_base_0_axi_lite - - - # Restore current instance - current_bd_instance $oldCurInst - - save_bd_design -} -# End of create_root_design() - - -################################################################## -# MAIN FLOW -################################################################## - -create_root_design "" - - diff --git a/src/zcu102/fpga/zcu102/system_params.tcl b/src/zcu102/fpga/zcu102/system_params.tcl deleted file mode 100644 index ff5d917..0000000 --- a/src/zcu102/fpga/zcu102/system_params.tcl +++ /dev/null @@ -1,31 +0,0 @@ -#Design name ("system" recommended) -set design system - -#Project directory ("." recommended) -set projdir ./ - -#Device name -#set partname "xczu9eg-ffvb1156-2L-e-es1" -#set partname "xczu9eg-ffvb1156-2L-e-es2" -#set partname "xczu9eg-ffvb1156-2-i-es2" -set partname "xczu9eg-ffvb1156-1-i-es2" -#set board_part "xilinx.com:zcu102:part0:2.0" - -#Paths to all IP blocks to use in Vivado "system.bd" - -set ip_repos [list "../zcu102_base"] - -#All source files -set hdl_files [] - -#All constraints files -set constraints_files [list \ - ../zcu102_timing.xdc \ - ../zcu102_fmc0_io.xdc \ - ] - -########################################################### -# PREPARE FOR SYNTHESIS -########################################################### -set oh_verilog_define "CFG_ASIC=0" -set oh_synthesis_options "-verilog_define ${oh_verilog_define}" diff --git a/src/zcu102/fpga/zcu102_base/Makefile b/src/zcu102/fpga/zcu102_base/Makefile deleted file mode 100644 index 98af4bd..0000000 --- a/src/zcu102/fpga/zcu102_base/Makefile +++ /dev/null @@ -1,26 +0,0 @@ -M_DEPS := run.tcl Makefile system_params.tcl - -M_VIVADO := vivado -mode batch -source - -M_FLIST := *.cache -M_FLIST += *.data -M_FLIST += *.xpr -M_FLIST += *.log -M_FLIST += *.jou -M_FLIST += xgui -M_FLIST += *.runs -M_FLIST += *.srcs -M_FLIST += *.sdk -M_FLIST += .Xil -M_FLIST += src -M_FLIST += vivado.log -M_FLIST += vivado.jou -M_FLIST += xgui -M_FLIST += *.cache -M_FLIST += component.xml - -all: $(M_DEPS) - $(M_VIVADO) run.tcl - -clean: - rm -rf $(M_FLIST) diff --git a/src/zcu102/fpga/zcu102_base/build.sh b/src/zcu102/fpga/zcu102_base/build.sh deleted file mode 100755 index 52f66c9..0000000 --- a/src/zcu102/fpga/zcu102_base/build.sh +++ /dev/null @@ -1,2 +0,0 @@ -#!/bin/bash -make all diff --git a/src/zcu102/fpga/zcu102_base/run.tcl b/src/zcu102/fpga/zcu102_base/run.tcl deleted file mode 100644 index 4326ec6..0000000 --- a/src/zcu102/fpga/zcu102_base/run.tcl +++ /dev/null @@ -1,4 +0,0 @@ - -#STEP1: DEFINE KEY PARAMETERS -source ./system_params.tcl -source ../../../common/fpga/create_ip.tcl diff --git a/src/zcu102/fpga/zcu102_base/system_params.tcl b/src/zcu102/fpga/zcu102_base/system_params.tcl deleted file mode 100644 index ebbf702..0000000 --- a/src/zcu102/fpga/zcu102_base/system_params.tcl +++ /dev/null @@ -1,30 +0,0 @@ -# NOTE: See UG1118 for more information - -######################################### -# VARIABLES -######################################### -set design zcu102_base -set projdir ./ -set root "../../.." -#set partname "xczu9eg-ffvb1156-2L-e-es1" -#set partname "xczu9eg-ffvb1156-2L-e-es2" -set partname "xczu9eg-ffvb1156-2-i-es2" - - -set hdl_files [list \ - $root/zcu102/hdl \ - $root/common/hdl/ \ - $root/emesh/hdl \ - $root/emmu/hdl \ - $root/axi/hdl \ - $root/emailbox/hdl \ - $root/edma/hdl \ - $root/elink/hdl \ - ] - -set ip_files [list \ - $root/xilibs/ip/fifo_async_104x32.xci \ - ] - -set constraints_files [] - diff --git a/src/zcu102/fpga/zcu102_fmc0_io.xdc b/src/zcu102/fpga/zcu102_fmc0_io.xdc deleted file mode 100644 index b65845f..0000000 --- a/src/zcu102/fpga/zcu102_fmc0_io.xdc +++ /dev/null @@ -1,89 +0,0 @@ -####################### -# Configuration Pins -####################### -#set_property CFGBVS VCCO [current_design] -#set_property CONFIG_VOLTAGE 3.3 [current_design] - -##################### -# Epiphany Reset -# Schematic RESETB -##################### -set_property IOSTANDARD LVCMOS18 [get_ports {chip_nreset}] -set_property PACKAGE_PIN AC7 [get_ports {chip_nreset}] - -########################## -# AD9523 clock power down -# (active low) -# Schematic CLKPD_1P8V -########################## -set_property IOSTANDARD LVCMOS18 [get_ports {clkpd_1p8v}] -set_property PACKAGE_PIN AC6 [get_ports {clkpd_1p8v}] - -##################### -# Epiphany Clocks (Tile 0-7) -# Schematic CLKIN_[PN]01 -# Connected to clock distributor chip. -# Assume pass through will work. -##################### -set_property IOSTANDARD LVDS [get_ports {cclk*}] -# (Tile 0-7) -set_property PACKAGE_PIN W6 [get_ports cclk0_n] -set_property PACKAGE_PIN W7 [get_ports cclk0_p] -# (Tile 8-15) -#set_property PACKAGE_PIN AA12 [get_ports cclk1_n] -#set_property PACKAGE_PIN Y12 [get_ports cclk1_p] - -######################### -# FPGA Elink TX (chip RX) -######################### -set_property IOSTANDARD LVDS [get_ports {txo*}] -set_property IOSTANDARD LVDS [get_ports {txi*}] -set_property PACKAGE_PIN N11 [get_ports txo_lclk_n] -set_property PACKAGE_PIN N8 [get_ports {txo_data_n[0]}] -set_property PACKAGE_PIN K13 [get_ports {txo_data_n[1]}] -set_property PACKAGE_PIN M13 [get_ports {txo_data_n[2]}] -set_property PACKAGE_PIN N12 [get_ports {txo_data_n[3]}] -set_property PACKAGE_PIN M14 [get_ports {txo_data_n[4]}] -set_property PACKAGE_PIN K16 [get_ports {txo_data_n[5]}] -set_property PACKAGE_PIN K12 [get_ports {txo_data_n[6]}] -set_property PACKAGE_PIN L11 [get_ports {txo_data_n[7]}] -set_property PACKAGE_PIN K15 [get_ports txo_frame_n] -set_property PACKAGE_PIN T6 [get_ports txi_wr_wait_n] - -##################### -# Wait signals -##################### -# ??? Parallella board has LVCMOS25 and a DIFF LINE RECEIVER -set_property IOSTANDARD LVDS [get_ports {txi_rd_wait_*}] -set_property PACKAGE_PIN L10 [get_ports txi_rd_wait_n] - - -######################### -# FPGA ELink RX (chip TX) -######################### -set_property IOSTANDARD LVDS [get_ports {rx*}] -set_property PACKAGE_PIN Y3 [get_ports rxi_lclk_n] -set_property PACKAGE_PIN AC4 [get_ports {rxi_data_n[0]}] -set_property PACKAGE_PIN V1 [get_ports {rxi_data_n[1]}] -set_property PACKAGE_PIN Y1 [get_ports {rxi_data_n[2]}] -set_property PACKAGE_PIN AA1 [get_ports {rxi_data_n[3]}] -set_property PACKAGE_PIN AC3 [get_ports {rxi_data_n[4]}] -set_property PACKAGE_PIN AC1 [get_ports {rxi_data_n[5]}] -set_property PACKAGE_PIN U4 [get_ports {rxi_data_n[6]}] -set_property PACKAGE_PIN V3 [get_ports {rxi_data_n[7]}] -set_property PACKAGE_PIN W1 [get_ports rxi_frame_n] -set_property PACKAGE_PIN W4 [get_ports rxo_rd_wait_n] -set_property PACKAGE_PIN AB5 [get_ports rxo_wr_wait_n] - -################### -# Pin Constraints # -################### -# -# Video Clock SI570 -# -# PL Port Pin Schematic -# -# si570_clk_n L28 USER_MGT_SI570_N -# si570_clk_p L27 USER_MGT_SI570_P -# -set_property PACKAGE_PIN L28 [get_ports si570_clk_n] diff --git a/src/zcu102/fpga/zcu102_timing.xdc b/src/zcu102/fpga/zcu102_timing.xdc deleted file mode 100644 index 1ce6ed1..0000000 --- a/src/zcu102/fpga/zcu102_timing.xdc +++ /dev/null @@ -1,6 +0,0 @@ -create_clock -period 3.33333333 -name rxi_lclk_p -waveform {0.000 1.66666667} [get_ports rxi_lclk_p] - -# Differential input clock from SI570 clock synthesizer -# Constrained to 297MHz (2160p30 video resolution) -create_clock -period 3.367 -name si570_clk [get_ports si570_clk_p] - diff --git a/src/zcu102/hdl/zcu102_base.v b/src/zcu102/hdl/zcu102_base.v deleted file mode 100644 index 4015eae..0000000 --- a/src/zcu102/hdl/zcu102_base.v +++ /dev/null @@ -1,311 +0,0 @@ -module zcu102_base(/*AUTOARG*/ - // Outputs - s_axi_wready, s_axi_rvalid, s_axi_rresp, s_axi_rlast, s_axi_rid, - s_axi_rdata, s_axi_bvalid, s_axi_bresp, s_axi_bid, s_axi_awready, - s_axi_arready, m_axi_wvalid, m_axi_wstrb, m_axi_wlast, m_axi_wid, - m_axi_wdata, m_axi_rready, m_axi_bready, m_axi_awvalid, - m_axi_awsize, m_axi_awqos, m_axi_awprot, m_axi_awlock, m_axi_awlen, - m_axi_awid, m_axi_awcache, m_axi_awburst, m_axi_awaddr, - m_axi_arvalid, m_axi_arsize, m_axi_arqos, m_axi_arprot, - m_axi_arlock, m_axi_arlen, m_axi_arid, m_axi_arcache, - m_axi_arburst, m_axi_araddr, cclk_n, cclk_p, chip_nreset, chipid, - elink_active, mailbox_irq, i2c_scl_i, i2c_sda_i, ps_gpio_i, - txo_data_n, txo_data_p, txo_frame_n, txo_frame_p, txo_lclk_n, - txo_lclk_p, rxo_rd_wait_n, rxo_rd_wait_p, rxo_wr_wait_n, - rxo_wr_wait_p, constant_zero, constant_one, - // Inouts - i2c_scl, i2c_sda, gpio_n, gpio_p, - // Inputs - s_axi_wvalid, s_axi_wstrb, s_axi_wlast, s_axi_wid, s_axi_wdata, - s_axi_rready, s_axi_bready, s_axi_awvalid, s_axi_awsize, - s_axi_awqos, s_axi_awprot, s_axi_awlock, s_axi_awlen, s_axi_awid, - s_axi_awcache, s_axi_awburst, s_axi_awaddr, s_axi_arvalid, - s_axi_arsize, s_axi_arqos, s_axi_arprot, s_axi_arlock, s_axi_arlen, - s_axi_arid, s_axi_aresetn, s_axi_arcache, s_axi_arburst, - s_axi_araddr, m_axi_wready, m_axi_rvalid, m_axi_rresp, m_axi_rlast, - m_axi_rid, m_axi_rdata, m_axi_bvalid, m_axi_bresp, m_axi_bid, - m_axi_awready, m_axi_arready, m_axi_aresetn, sys_clk, sys_nreset, - i2c_scl_o, i2c_scl_t, i2c_sda_o, i2c_sda_t, ps_gpio_o, ps_gpio_t, - txi_rd_wait_n, txi_rd_wait_p, txi_wr_wait_n, txi_wr_wait_p, - rxi_data_n, rxi_data_p, rxi_frame_n, rxi_frame_p, rxi_lclk_n, - rxi_lclk_p - ); - - parameter AW = 32; - parameter DW = 32; - parameter PW = 104; //packet width - parameter ID = 12'h810; - parameter S_IDW = 12; //ID width for S_AXI - parameter M_IDW = 6; //ID width for M_AXI - parameter IOSTD_ELINK = "LVDS"; - parameter NGPIO = 24; - parameter NPS = 64; //Number of PS signals - - //RESET+CLK - input sys_clk; - input sys_nreset; - - //MISC - output cclk_n; - output cclk_p; - output chip_nreset; - output [11:0] chipid; - output elink_active; - output mailbox_irq; - - //I2C - output i2c_scl_i; - output i2c_sda_i; - input i2c_scl_o; - input i2c_scl_t; - input i2c_sda_o; - input i2c_sda_t; - inout i2c_scl; - inout i2c_sda; - - //GPIO - input [NPS-1:0] ps_gpio_o; - input [NPS-1:0] ps_gpio_t; - output [NPS-1:0] ps_gpio_i; - inout [NGPIO-1:0] gpio_n; - inout [NGPIO-1:0] gpio_p; - - //TX - output [7:0] txo_data_n; - output [7:0] txo_data_p; - output txo_frame_n; - output txo_frame_p; - output txo_lclk_n; - output txo_lclk_p; - input txi_rd_wait_n; - input txi_rd_wait_p; - input txi_wr_wait_n; - input txi_wr_wait_p; - - //RX - input [7:0] rxi_data_n; - input [7:0] rxi_data_p; - input rxi_frame_n; - input rxi_frame_p; - input rxi_lclk_n; - input rxi_lclk_p; - output rxo_rd_wait_n; - output rxo_rd_wait_p; - output rxo_wr_wait_n; - output rxo_wr_wait_p; - output constant_zero; - output constant_one; - - /*AUTOINOUT*/ - /*AUTOOUTPUT*/ - // Beginning of automatic outputs (from unused autoinst outputs) - output [31:0] m_axi_araddr; // From axi_elink of axi_elink.v - output [1:0] m_axi_arburst; // From axi_elink of axi_elink.v - output [3:0] m_axi_arcache; // From axi_elink of axi_elink.v - output [M_IDW-1:0] m_axi_arid; // From axi_elink of axi_elink.v - output [7:0] m_axi_arlen; // From axi_elink of axi_elink.v - output m_axi_arlock; // From axi_elink of axi_elink.v - output [2:0] m_axi_arprot; // From axi_elink of axi_elink.v - output [3:0] m_axi_arqos; // From axi_elink of axi_elink.v - output [2:0] m_axi_arsize; // From axi_elink of axi_elink.v - output m_axi_arvalid; // From axi_elink of axi_elink.v - output [31:0] m_axi_awaddr; // From axi_elink of axi_elink.v - output [1:0] m_axi_awburst; // From axi_elink of axi_elink.v - output [3:0] m_axi_awcache; // From axi_elink of axi_elink.v - output [M_IDW-1:0] m_axi_awid; // From axi_elink of axi_elink.v - output [7:0] m_axi_awlen; // From axi_elink of axi_elink.v - output m_axi_awlock; // From axi_elink of axi_elink.v - output [2:0] m_axi_awprot; // From axi_elink of axi_elink.v - output [3:0] m_axi_awqos; // From axi_elink of axi_elink.v - output [2:0] m_axi_awsize; // From axi_elink of axi_elink.v - output m_axi_awvalid; // From axi_elink of axi_elink.v - output m_axi_bready; // From axi_elink of axi_elink.v - output m_axi_rready; // From axi_elink of axi_elink.v - output [63:0] m_axi_wdata; // From axi_elink of axi_elink.v - output [M_IDW-1:0] m_axi_wid; // From axi_elink of axi_elink.v - output m_axi_wlast; // From axi_elink of axi_elink.v - output [7:0] m_axi_wstrb; // From axi_elink of axi_elink.v - output m_axi_wvalid; // From axi_elink of axi_elink.v - output s_axi_arready; // From axi_elink of axi_elink.v - output s_axi_awready; // From axi_elink of axi_elink.v - output [S_IDW-1:0] s_axi_bid; // From axi_elink of axi_elink.v - output [1:0] s_axi_bresp; // From axi_elink of axi_elink.v - output s_axi_bvalid; // From axi_elink of axi_elink.v - output [31:0] s_axi_rdata; // From axi_elink of axi_elink.v - output [S_IDW-1:0] s_axi_rid; // From axi_elink of axi_elink.v - output s_axi_rlast; // From axi_elink of axi_elink.v - output [1:0] s_axi_rresp; // From axi_elink of axi_elink.v - output s_axi_rvalid; // From axi_elink of axi_elink.v - output s_axi_wready; // From axi_elink of axi_elink.v - // End of automatics - /*AUTOINPUT*/ - // Beginning of automatic inputs (from unused autoinst inputs) - input m_axi_aresetn; // To axi_elink of axi_elink.v - input m_axi_arready; // To axi_elink of axi_elink.v - input m_axi_awready; // To axi_elink of axi_elink.v - input [M_IDW-1:0] m_axi_bid; // To axi_elink of axi_elink.v - input [1:0] m_axi_bresp; // To axi_elink of axi_elink.v - input m_axi_bvalid; // To axi_elink of axi_elink.v - input [63:0] m_axi_rdata; // To axi_elink of axi_elink.v - input [M_IDW-1:0] m_axi_rid; // To axi_elink of axi_elink.v - input m_axi_rlast; // To axi_elink of axi_elink.v - input [1:0] m_axi_rresp; // To axi_elink of axi_elink.v - input m_axi_rvalid; // To axi_elink of axi_elink.v - input m_axi_wready; // To axi_elink of axi_elink.v - input [31:0] s_axi_araddr; // To axi_elink of axi_elink.v - input [1:0] s_axi_arburst; // To axi_elink of axi_elink.v - input [3:0] s_axi_arcache; // To axi_elink of axi_elink.v - input s_axi_aresetn; // To axi_elink of axi_elink.v - input [S_IDW-1:0] s_axi_arid; // To axi_elink of axi_elink.v - input [7:0] s_axi_arlen; // To axi_elink of axi_elink.v - input s_axi_arlock; // To axi_elink of axi_elink.v - input [2:0] s_axi_arprot; // To axi_elink of axi_elink.v - input [3:0] s_axi_arqos; // To axi_elink of axi_elink.v - input [2:0] s_axi_arsize; // To axi_elink of axi_elink.v - input s_axi_arvalid; // To axi_elink of axi_elink.v - input [31:0] s_axi_awaddr; // To axi_elink of axi_elink.v - input [1:0] s_axi_awburst; // To axi_elink of axi_elink.v - input [3:0] s_axi_awcache; // To axi_elink of axi_elink.v - input [S_IDW-1:0] s_axi_awid; // To axi_elink of axi_elink.v - input [7:0] s_axi_awlen; // To axi_elink of axi_elink.v - input s_axi_awlock; // To axi_elink of axi_elink.v - input [2:0] s_axi_awprot; // To axi_elink of axi_elink.v - input [3:0] s_axi_awqos; // To axi_elink of axi_elink.v - input [2:0] s_axi_awsize; // To axi_elink of axi_elink.v - input s_axi_awvalid; // To axi_elink of axi_elink.v - input s_axi_bready; // To axi_elink of axi_elink.v - input s_axi_rready; // To axi_elink of axi_elink.v - input [31:0] s_axi_wdata; // To axi_elink of axi_elink.v - input [S_IDW-1:0] s_axi_wid; // To axi_elink of axi_elink.v - input s_axi_wlast; // To axi_elink of axi_elink.v - input [3:0] s_axi_wstrb; // To axi_elink of axi_elink.v - input s_axi_wvalid; // To axi_elink of axi_elink.v - // End of automatics - /*AUTOWIRE*/ - - assign constant_zero = 1'b0; - assign constant_one = 1'b1; - - - /*axi_elink AUTO_TEMPLATE ( - .m_axi_\(.*\) (m_axi_\1[]), - .s_axi_\(.*\) (s_axi_\1[]), - ); - */ - defparam axi_elink.ID=ID; - axi_elink axi_elink ( - /*AUTOINST*/ - // Outputs - .elink_active (elink_active), - .rxo_wr_wait_p (rxo_wr_wait_p), - .rxo_wr_wait_n (rxo_wr_wait_n), - .rxo_rd_wait_p (rxo_rd_wait_p), - .rxo_rd_wait_n (rxo_rd_wait_n), - .txo_lclk_p (txo_lclk_p), - .txo_lclk_n (txo_lclk_n), - .txo_frame_p (txo_frame_p), - .txo_frame_n (txo_frame_n), - .txo_data_p (txo_data_p[7:0]), - .txo_data_n (txo_data_n[7:0]), - .chipid (chipid[11:0]), - .chip_nreset (chip_nreset), - .cclk_p (cclk_p), - .cclk_n (cclk_n), - .mailbox_irq (mailbox_irq), - .m_axi_awid (m_axi_awid[M_IDW-1:0]), // Templated - .m_axi_awaddr (m_axi_awaddr[31:0]), // Templated - .m_axi_awlen (m_axi_awlen[7:0]), // Templated - .m_axi_awsize (m_axi_awsize[2:0]), // Templated - .m_axi_awburst (m_axi_awburst[1:0]), // Templated - .m_axi_awlock (m_axi_awlock), // Templated - .m_axi_awcache (m_axi_awcache[3:0]), // Templated - .m_axi_awprot (m_axi_awprot[2:0]), // Templated - .m_axi_awqos (m_axi_awqos[3:0]), // Templated - .m_axi_awvalid (m_axi_awvalid), // Templated - .m_axi_wid (m_axi_wid[M_IDW-1:0]), // Templated - .m_axi_wdata (m_axi_wdata[63:0]), // Templated - .m_axi_wstrb (m_axi_wstrb[7:0]), // Templated - .m_axi_wlast (m_axi_wlast), // Templated - .m_axi_wvalid (m_axi_wvalid), // Templated - .m_axi_bready (m_axi_bready), // Templated - .m_axi_arid (m_axi_arid[M_IDW-1:0]), // Templated - .m_axi_araddr (m_axi_araddr[31:0]), // Templated - .m_axi_arlen (m_axi_arlen[7:0]), // Templated - .m_axi_arsize (m_axi_arsize[2:0]), // Templated - .m_axi_arburst (m_axi_arburst[1:0]), // Templated - .m_axi_arlock (m_axi_arlock), // Templated - .m_axi_arcache (m_axi_arcache[3:0]), // Templated - .m_axi_arprot (m_axi_arprot[2:0]), // Templated - .m_axi_arqos (m_axi_arqos[3:0]), // Templated - .m_axi_arvalid (m_axi_arvalid), // Templated - .m_axi_rready (m_axi_rready), // Templated - .s_axi_arready (s_axi_arready), // Templated - .s_axi_awready (s_axi_awready), // Templated - .s_axi_bid (s_axi_bid[S_IDW-1:0]), // Templated - .s_axi_bresp (s_axi_bresp[1:0]), // Templated - .s_axi_bvalid (s_axi_bvalid), // Templated - .s_axi_rid (s_axi_rid[S_IDW-1:0]), // Templated - .s_axi_rdata (s_axi_rdata[31:0]), // Templated - .s_axi_rlast (s_axi_rlast), // Templated - .s_axi_rresp (s_axi_rresp[1:0]), // Templated - .s_axi_rvalid (s_axi_rvalid), // Templated - .s_axi_wready (s_axi_wready), // Templated - // Inputs - .sys_nreset (sys_nreset), - .sys_clk (sys_clk), - .rxi_lclk_p (rxi_lclk_p), - .rxi_lclk_n (rxi_lclk_n), - .rxi_frame_p (rxi_frame_p), - .rxi_frame_n (rxi_frame_n), - .rxi_data_p (rxi_data_p[7:0]), - .rxi_data_n (rxi_data_n[7:0]), - .txi_wr_wait_p (txi_wr_wait_p), - .txi_wr_wait_n (txi_wr_wait_n), - .txi_rd_wait_p (txi_rd_wait_p), - .txi_rd_wait_n (txi_rd_wait_n), - .m_axi_aresetn (m_axi_aresetn), // Templated - .m_axi_awready (m_axi_awready), // Templated - .m_axi_wready (m_axi_wready), // Templated - .m_axi_bid (m_axi_bid[M_IDW-1:0]), // Templated - .m_axi_bresp (m_axi_bresp[1:0]), // Templated - .m_axi_bvalid (m_axi_bvalid), // Templated - .m_axi_arready (m_axi_arready), // Templated - .m_axi_rid (m_axi_rid[M_IDW-1:0]), // Templated - .m_axi_rdata (m_axi_rdata[63:0]), // Templated - .m_axi_rresp (m_axi_rresp[1:0]), // Templated - .m_axi_rlast (m_axi_rlast), // Templated - .m_axi_rvalid (m_axi_rvalid), // Templated - .s_axi_aresetn (s_axi_aresetn), // Templated - .s_axi_arid (s_axi_arid[S_IDW-1:0]), // Templated - .s_axi_araddr (s_axi_araddr[31:0]), // Templated - .s_axi_arburst (s_axi_arburst[1:0]), // Templated - .s_axi_arcache (s_axi_arcache[3:0]), // Templated - .s_axi_arlock (s_axi_arlock), // Templated - .s_axi_arlen (s_axi_arlen[7:0]), // Templated - .s_axi_arprot (s_axi_arprot[2:0]), // Templated - .s_axi_arqos (s_axi_arqos[3:0]), // Templated - .s_axi_arsize (s_axi_arsize[2:0]), // Templated - .s_axi_arvalid (s_axi_arvalid), // Templated - .s_axi_awid (s_axi_awid[S_IDW-1:0]), // Templated - .s_axi_awaddr (s_axi_awaddr[31:0]), // Templated - .s_axi_awburst (s_axi_awburst[1:0]), // Templated - .s_axi_awcache (s_axi_awcache[3:0]), // Templated - .s_axi_awlock (s_axi_awlock), // Templated - .s_axi_awlen (s_axi_awlen[7:0]), // Templated - .s_axi_awprot (s_axi_awprot[2:0]), // Templated - .s_axi_awqos (s_axi_awqos[3:0]), // Templated - .s_axi_awsize (s_axi_awsize[2:0]), // Templated - .s_axi_awvalid (s_axi_awvalid), // Templated - .s_axi_bready (s_axi_bready), // Templated - .s_axi_rready (s_axi_rready), // Templated - .s_axi_wid (s_axi_wid[S_IDW-1:0]), // Templated - .s_axi_wdata (s_axi_wdata[31:0]), // Templated - .s_axi_wlast (s_axi_wlast), // Templated - .s_axi_wstrb (s_axi_wstrb[3:0]), // Templated - .s_axi_wvalid (s_axi_wvalid)); // Templated - -endmodule // zcu102_base -// Local Variables: -// verilog-library-directories:("." "../../elink/hdl") -// End: - diff --git a/standards/boards/board_footprints.svg b/standards/boards/board_footprints.svg deleted file mode 100644 index b4f9232..0000000 --- a/standards/boards/board_footprints.svg +++ /dev/null @@ -1,460 +0,0 @@ - - - - - - - - - - image/svg+xml - - - - - - - - - - - - - E5 - - - - BTH120 - - - - FMC - - - - PCI104BOARD - - - - FMCBOARD - - - - PARALLELLABOARD - - - - BTH30 - - - - PCIE - - - - SUPERMICROEEATX - - - - MINI ITX - - 19" SERVER - - - MICRO ATX - - - - - - - - 10 - - - - - - - - E3 - - - diff --git a/standards/fmc/fmc.xlsx b/standards/fmc/fmc.xlsx deleted file mode 100644 index aeafd83..0000000 Binary files a/standards/fmc/fmc.xlsx and /dev/null differ diff --git a/src/xilibs/README.md b/xilibs/README.md similarity index 100% rename from src/xilibs/README.md rename to xilibs/README.md diff --git a/src/xilibs/dv/BUF.v b/xilibs/dv/BUF.v similarity index 100% rename from src/xilibs/dv/BUF.v rename to xilibs/dv/BUF.v diff --git a/src/xilibs/dv/BUFG.v b/xilibs/dv/BUFG.v similarity index 100% rename from src/xilibs/dv/BUFG.v rename to xilibs/dv/BUFG.v diff --git a/src/xilibs/dv/BUFIO.v b/xilibs/dv/BUFIO.v similarity index 100% rename from src/xilibs/dv/BUFIO.v rename to xilibs/dv/BUFIO.v diff --git a/src/xilibs/dv/BUFR.v b/xilibs/dv/BUFR.v similarity index 100% rename from src/xilibs/dv/BUFR.v rename to xilibs/dv/BUFR.v diff --git a/src/xilibs/dv/CLKDIV.v b/xilibs/dv/CLKDIV.v similarity index 100% rename from src/xilibs/dv/CLKDIV.v rename to xilibs/dv/CLKDIV.v diff --git a/src/xilibs/dv/IBUF.v b/xilibs/dv/IBUF.v similarity index 100% rename from src/xilibs/dv/IBUF.v rename to xilibs/dv/IBUF.v diff --git a/src/xilibs/dv/IBUFDS.v b/xilibs/dv/IBUFDS.v similarity index 100% rename from src/xilibs/dv/IBUFDS.v rename to xilibs/dv/IBUFDS.v diff --git a/src/xilibs/dv/IBUFDS_DIFF_OUT.v b/xilibs/dv/IBUFDS_DIFF_OUT.v similarity index 100% rename from src/xilibs/dv/IBUFDS_DIFF_OUT.v rename to xilibs/dv/IBUFDS_DIFF_OUT.v diff --git a/src/xilibs/dv/IBUFDS_GTE2.v b/xilibs/dv/IBUFDS_GTE2.v similarity index 100% rename from src/xilibs/dv/IBUFDS_GTE2.v rename to xilibs/dv/IBUFDS_GTE2.v diff --git a/src/xilibs/dv/IBUFDS_IBUFDISABLE.v b/xilibs/dv/IBUFDS_IBUFDISABLE.v similarity index 100% rename from src/xilibs/dv/IBUFDS_IBUFDISABLE.v rename to xilibs/dv/IBUFDS_IBUFDISABLE.v diff --git a/src/xilibs/dv/IBUFDS_IBUFDISABLE_INT.v b/xilibs/dv/IBUFDS_IBUFDISABLE_INT.v similarity index 100% rename from src/xilibs/dv/IBUFDS_IBUFDISABLE_INT.v rename to xilibs/dv/IBUFDS_IBUFDISABLE_INT.v diff --git a/src/xilibs/dv/IBUFDS_INTERMDISABLE.v b/xilibs/dv/IBUFDS_INTERMDISABLE.v similarity index 100% rename from src/xilibs/dv/IBUFDS_INTERMDISABLE.v rename to xilibs/dv/IBUFDS_INTERMDISABLE.v diff --git a/src/xilibs/dv/IBUFDS_INTERMDISABLE_INT.v b/xilibs/dv/IBUFDS_INTERMDISABLE_INT.v similarity index 100% rename from src/xilibs/dv/IBUFDS_INTERMDISABLE_INT.v rename to xilibs/dv/IBUFDS_INTERMDISABLE_INT.v diff --git a/src/xilibs/dv/IBUFE3.v b/xilibs/dv/IBUFE3.v similarity index 100% rename from src/xilibs/dv/IBUFE3.v rename to xilibs/dv/IBUFE3.v diff --git a/src/xilibs/dv/IBUFGDS.v b/xilibs/dv/IBUFGDS.v similarity index 100% rename from src/xilibs/dv/IBUFGDS.v rename to xilibs/dv/IBUFGDS.v diff --git a/src/xilibs/dv/IBUF_IBUFDISABLE.v b/xilibs/dv/IBUF_IBUFDISABLE.v similarity index 100% rename from src/xilibs/dv/IBUF_IBUFDISABLE.v rename to xilibs/dv/IBUF_IBUFDISABLE.v diff --git a/src/xilibs/dv/IBUF_INTERMDISABLE.v b/xilibs/dv/IBUF_INTERMDISABLE.v similarity index 100% rename from src/xilibs/dv/IBUF_INTERMDISABLE.v rename to xilibs/dv/IBUF_INTERMDISABLE.v diff --git a/src/xilibs/dv/IDDR.v b/xilibs/dv/IDDR.v similarity index 100% rename from src/xilibs/dv/IDDR.v rename to xilibs/dv/IDDR.v diff --git a/src/xilibs/dv/IDELAYCTRL.v b/xilibs/dv/IDELAYCTRL.v similarity index 100% rename from src/xilibs/dv/IDELAYCTRL.v rename to xilibs/dv/IDELAYCTRL.v diff --git a/src/xilibs/dv/IDELAYE2.v b/xilibs/dv/IDELAYE2.v similarity index 100% rename from src/xilibs/dv/IDELAYE2.v rename to xilibs/dv/IDELAYE2.v diff --git a/src/xilibs/dv/IDELAYE2_FINEDELAY.v b/xilibs/dv/IDELAYE2_FINEDELAY.v similarity index 100% rename from src/xilibs/dv/IDELAYE2_FINEDELAY.v rename to xilibs/dv/IDELAYE2_FINEDELAY.v diff --git a/src/xilibs/dv/IDELAYE3.v b/xilibs/dv/IDELAYE3.v similarity index 100% rename from src/xilibs/dv/IDELAYE3.v rename to xilibs/dv/IDELAYE3.v diff --git a/src/xilibs/dv/IOBUF.v b/xilibs/dv/IOBUF.v similarity index 100% rename from src/xilibs/dv/IOBUF.v rename to xilibs/dv/IOBUF.v diff --git a/src/xilibs/dv/IOBUFDS.v b/xilibs/dv/IOBUFDS.v similarity index 100% rename from src/xilibs/dv/IOBUFDS.v rename to xilibs/dv/IOBUFDS.v diff --git a/src/xilibs/dv/IOBUFDSE3.v b/xilibs/dv/IOBUFDSE3.v similarity index 100% rename from src/xilibs/dv/IOBUFDSE3.v rename to xilibs/dv/IOBUFDSE3.v diff --git a/src/xilibs/dv/IOBUFDS_DCIEN.v b/xilibs/dv/IOBUFDS_DCIEN.v similarity index 100% rename from src/xilibs/dv/IOBUFDS_DCIEN.v rename to xilibs/dv/IOBUFDS_DCIEN.v diff --git a/src/xilibs/dv/IOBUFDS_DIFF_OUT_INTERMDISABLE.v b/xilibs/dv/IOBUFDS_DIFF_OUT_INTERMDISABLE.v similarity index 100% rename from src/xilibs/dv/IOBUFDS_DIFF_OUT_INTERMDISABLE.v rename to xilibs/dv/IOBUFDS_DIFF_OUT_INTERMDISABLE.v diff --git a/src/xilibs/dv/IOBUF_INTERMDISABLE.v b/xilibs/dv/IOBUF_INTERMDISABLE.v similarity index 100% rename from src/xilibs/dv/IOBUF_INTERMDISABLE.v rename to xilibs/dv/IOBUF_INTERMDISABLE.v diff --git a/src/xilibs/dv/ISERDESE2.v b/xilibs/dv/ISERDESE2.v similarity index 100% rename from src/xilibs/dv/ISERDESE2.v rename to xilibs/dv/ISERDESE2.v diff --git a/src/xilibs/dv/MMCME2_ADV.v b/xilibs/dv/MMCME2_ADV.v similarity index 100% rename from src/xilibs/dv/MMCME2_ADV.v rename to xilibs/dv/MMCME2_ADV.v diff --git a/src/xilibs/dv/OBUF.v b/xilibs/dv/OBUF.v similarity index 100% rename from src/xilibs/dv/OBUF.v rename to xilibs/dv/OBUF.v diff --git a/src/xilibs/dv/OBUFDS.v b/xilibs/dv/OBUFDS.v similarity index 100% rename from src/xilibs/dv/OBUFDS.v rename to xilibs/dv/OBUFDS.v diff --git a/src/xilibs/dv/OBUFDS_GTE3_ADV.v b/xilibs/dv/OBUFDS_GTE3_ADV.v similarity index 100% rename from src/xilibs/dv/OBUFDS_GTE3_ADV.v rename to xilibs/dv/OBUFDS_GTE3_ADV.v diff --git a/src/xilibs/dv/OBUFT.v b/xilibs/dv/OBUFT.v similarity index 100% rename from src/xilibs/dv/OBUFT.v rename to xilibs/dv/OBUFT.v diff --git a/src/xilibs/dv/OBUFTDS.v b/xilibs/dv/OBUFTDS.v similarity index 100% rename from src/xilibs/dv/OBUFTDS.v rename to xilibs/dv/OBUFTDS.v diff --git a/src/xilibs/dv/OBUFTDS_DCIEN.v b/xilibs/dv/OBUFTDS_DCIEN.v similarity index 100% rename from src/xilibs/dv/OBUFTDS_DCIEN.v rename to xilibs/dv/OBUFTDS_DCIEN.v diff --git a/src/xilibs/dv/ODDR.v b/xilibs/dv/ODDR.v similarity index 100% rename from src/xilibs/dv/ODDR.v rename to xilibs/dv/ODDR.v diff --git a/src/xilibs/dv/ODELAYE2.v b/xilibs/dv/ODELAYE2.v similarity index 100% rename from src/xilibs/dv/ODELAYE2.v rename to xilibs/dv/ODELAYE2.v diff --git a/src/xilibs/dv/OSERDESE2.v b/xilibs/dv/OSERDESE2.v similarity index 100% rename from src/xilibs/dv/OSERDESE2.v rename to xilibs/dv/OSERDESE2.v diff --git a/src/xilibs/dv/PLLE2_ADV.v b/xilibs/dv/PLLE2_ADV.v similarity index 100% rename from src/xilibs/dv/PLLE2_ADV.v rename to xilibs/dv/PLLE2_ADV.v diff --git a/src/xilibs/dv/PLLE2_BASE.v b/xilibs/dv/PLLE2_BASE.v similarity index 100% rename from src/xilibs/dv/PLLE2_BASE.v rename to xilibs/dv/PLLE2_BASE.v diff --git a/src/xilibs/dv/RAM32X1D.v b/xilibs/dv/RAM32X1D.v similarity index 100% rename from src/xilibs/dv/RAM32X1D.v rename to xilibs/dv/RAM32X1D.v diff --git a/src/xilibs/dv/fifo_async_104x32.v b/xilibs/dv/fifo_async_104x32.v similarity index 100% rename from src/xilibs/dv/fifo_async_104x32.v rename to xilibs/dv/fifo_async_104x32.v diff --git a/src/xilibs/dv/fifo_generator_vlog_beh.v b/xilibs/dv/fifo_generator_vlog_beh.v similarity index 100% rename from src/xilibs/dv/fifo_generator_vlog_beh.v rename to xilibs/dv/fifo_generator_vlog_beh.v diff --git a/src/xilibs/ip/fifo_async_104x32.xci b/xilibs/ip/fifo_async_104x32.xci similarity index 100% rename from src/xilibs/ip/fifo_async_104x32.xci rename to xilibs/ip/fifo_async_104x32.xci