diff --git a/chip/README.md b/chip/README.md index 52c6213..81570ec 100644 --- a/chip/README.md +++ b/chip/README.md @@ -17,7 +17,8 @@ The structure is designed to simplify implementation scripts and maximize portab ![alt tag](docs/directory_structure.png) -* **docs**: Common documents and design guidelines +* **docs**: Open source documents and design guidelines +* **common**: Open source tcl script and software * **foundry name ("foundry1")**: tsmc, gf, tower, smic, umc, etc * **process name ("process1")**: 28slp, 65g, etc * **hard ip name**: pdk, stdlib, io, sram, serdes, etc diff --git a/chip/common/synthesis/01_setup.tcl b/chip/common/synthesis/01_setup.tcl deleted file mode 100644 index 3e8174b..0000000 --- a/chip/common/synthesis/01_setup.tcl +++ /dev/null @@ -1,2 +0,0 @@ -source ../$VENDOR/$TOOL/01_setup.tcl - diff --git a/chip/common/synthesis/02_read_design.tcl b/chip/common/synthesis/02_read_design.tcl deleted file mode 100644 index 0583799..0000000 --- a/chip/common/synthesis/02_read_design.tcl +++ /dev/null @@ -1,2 +0,0 @@ -source ../$VENDOR/$TOOL/01_read_design.tcl - diff --git a/chip/common/synthesis/03_read_constraints.tcl b/chip/common/synthesis/03_read_constraints.tcl deleted file mode 100644 index cc21fcf..0000000 --- a/chip/common/synthesis/03_read_constraints.tcl +++ /dev/null @@ -1,2 +0,0 @@ -source ../$VENDOR/$TOOL/03_read_design.tcl - diff --git a/chip/common/synthesis/04_setup_corners.tcl b/chip/common/synthesis/04_setup_corners.tcl deleted file mode 100644 index 3cb6537..0000000 --- a/chip/common/synthesis/04_setup_corners.tcl +++ /dev/null @@ -1,2 +0,0 @@ -source ../$VENDOR/$TOOL/01_setup_corners.tcl - diff --git a/chip/common/synthesis/05_floorplan.tcl b/chip/common/synthesis/05_floorplan.tcl deleted file mode 100644 index ca2bba7..0000000 --- a/chip/common/synthesis/05_floorplan.tcl +++ /dev/null @@ -1 +0,0 @@ -source ../$VENDOR/$TOOL/01_floorplan.tcl diff --git a/chip/common/synthesis/06_check_design.tcl b/chip/common/synthesis/06_check_design.tcl deleted file mode 100644 index 92a2638..0000000 --- a/chip/common/synthesis/06_check_design.tcl +++ /dev/null @@ -1 +0,0 @@ -source ../$VENDOR/$TOOL/01_check_design.tcl diff --git a/chip/common/synthesis/07_compile.tcl b/chip/common/synthesis/07_compile.tcl deleted file mode 100644 index a43c146..0000000 --- a/chip/common/synthesis/07_compile.tcl +++ /dev/null @@ -1 +0,0 @@ -source ../$VENDOR/$TOOL/06_compile.tcl diff --git a/chip/common/synthesis/08_dft.tcl b/chip/common/synthesis/08_dft.tcl deleted file mode 100644 index 06c90f7..0000000 --- a/chip/common/synthesis/08_dft.tcl +++ /dev/null @@ -1,2 +0,0 @@ -source ../$VENDOR/$TOOL/01_dft.tcl - diff --git a/chip/common/synthesis/09_optimize.tcl b/chip/common/synthesis/09_optimize.tcl deleted file mode 100644 index 008865e..0000000 --- a/chip/common/synthesis/09_optimize.tcl +++ /dev/null @@ -1,2 +0,0 @@ -source ../$VENDOR/$TOOL/08_optimize.tcl - diff --git a/chip/common/synthesis/10_write_netlist.tcl b/chip/common/synthesis/10_write_netlist.tcl deleted file mode 100644 index 8359474..0000000 --- a/chip/common/synthesis/10_write_netlist.tcl +++ /dev/null @@ -1,2 +0,0 @@ -source ../$VENDOR/$TOOL/10_output_design.tcl - diff --git a/chip/common/synthesis/README.md b/chip/common/synthesis/README.md index 601e796..f500822 100644 --- a/chip/common/synthesis/README.md +++ b/chip/common/synthesis/README.md @@ -3,8 +3,12 @@ Vendor agnostic synthesis wrappers The following TCL mush be defined before running the flow. Also, clearly the vendor specific files must be in place. +| SHELL VARIABLE | DESCRIPTION | +|------------------|-------------------------------------| +| $PROCESS_HOME | Path to foundry process | +| $OH_HOME | Path to OH repo home | -| VARIABLE | DESCRIPTION | +| TCL VARIABLE | DESCRIPTION | |------------------|-------------------------------------| | $OH_VENDOR | synopsys, cadence, etc | | $OH_TOOL | dc, rc, etc | @@ -14,6 +18,7 @@ The following TCL mush be defined before running the flow. Also, clearly the ven | $OH_CONSTRAINTS | Timing constraints file | ## Example + ```tcl set OH_DESIGN "ecore" ; # top level module set OH_FILES "../../../hdl/$OH_DESIGN.v \ diff --git a/chip/common/synthesis/run.tcl b/chip/common/synthesis/run.tcl index ccf711a..85da22c 100644 --- a/chip/common/synthesis/run.tcl +++ b/chip/common/synthesis/run.tcl @@ -1,65 +1,80 @@ #SET PATH set LOCALPATH [file dirname [ info script ]] -############################################################################## -# STEP1: SETUP TOOL -############################################################################### +set OH_VENDOR synopsys +set OH_TOOL dc -source $LOCALPATH/01_setup.tcl +################################ +# STEP1: SETUP PROCESS +################################ -############################################################################### -# STEP2: READ DESIGN FILES -############################################################################### +source $LOCALPATH/01_setup_process.tcl -source $LOCALPATH/02_read_design.tcl +################################ +# STEP2: SETUP LIBRARIES +################################ -############################################################################### -# STEP3: READ CONSTRAINTS -############################################################################### +source $LOCALPATH/02_setup_libs.tcl -source $LOCALPATH/03_read_constraints.tcl +################################ +# STEP3: CONFIGURE TOOL +################################ -############################################################################### -# STEP4: SETUP CORNERS -############################################################################### +source $LOCALPATH/03_configure_tool.tcl -source $LOCALPATH/04_setup_corners.tcl +################################ +# STEP4: READ DESIGN FILES +################################ -############################################################################### -# STEP5: READ FLROOPLAN -############################################################################### +source $LOCALPATH/04_read_design.tcl -source $LOCALPATH/05_floorplan.tcl +################################ +# STEP5: READ CONSTRAINTS +################################ -############################################################################## -# STEP6: CHECK DESIGN -############################################################################## +source $LOCALPATH/05_read_constraints.tcl -source $LOCALPATH/06_check_design.tcl +################################ +# STEP6: SETUP CORNERS +################################ -############################################################################## -# STEP7: COMPILE -############################################################################## +source $LOCALPATH/06_setup_corners.tcl -source $LOCALPATH/07_compile.tcl +################################ +# STEP7: READ FLROOPLAN +################################ -############################################################################### -# STEP8: DFT -############################################################################### +source $LOCALPATH/07_floorplan.tcl -source $LOCALPATH/08_dft.tcl +################################ +# STEP8: CHECK DESIGN +################################ -############################################################################### -# STEP9: OPTIMIZE -############################################################################### +source $LOCALPATH/08_check_design.tcl -source $LOCALPATH/09_optimize.tcl +################################ +# STEP9: COMPILE +################################ -############################################################################### -# STEP10: WRITE NETLIST (AND OTHER FILES) -############################################################################### +source $LOCALPATH/09_compile.tcl -source $LOCALPATH/10_write_netlist.tcl +################################ +# STEP10: DFT +################################ + +source $LOCALPATH/10_dft.tcl + +################################ +# STEP11: OPTIMIZE +################################ + +source $LOCALPATH/11_optimize.tcl + +################################ +# STEP12: WRITE NETLIST (AND OTHER FILES) +################################ + +source $LOCALPATH/12_write_netlist.tcl exit diff --git a/chip/foundry1/process1/README.md b/chip/foundry1/process1/README.md deleted file mode 100644 index 843e822..0000000 --- a/chip/foundry1/process1/README.md +++ /dev/null @@ -1,4 +0,0 @@ -## CONTENTS - -* "pdk": process specific technology files provided by foundry -* Process node specific hard IP like standard logic libraries, general purpose IO, SERDS, memory macros diff --git a/chip/foundry1/process1/io/README.md b/chip/foundry1/process1/io/README.md deleted file mode 100644 index 39c2a64..0000000 --- a/chip/foundry1/process1/io/README.md +++ /dev/null @@ -1,2 +0,0 @@ -## CONTENTS -* Various IP vendors. ipco1, ipco2, etc \ No newline at end of file diff --git a/chip/foundry1/process1/io/ipco1/docs/README.md b/chip/foundry1/process1/io/ipco1/docs/README.md deleted file mode 100644 index a716d10..0000000 --- a/chip/foundry1/process1/io/ipco1/docs/README.md +++ /dev/null @@ -1,3 +0,0 @@ -#FOLDER CONTENTS - -Symbolic links to the latest user guides and datasheets in the "proprietary directory" \ No newline at end of file diff --git a/chip/foundry1/process1/io/ipco1/eda1/README.md b/chip/foundry1/process1/io/ipco1/eda1/README.md deleted file mode 100644 index 2fe04cc..0000000 --- a/chip/foundry1/process1/io/ipco1/eda1/README.md +++ /dev/null @@ -1,7 +0,0 @@ -#FOLDER CONTENTS -* Scripts needed to setup up IP in the various EDA tools to take design from design to Tcl files needed to set up the setup.tc -* back_end: directory with links to back end views (GDS, LEF, etc) -* front_end: directory with links to front end views (verilog, lib, etc) - - - \ No newline at end of file diff --git a/chip/foundry1/process1/io/ipco1/eda1/back_end/README.md b/chip/foundry1/process1/io/ipco1/eda1/back_end/README.md deleted file mode 100644 index c73a29d..0000000 --- a/chip/foundry1/process1/io/ipco1/eda1/back_end/README.md +++ /dev/null @@ -1,3 +0,0 @@ -## CONTENTS -EDA specific folders and symbolic links to "proprietary" directory fron end views (GDS, lef, milkyway, etc) - diff --git a/chip/foundry1/process1/io/ipco1/eda1/front_end/README.md b/chip/foundry1/process1/io/ipco1/eda1/front_end/README.md deleted file mode 100644 index 4be65be..0000000 --- a/chip/foundry1/process1/io/ipco1/eda1/front_end/README.md +++ /dev/null @@ -1,3 +0,0 @@ -## CONTENTS -EDA specific folders and symbolic links to "proprietary" directory. Contains symbolic links to front end views (verilog, lib) - diff --git a/chip/foundry1/process1/pdk/README.md b/chip/foundry1/process1/pdk/README.md deleted file mode 100644 index 1861a04..0000000 --- a/chip/foundry1/process1/pdk/README.md +++ /dev/null @@ -1,4 +0,0 @@ -## CONTENTS - -* proprietary: files from vendor -* eda1: EDA tool specific setup files \ No newline at end of file diff --git a/chip/foundry1/process1/pdk/eda1/README.md b/chip/foundry1/process1/pdk/eda1/README.md deleted file mode 100644 index a77a725..0000000 --- a/chip/foundry1/process1/pdk/eda1/README.md +++ /dev/null @@ -1,3 +0,0 @@ -## CONTENTS -* Links to eda specific files from proprietary pdk directory -* Technology setup scripts on a per tool basis (synthesis, P&R as examples) diff --git a/chip/foundry1/process1/serdes/README.md b/chip/foundry1/process1/serdes/README.md deleted file mode 100644 index 39c2a64..0000000 --- a/chip/foundry1/process1/serdes/README.md +++ /dev/null @@ -1,2 +0,0 @@ -## CONTENTS -* Various IP vendors. ipco1, ipco2, etc \ No newline at end of file diff --git a/chip/foundry1/process1/sram/README.md b/chip/foundry1/process1/sram/README.md deleted file mode 100644 index 39c2a64..0000000 --- a/chip/foundry1/process1/sram/README.md +++ /dev/null @@ -1,2 +0,0 @@ -## CONTENTS -* Various IP vendors. ipco1, ipco2, etc \ No newline at end of file diff --git a/chip/foundry1/process1/stdlib/README.md b/chip/foundry1/process1/stdlib/README.md deleted file mode 100644 index 39c2a64..0000000 --- a/chip/foundry1/process1/stdlib/README.md +++ /dev/null @@ -1,2 +0,0 @@ -## CONTENTS -* Various IP vendors. ipco1, ipco2, etc \ No newline at end of file