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Andreas Olofsson 2016-02-15 16:38:48 -05:00
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3
chip/README.md
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@ -17,7 +17,8 @@ The structure is designed to simplify implementation scripts and maximize portab
![alt tag](docs/directory_structure.png) ![alt tag](docs/directory_structure.png)
* **docs**: Common documents and design guidelines * **docs**: Open source documents and design guidelines
* **common**: Open source tcl script and software
* **foundry name ("foundry1")**: tsmc, gf, tower, smic, umc, etc * **foundry name ("foundry1")**: tsmc, gf, tower, smic, umc, etc
* **process name ("process1")**: 28slp, 65g, etc * **process name ("process1")**: 28slp, 65g, etc
* **hard ip name**: pdk, stdlib, io, sram, serdes, etc * **hard ip name**: pdk, stdlib, io, sram, serdes, etc

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chip/common/synthesis/01_setup.tcl
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source ../$VENDOR/$TOOL/01_setup.tcl

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chip/common/synthesis/02_read_design.tcl
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source ../$VENDOR/$TOOL/01_read_design.tcl

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chip/common/synthesis/03_read_constraints.tcl
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source ../$VENDOR/$TOOL/03_read_design.tcl

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chip/common/synthesis/04_setup_corners.tcl
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source ../$VENDOR/$TOOL/01_setup_corners.tcl

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chip/common/synthesis/05_floorplan.tcl
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source ../$VENDOR/$TOOL/01_floorplan.tcl

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chip/common/synthesis/06_check_design.tcl
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source ../$VENDOR/$TOOL/01_check_design.tcl

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chip/common/synthesis/07_compile.tcl
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source ../$VENDOR/$TOOL/06_compile.tcl

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chip/common/synthesis/08_dft.tcl
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source ../$VENDOR/$TOOL/01_dft.tcl

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chip/common/synthesis/09_optimize.tcl
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source ../$VENDOR/$TOOL/08_optimize.tcl

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chip/common/synthesis/10_write_netlist.tcl
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source ../$VENDOR/$TOOL/10_output_design.tcl

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chip/common/synthesis/README.md
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The following TCL mush be defined before running the flow. Also, clearly the vendor specific files must be in place. The following TCL mush be defined before running the flow. Also, clearly the vendor specific files must be in place.
| SHELL VARIABLE | DESCRIPTION |
|------------------|-------------------------------------|
| $PROCESS_HOME | Path to foundry process |
| $OH_HOME | Path to OH repo home |
| VARIABLE | DESCRIPTION | | TCL VARIABLE | DESCRIPTION |
|------------------|-------------------------------------| |------------------|-------------------------------------|
| $OH_VENDOR | synopsys, cadence, etc | | $OH_VENDOR | synopsys, cadence, etc |
| $OH_TOOL | dc, rc, etc | | $OH_TOOL | dc, rc, etc |
@ -14,6 +18,7 @@ The following TCL mush be defined before running the flow. Also, clearly the ven
| $OH_CONSTRAINTS | Timing constraints file | | $OH_CONSTRAINTS | Timing constraints file |
## Example ## Example
```tcl ```tcl
set OH_DESIGN "ecore" ; # top level module set OH_DESIGN "ecore" ; # top level module
set OH_FILES "../../../hdl/$OH_DESIGN.v \ set OH_FILES "../../../hdl/$OH_DESIGN.v \

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chip/common/synthesis/run.tcl
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#SET PATH #SET PATH
set LOCALPATH [file dirname [ info script ]] set LOCALPATH [file dirname [ info script ]]
############################################################################## set OH_VENDOR synopsys
# STEP1: SETUP TOOL set OH_TOOL dc
###############################################################################
source $LOCALPATH/01_setup.tcl ################################
# STEP1: SETUP PROCESS
################################
############################################################################### source $LOCALPATH/01_setup_process.tcl
# STEP2: READ DESIGN FILES
###############################################################################
source $LOCALPATH/02_read_design.tcl ################################
# STEP2: SETUP LIBRARIES
################################
############################################################################### source $LOCALPATH/02_setup_libs.tcl
# STEP3: READ CONSTRAINTS
###############################################################################
source $LOCALPATH/03_read_constraints.tcl ################################
# STEP3: CONFIGURE TOOL
################################
############################################################################### source $LOCALPATH/03_configure_tool.tcl
# STEP4: SETUP CORNERS
###############################################################################
source $LOCALPATH/04_setup_corners.tcl ################################
# STEP4: READ DESIGN FILES
################################
############################################################################### source $LOCALPATH/04_read_design.tcl
# STEP5: READ FLROOPLAN
###############################################################################
source $LOCALPATH/05_floorplan.tcl ################################
# STEP5: READ CONSTRAINTS
################################
############################################################################## source $LOCALPATH/05_read_constraints.tcl
# STEP6: CHECK DESIGN
##############################################################################
source $LOCALPATH/06_check_design.tcl ################################
# STEP6: SETUP CORNERS
################################
############################################################################## source $LOCALPATH/06_setup_corners.tcl
# STEP7: COMPILE
##############################################################################
source $LOCALPATH/07_compile.tcl ################################
# STEP7: READ FLROOPLAN
################################
############################################################################### source $LOCALPATH/07_floorplan.tcl
# STEP8: DFT
###############################################################################
source $LOCALPATH/08_dft.tcl ################################
# STEP8: CHECK DESIGN
################################
############################################################################### source $LOCALPATH/08_check_design.tcl
# STEP9: OPTIMIZE
###############################################################################
source $LOCALPATH/09_optimize.tcl ################################
# STEP9: COMPILE
################################
############################################################################### source $LOCALPATH/09_compile.tcl
# STEP10: WRITE NETLIST (AND OTHER FILES)
###############################################################################
source $LOCALPATH/10_write_netlist.tcl ################################
# STEP10: DFT
################################
source $LOCALPATH/10_dft.tcl
################################
# STEP11: OPTIMIZE
################################
source $LOCALPATH/11_optimize.tcl
################################
# STEP12: WRITE NETLIST (AND OTHER FILES)
################################
source $LOCALPATH/12_write_netlist.tcl
exit exit

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chip/foundry1/process1/README.md
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## CONTENTS
* "pdk": process specific technology files provided by foundry
* Process node specific hard IP like standard logic libraries, general purpose IO, SERDS, memory macros

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chip/foundry1/process1/io/README.md
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## CONTENTS
* Various IP vendors. ipco1, ipco2, etc

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chip/foundry1/process1/io/ipco1/docs/README.md
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#FOLDER CONTENTS
Symbolic links to the latest user guides and datasheets in the "proprietary directory"

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chip/foundry1/process1/io/ipco1/eda1/README.md
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#FOLDER CONTENTS
* Scripts needed to setup up IP in the various EDA tools to take design from design to Tcl files needed to set up the setup.tc
* back_end: directory with links to back end views (GDS, LEF, etc)
* front_end: directory with links to front end views (verilog, lib, etc)

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chip/foundry1/process1/io/ipco1/eda1/back_end/README.md
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## CONTENTS
EDA specific folders and symbolic links to "proprietary" directory fron end views (GDS, lef, milkyway, etc)

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chip/foundry1/process1/io/ipco1/eda1/front_end/README.md
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## CONTENTS
EDA specific folders and symbolic links to "proprietary" directory. Contains symbolic links to front end views (verilog, lib)

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chip/foundry1/process1/pdk/README.md
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## CONTENTS
* proprietary: files from vendor
* eda1: EDA tool specific setup files

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chip/foundry1/process1/pdk/eda1/README.md
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## CONTENTS
* Links to eda specific files from proprietary pdk directory
* Technology setup scripts on a per tool basis (synthesis, P&R as examples)

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chip/foundry1/process1/serdes/README.md
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## CONTENTS
* Various IP vendors. ipco1, ipco2, etc

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chip/foundry1/process1/sram/README.md
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## CONTENTS
* Various IP vendors. ipco1, ipco2, etc

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chip/foundry1/process1/stdlib/README.md
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## CONTENTS
* Various IP vendors. ipco1, ipco2, etc