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Resetting slave par2ser with ss (not nreset!)

- Shifting out on positive edge of sclk
This commit is contained in:
Andreas Olofsson 2016-03-21 20:46:05 -04:00
parent 7b3ca453f4
commit 71230c8c95

View File

@ -66,7 +66,6 @@ module spi_slave_io(/*AUTOARG*/
`define SPI_CMD 2'b01 // 8 cycles for command/addr
`define SPI_DATA 2'b10 // stay in datamode until done
//state machine
always @ (posedge sclk or posedge ss)
if(ss)
@ -90,8 +89,10 @@ module spi_slave_io(/*AUTOARG*/
// command/address register
// auto increment for every byte
always @ (posedge sclk)
if((spi_state[1:0]==`SPI_CMD) & byte_done)
always @ (negedge sclk or posedge ss)
if(ss)
command_reg[7:0] <= 'b0;
else if((spi_state[1:0]==`SPI_CMD) & byte_done)
command_reg[7:0] <= rx_data[7:0];
else if(byte_done)
command_reg[7:0] <= {command_reg[7:6],
@ -122,9 +123,9 @@ module spi_slave_io(/*AUTOARG*/
.SW(1))
par2ser (.dout (miso),
.access_out (),
.wait_out (),
.clk (~sclk),
.nreset (nreset),
.wait_out (tx_wait),
.clk (sclk), // shift out on positive edge
.nreset (~ss),
.din (spi_rdata[7:0]),
.shift (~ss),
.lsbfirst (lsbfirst),
@ -150,7 +151,6 @@ module spi_slave_io(/*AUTOARG*/
assign spi_remote = command_reg[7:6]==2'b11; //send remote request
assign spi_wdata[7:0] = rx_data[7:0];
//###################################
@ -158,6 +158,7 @@ module spi_slave_io(/*AUTOARG*/
//###################################
//sync the ss to free running clk
//look for rising edge
oh_dsync dsync (.dout (ss_sync),
.clk (clk),
.din (ss & spi_remote)