diff --git a/README.md b/README.md index 6b48011..85b4acb 100644 --- a/README.md +++ b/README.md @@ -1,23 +1,24 @@ ======= # OH! -An Open Hardware Library for Chip and FPGA Designers +An Open Hardware Library for Chip and FPGA designers written in Verilog -This library is written in vanilla Verilog. Pull requests accepted. +## CONTENT -| Spec | Status | Description | -|---------------------|--------|---------------------------------------------| -| [common](common) | | Common modules (synchronizer,clocks,etc) | -| [edma](edma) | | DMA module | -| [emesh](emesh) | | Epiphany emesh related circuits | -| [elink](elink) | | Epiphany point to point LVDS link | -| [emailbox](emailbox)| | Simple mailbox with interrupt output | -| [emmu](emmu) | | Simple memory transaction translation unit | -| [memory](memory) | | Various simple memory structures (RAM/FIFO) | -| [rand](rand) | | Random number generators | -| [scripts](scripts) | | Common scripts/utilities for FPGA design | -| [xilibs](xilibs) | | Simulation modules for Xilinx primitives | +| Spec | Description | +|---------------------|---------------------------------------------| +| [common](common) | Common utility modules and scripts | +| [edma](edma) | DMA module | +| [emesh](emesh) | Epiphany emesh related circuits | +| [elink](elink) | Epiphany point to point LVDS link | +| [emailbox](emailbox)| Simple mailbox with interrupt output | +| [emmu](emmu) | Simple memory transaction translation unit | +| [memory](memory) | Various simple memory structures (RAM/FIFO) | +| [xilibs](xilibs) | Simulation modules for Xilinx primitives | ## LICENSE The OH! repository source code is licensed under the MIT license unless otherwise specified. See [LICENSE](LICENSE) for full copyright terms. +## CONTRIBUTING +Instructions for contributing can be found [HERE](CONTRIBUTING.md). +