FPGA/oh
1
0
Fork 0
mirror of https://github.com/aolofsson/oh.git synced 2025-01-17 20:02:53 +08:00
Code Issues Projects Releases Wiki Activity

Removing reset

Browse Source
This commit is contained in:
Andreas Olofsson 2015-10-08 10:45:27 -04:00
parent 95c4f8f029
commit 85cc46567a
1 changed files with 2 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
common/hdl/pulse_stretcher.v
View File

@ -20,11 +20,8 @@ module pulse_stretcher (/*AUTOARG*/
reg [DW-1:0] wide_pulse;
always @ (posedge clk or posedge reset)
if(reset)
wide_pulse[DW-1:0] <= 'b0;
else
wide_pulse[DW-1:0] <= {wide_pulse[DW-2:0],in};
always @ (posedge clk)
wide_pulse[DW-1:0] <= {wide_pulse[DW-2:0],in};
assign out = (|{wide_pulse[DW-1:0],in});