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Adding attributes to sync logic

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- Otherwise tool was throwing away logic and timing incorretly.
- This is why you HAVE to isolate this logic! Solve the problem once for all logic and for everyone.
This commit is contained in:
Andreas Olofsson 2015-11-08 23:30:47 -05:00
parent 3797cac74f
commit 875e4213a5
2 changed files with 14 additions and 3 deletions
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6
common/hdl/dsync.v
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@ -13,7 +13,13 @@ module dsync (/*AUTOARG*/
input [DW-1:0] din;
output [DW-1:0] dout;
`ifdef TARGET_SIM
reg [PS-1:0] sync_pipe[DW-1:0];
`else
(* ASYNC_REG = "TRUE" *) (* DONT_TOUCH = "TRUE" *) reg [PS-1:0] sync_pipe[DW-1:0];
`endif
genvar i;
integer j;

5
common/hdl/rsync.v
View File

@ -14,7 +14,12 @@ module rsync (/*AUTOARG*/
input [DW-1:0] nrst_in;
output [DW-1:0] nrst_out;
//TOOD: Should only be one target
`ifdef TARGET_SIM
reg [PS-1:0] sync_pipe[DW-1:0];
`else
(* ASYNC_REG = "TRUE" *) (* DONT_TOUCH = "TRUE" *) reg [PS-1:0] sync_pipe[DW-1:0];
`endif
genvar i;
integer j;