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Simplifying synthesis flow
- Too many steps, some of them were "one line long"
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@ -1,2 +0,0 @@
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source $env(EDA_HOME)/$OH_VENDOR/$OH_TOOL/04_setup_corners.tcl
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source $env(EDA_HOME)/$OH_VENDOR/$OH_TOOL/06_check_design.tcl
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@ -61,46 +61,34 @@ source $LOCALPATH/02_read_design.tcl
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source $LOCALPATH/03_read_constraints.tcl
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################################
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# STEP4: SETUP CORNERS
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# STEP4: READ FLROOPLAN
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################################
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source $LOCALPATH/04_setup_corners.tcl
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source $LOCALPATH/04_floorplan.tcl
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################################
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# STEP5: READ FLROOPLAN
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# STEP5: COMPILE
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################################
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source $LOCALPATH/05_floorplan.tcl
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source $LOCALPATH/05_compile.tcl
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################################
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# STEP6: CHECK DESIGN
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# STEP6: DFT
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################################
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source $LOCALPATH/06_check_design.tcl
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source $LOCALPATH/06_dft.tcl
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################################
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# STEP7: COMPILE
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# STEP7: OPTIMIZE
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################################
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source $LOCALPATH/07_compile.tcl
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source $LOCALPATH/07_optimize.tcl
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################################
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# STEP8: DFT
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# STEP8: WRITE NETLIST/REPORTS
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################################
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source $LOCALPATH/08_dft.tcl
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################################
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# STEP9: OPTIMIZE
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################################
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source $LOCALPATH/09_optimize.tcl
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################################
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# STEP10: WRITE NETLIST (AND OTHER FILES)
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################################
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source $LOCALPATH/10_write_netlist.tcl
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source $LOCALPATH/08_signoff.tcl
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#exit
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