FPGA/oh
1
0
Fork 0
mirror of https://github.com/aolofsson/oh.git synced 2025-01-17 20:02:53 +08:00
Code Issues Projects Releases Wiki Activity

Adding test for etracer logic analyzer

Browse Source
This commit is contained in:
Andreas Olofsson 2015-11-25 21:20:37 -05:00
parent 4fe7a32be3
commit 9b41dade80
1 changed files with 19 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

19
etrace/dv/test/test_trace.memh Normal file
View File

@ -0,0 +1,19 @@
00000000_00000001_810F0000_05_0010 //enable tracer
00000001_00000000_00000001_05_0010 //s0:use source address and write to dummy
10000000_00000000_00000001_05_0010 //s1
10000000_00000000_00000001_05_0010 //s2
00000000_00000000_00000001_05_0010 //s3
11111111_00000000_00000001_05_0010 //s4
00000000_00000000_810A0000_04_0010 //read sample0
00000000_00000000_810A0004_04_0010 //
00000000_00000000_810A0008_04_0010 //read sample1
00000000_00000000_810A000c_04_0010 //
00000000_00000000_810A0010_04_0010 //read sample2
00000000_00000000_810A0014_04_0010 //
00000000_00000000_810A0018_04_0010 //read sample3
00000000_00000000_810A001c_04_0010 //
00000000_00000000_810A0020_04_0010 //read sample4
00000000_00000000_810A0024_04_0010 //