diff --git a/elink/hdl/eclocks.v b/elink/hdl/eclocks.v
index ef7cb07..f1cf83b 100644
--- a/elink/hdl/eclocks.v
+++ b/elink/hdl/eclocks.v
@@ -13,7 +13,6 @@
  ############################################################################
  */
 
-//`define TARGET_XILINX //TODO this need to be global
 `include "elink_constants.v"
 
 module eclocks (/*AUTOARG*/
diff --git a/elink/hdl/etx_io.v b/elink/hdl/etx_io.v
index 0db4002..8ec177c 100644
--- a/elink/hdl/etx_io.v
+++ b/elink/hdl/etx_io.v
@@ -248,7 +248,6 @@ always @ (posedge tx_lclk)
    //# Wait Input Buffers
    //################################
 
-//TODO: see below..
 `ifdef EPHYCARD
     assign tx_wr_wait = txi_wr_wait_p;
 `else