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parallella/fpga/headless_e16_z70{1,2}0: Fix Makefile clean target

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Update for output file name change

Signed-off-by: Ola Jeppsson <ola@adapteva.com>
This commit is contained in:
Ola Jeppsson 2016-03-11 17:06:25 +01:00
parent fc9a8fc331
commit a6aba4cd1f
2 changed files with 2 additions and 2 deletions
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2
parallella/fpga/headless_e16_z7010/Makefile
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@ -15,7 +15,7 @@ M_FLIST += *.runs
M_FLIST += *.srcs
M_FLIST += *.sdk
M_FLIST += .Xil
M_FLIST += parallella.bit.bin
M_FLIST += parallella_e16_headless_gpiose_7010.bit.bin
M_FLIST += system_wrapper.bit.bin
.PHONY: all clean

2
parallella/fpga/headless_e16_z7020/Makefile
View File

@ -15,7 +15,7 @@ M_FLIST += *.runs
M_FLIST += *.srcs
M_FLIST += *.sdk
M_FLIST += .Xil
M_FLIST += parallella.bit.bin
M_FLIST += parallella_e16_headless_gpiose_7020.bit.bin
M_FLIST += system_wrapper.bit.bin
.PHONY: all clean