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zcu102: Synthesize & create bitstream in FPGA project

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Signed-off-by: Ola Jeppsson <ola@adapteva.com>
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Ola Jeppsson 2017-02-04 18:52:02 +01:00
parent d30411c80d
commit a73f0ae10c
1 changed files with 1 additions and 1 deletions
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src/zcu102/fpga/zcu102/run.tcl
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@ -9,4 +9,4 @@ source ../../../common/fpga/system_init.tcl
##...
#STEP 4: SYNTEHSIZE AND CREATE BITSTRAM
#source ../../../common/fpga/system_build.tcl
source ../../../common/fpga/system_build.tcl