From aa1e511a30cafd63c652b7910cc16597ff7afc78 Mon Sep 17 00:00:00 2001 From: Andreas Olofsson Date: Sun, 19 Jun 2016 17:18:44 -0400 Subject: [PATCH] Moving xilibs/hdl to xilibs/dv - HDL should always be synthesizable... --- src/xilibs/{hdl => dv}/BUF.v | 0 src/xilibs/{hdl => dv}/BUFG.v | 0 src/xilibs/{hdl => dv}/BUFIO.v | 0 src/xilibs/{hdl => dv}/BUFR.v | 0 src/xilibs/{hdl => dv}/CLKDIV.v | 0 src/xilibs/{hdl => dv}/IBUF.v | 0 src/xilibs/{hdl => dv}/IBUFDS.v | 0 src/xilibs/{hdl => dv}/IBUFDS_DIFF_OUT.v | 0 src/xilibs/{hdl => dv}/IBUFDS_GTE2.v | 0 src/xilibs/{hdl => dv}/IBUFDS_IBUFDISABLE.v | 0 src/xilibs/{hdl => dv}/IBUFDS_IBUFDISABLE_INT.v | 0 src/xilibs/{hdl => dv}/IBUFDS_INTERMDISABLE.v | 0 src/xilibs/{hdl => dv}/IBUFDS_INTERMDISABLE_INT.v | 0 src/xilibs/{hdl => dv}/IBUFE3.v | 0 src/xilibs/{hdl => dv}/IBUFGDS.v | 0 src/xilibs/{hdl => dv}/IBUF_IBUFDISABLE.v | 0 src/xilibs/{hdl => dv}/IBUF_INTERMDISABLE.v | 0 src/xilibs/{hdl => dv}/IDDR.v | 0 src/xilibs/{hdl => dv}/IDELAYCTRL.v | 0 src/xilibs/{hdl => dv}/IDELAYE2.v | 0 src/xilibs/{hdl => dv}/IDELAYE2_FINEDELAY.v | 0 src/xilibs/{hdl => dv}/IDELAYE3.v | 0 src/xilibs/{hdl => dv}/IOBUF.v | 0 src/xilibs/{hdl => dv}/IOBUFDS.v | 0 src/xilibs/{hdl => dv}/IOBUFDSE3.v | 0 src/xilibs/{hdl => dv}/IOBUFDS_DCIEN.v | 0 src/xilibs/{hdl => dv}/IOBUFDS_DIFF_OUT_INTERMDISABLE.v | 0 src/xilibs/{hdl => dv}/IOBUF_INTERMDISABLE.v | 0 src/xilibs/{hdl => dv}/ISERDESE2.v | 0 src/xilibs/{hdl => dv}/MMCME2_ADV.v | 0 src/xilibs/{hdl => dv}/OBUF.v | 0 src/xilibs/{hdl => dv}/OBUFDS.v | 0 src/xilibs/{hdl => dv}/OBUFDS_GTE3_ADV.v | 0 src/xilibs/{hdl => dv}/OBUFT.v | 0 src/xilibs/{hdl => dv}/OBUFTDS.v | 0 src/xilibs/{hdl => dv}/OBUFTDS_DCIEN.v | 0 src/xilibs/{hdl => dv}/ODDR.v | 0 src/xilibs/{hdl => dv}/ODELAYE2.v | 0 src/xilibs/{hdl => dv}/OSERDESE2.v | 0 src/xilibs/{hdl => dv}/PLLE2_ADV.v | 0 src/xilibs/{hdl => dv}/PLLE2_BASE.v | 0 src/xilibs/{hdl => dv}/RAM32X1D.v | 0 src/xilibs/{hdl => dv}/fifo_async_104x32.v | 0 src/xilibs/{hdl => dv}/fifo_generator_vlog_beh.v | 0 44 files changed, 0 insertions(+), 0 deletions(-) rename src/xilibs/{hdl => dv}/BUF.v (100%) rename src/xilibs/{hdl => dv}/BUFG.v (100%) rename src/xilibs/{hdl => dv}/BUFIO.v (100%) rename src/xilibs/{hdl => dv}/BUFR.v (100%) rename src/xilibs/{hdl => dv}/CLKDIV.v (100%) rename src/xilibs/{hdl => dv}/IBUF.v (100%) rename src/xilibs/{hdl => dv}/IBUFDS.v (100%) rename src/xilibs/{hdl => dv}/IBUFDS_DIFF_OUT.v (100%) rename src/xilibs/{hdl => dv}/IBUFDS_GTE2.v (100%) rename src/xilibs/{hdl => dv}/IBUFDS_IBUFDISABLE.v (100%) rename src/xilibs/{hdl => dv}/IBUFDS_IBUFDISABLE_INT.v (100%) rename src/xilibs/{hdl => dv}/IBUFDS_INTERMDISABLE.v (100%) rename src/xilibs/{hdl => dv}/IBUFDS_INTERMDISABLE_INT.v (100%) rename src/xilibs/{hdl => dv}/IBUFE3.v (100%) rename src/xilibs/{hdl => dv}/IBUFGDS.v (100%) rename src/xilibs/{hdl => dv}/IBUF_IBUFDISABLE.v (100%) rename src/xilibs/{hdl => dv}/IBUF_INTERMDISABLE.v (100%) rename src/xilibs/{hdl => dv}/IDDR.v (100%) rename src/xilibs/{hdl => dv}/IDELAYCTRL.v (100%) rename src/xilibs/{hdl => dv}/IDELAYE2.v (100%) rename src/xilibs/{hdl => dv}/IDELAYE2_FINEDELAY.v (100%) rename src/xilibs/{hdl => dv}/IDELAYE3.v (100%) rename src/xilibs/{hdl => dv}/IOBUF.v (100%) rename src/xilibs/{hdl => dv}/IOBUFDS.v (100%) rename src/xilibs/{hdl => dv}/IOBUFDSE3.v (100%) rename src/xilibs/{hdl => dv}/IOBUFDS_DCIEN.v (100%) rename src/xilibs/{hdl => dv}/IOBUFDS_DIFF_OUT_INTERMDISABLE.v (100%) rename src/xilibs/{hdl => dv}/IOBUF_INTERMDISABLE.v (100%) rename src/xilibs/{hdl => dv}/ISERDESE2.v (100%) rename src/xilibs/{hdl => dv}/MMCME2_ADV.v (100%) rename src/xilibs/{hdl => dv}/OBUF.v (100%) rename src/xilibs/{hdl => dv}/OBUFDS.v (100%) rename src/xilibs/{hdl => dv}/OBUFDS_GTE3_ADV.v (100%) rename src/xilibs/{hdl => dv}/OBUFT.v (100%) rename src/xilibs/{hdl => dv}/OBUFTDS.v (100%) rename src/xilibs/{hdl => dv}/OBUFTDS_DCIEN.v (100%) rename src/xilibs/{hdl => dv}/ODDR.v (100%) rename src/xilibs/{hdl => dv}/ODELAYE2.v (100%) rename src/xilibs/{hdl => dv}/OSERDESE2.v (100%) rename src/xilibs/{hdl => dv}/PLLE2_ADV.v (100%) rename src/xilibs/{hdl => dv}/PLLE2_BASE.v (100%) rename src/xilibs/{hdl => dv}/RAM32X1D.v (100%) rename src/xilibs/{hdl => dv}/fifo_async_104x32.v (100%) rename src/xilibs/{hdl => dv}/fifo_generator_vlog_beh.v (100%) diff --git a/src/xilibs/hdl/BUF.v b/src/xilibs/dv/BUF.v similarity index 100% rename from src/xilibs/hdl/BUF.v rename to src/xilibs/dv/BUF.v diff --git a/src/xilibs/hdl/BUFG.v b/src/xilibs/dv/BUFG.v similarity index 100% rename from src/xilibs/hdl/BUFG.v rename to src/xilibs/dv/BUFG.v diff --git a/src/xilibs/hdl/BUFIO.v b/src/xilibs/dv/BUFIO.v similarity index 100% rename from src/xilibs/hdl/BUFIO.v rename to src/xilibs/dv/BUFIO.v diff --git a/src/xilibs/hdl/BUFR.v b/src/xilibs/dv/BUFR.v similarity index 100% rename from src/xilibs/hdl/BUFR.v rename to src/xilibs/dv/BUFR.v diff --git a/src/xilibs/hdl/CLKDIV.v b/src/xilibs/dv/CLKDIV.v similarity index 100% rename from src/xilibs/hdl/CLKDIV.v rename to src/xilibs/dv/CLKDIV.v diff --git a/src/xilibs/hdl/IBUF.v b/src/xilibs/dv/IBUF.v similarity index 100% rename from src/xilibs/hdl/IBUF.v rename to src/xilibs/dv/IBUF.v diff --git a/src/xilibs/hdl/IBUFDS.v b/src/xilibs/dv/IBUFDS.v similarity index 100% rename from src/xilibs/hdl/IBUFDS.v rename to src/xilibs/dv/IBUFDS.v diff --git a/src/xilibs/hdl/IBUFDS_DIFF_OUT.v b/src/xilibs/dv/IBUFDS_DIFF_OUT.v similarity index 100% rename from src/xilibs/hdl/IBUFDS_DIFF_OUT.v rename to src/xilibs/dv/IBUFDS_DIFF_OUT.v diff --git a/src/xilibs/hdl/IBUFDS_GTE2.v b/src/xilibs/dv/IBUFDS_GTE2.v similarity index 100% rename from src/xilibs/hdl/IBUFDS_GTE2.v rename to src/xilibs/dv/IBUFDS_GTE2.v diff --git a/src/xilibs/hdl/IBUFDS_IBUFDISABLE.v b/src/xilibs/dv/IBUFDS_IBUFDISABLE.v similarity index 100% rename from src/xilibs/hdl/IBUFDS_IBUFDISABLE.v rename to src/xilibs/dv/IBUFDS_IBUFDISABLE.v diff --git a/src/xilibs/hdl/IBUFDS_IBUFDISABLE_INT.v b/src/xilibs/dv/IBUFDS_IBUFDISABLE_INT.v similarity index 100% rename from src/xilibs/hdl/IBUFDS_IBUFDISABLE_INT.v rename to src/xilibs/dv/IBUFDS_IBUFDISABLE_INT.v diff --git a/src/xilibs/hdl/IBUFDS_INTERMDISABLE.v b/src/xilibs/dv/IBUFDS_INTERMDISABLE.v similarity index 100% rename from src/xilibs/hdl/IBUFDS_INTERMDISABLE.v rename to src/xilibs/dv/IBUFDS_INTERMDISABLE.v diff --git a/src/xilibs/hdl/IBUFDS_INTERMDISABLE_INT.v b/src/xilibs/dv/IBUFDS_INTERMDISABLE_INT.v similarity index 100% rename from src/xilibs/hdl/IBUFDS_INTERMDISABLE_INT.v rename to src/xilibs/dv/IBUFDS_INTERMDISABLE_INT.v diff --git a/src/xilibs/hdl/IBUFE3.v b/src/xilibs/dv/IBUFE3.v similarity index 100% rename from src/xilibs/hdl/IBUFE3.v rename to src/xilibs/dv/IBUFE3.v diff --git a/src/xilibs/hdl/IBUFGDS.v b/src/xilibs/dv/IBUFGDS.v similarity index 100% rename from src/xilibs/hdl/IBUFGDS.v rename to src/xilibs/dv/IBUFGDS.v diff --git a/src/xilibs/hdl/IBUF_IBUFDISABLE.v b/src/xilibs/dv/IBUF_IBUFDISABLE.v similarity index 100% rename from src/xilibs/hdl/IBUF_IBUFDISABLE.v rename to src/xilibs/dv/IBUF_IBUFDISABLE.v diff --git a/src/xilibs/hdl/IBUF_INTERMDISABLE.v b/src/xilibs/dv/IBUF_INTERMDISABLE.v similarity index 100% rename from src/xilibs/hdl/IBUF_INTERMDISABLE.v rename to src/xilibs/dv/IBUF_INTERMDISABLE.v diff --git a/src/xilibs/hdl/IDDR.v b/src/xilibs/dv/IDDR.v similarity index 100% rename from src/xilibs/hdl/IDDR.v rename to src/xilibs/dv/IDDR.v diff --git a/src/xilibs/hdl/IDELAYCTRL.v b/src/xilibs/dv/IDELAYCTRL.v similarity index 100% rename from src/xilibs/hdl/IDELAYCTRL.v rename to src/xilibs/dv/IDELAYCTRL.v diff --git a/src/xilibs/hdl/IDELAYE2.v b/src/xilibs/dv/IDELAYE2.v similarity index 100% rename from src/xilibs/hdl/IDELAYE2.v rename to src/xilibs/dv/IDELAYE2.v diff --git a/src/xilibs/hdl/IDELAYE2_FINEDELAY.v b/src/xilibs/dv/IDELAYE2_FINEDELAY.v similarity index 100% rename from src/xilibs/hdl/IDELAYE2_FINEDELAY.v rename to src/xilibs/dv/IDELAYE2_FINEDELAY.v diff --git a/src/xilibs/hdl/IDELAYE3.v b/src/xilibs/dv/IDELAYE3.v similarity index 100% rename from src/xilibs/hdl/IDELAYE3.v rename to src/xilibs/dv/IDELAYE3.v diff --git a/src/xilibs/hdl/IOBUF.v b/src/xilibs/dv/IOBUF.v similarity index 100% rename from src/xilibs/hdl/IOBUF.v rename to src/xilibs/dv/IOBUF.v diff --git a/src/xilibs/hdl/IOBUFDS.v b/src/xilibs/dv/IOBUFDS.v similarity index 100% rename from src/xilibs/hdl/IOBUFDS.v rename to src/xilibs/dv/IOBUFDS.v diff --git a/src/xilibs/hdl/IOBUFDSE3.v b/src/xilibs/dv/IOBUFDSE3.v similarity index 100% rename from src/xilibs/hdl/IOBUFDSE3.v rename to src/xilibs/dv/IOBUFDSE3.v diff --git a/src/xilibs/hdl/IOBUFDS_DCIEN.v b/src/xilibs/dv/IOBUFDS_DCIEN.v similarity index 100% rename from src/xilibs/hdl/IOBUFDS_DCIEN.v rename to src/xilibs/dv/IOBUFDS_DCIEN.v diff --git a/src/xilibs/hdl/IOBUFDS_DIFF_OUT_INTERMDISABLE.v b/src/xilibs/dv/IOBUFDS_DIFF_OUT_INTERMDISABLE.v similarity index 100% rename from src/xilibs/hdl/IOBUFDS_DIFF_OUT_INTERMDISABLE.v rename to src/xilibs/dv/IOBUFDS_DIFF_OUT_INTERMDISABLE.v diff --git a/src/xilibs/hdl/IOBUF_INTERMDISABLE.v b/src/xilibs/dv/IOBUF_INTERMDISABLE.v similarity index 100% rename from src/xilibs/hdl/IOBUF_INTERMDISABLE.v rename to src/xilibs/dv/IOBUF_INTERMDISABLE.v diff --git a/src/xilibs/hdl/ISERDESE2.v b/src/xilibs/dv/ISERDESE2.v similarity index 100% rename from src/xilibs/hdl/ISERDESE2.v rename to src/xilibs/dv/ISERDESE2.v diff --git a/src/xilibs/hdl/MMCME2_ADV.v b/src/xilibs/dv/MMCME2_ADV.v similarity index 100% rename from src/xilibs/hdl/MMCME2_ADV.v rename to src/xilibs/dv/MMCME2_ADV.v diff --git a/src/xilibs/hdl/OBUF.v b/src/xilibs/dv/OBUF.v similarity index 100% rename from src/xilibs/hdl/OBUF.v rename to src/xilibs/dv/OBUF.v diff --git a/src/xilibs/hdl/OBUFDS.v b/src/xilibs/dv/OBUFDS.v similarity index 100% rename from src/xilibs/hdl/OBUFDS.v rename to src/xilibs/dv/OBUFDS.v diff --git a/src/xilibs/hdl/OBUFDS_GTE3_ADV.v b/src/xilibs/dv/OBUFDS_GTE3_ADV.v similarity index 100% rename from src/xilibs/hdl/OBUFDS_GTE3_ADV.v rename to src/xilibs/dv/OBUFDS_GTE3_ADV.v diff --git a/src/xilibs/hdl/OBUFT.v b/src/xilibs/dv/OBUFT.v similarity index 100% rename from src/xilibs/hdl/OBUFT.v rename to src/xilibs/dv/OBUFT.v diff --git a/src/xilibs/hdl/OBUFTDS.v b/src/xilibs/dv/OBUFTDS.v similarity index 100% rename from src/xilibs/hdl/OBUFTDS.v rename to src/xilibs/dv/OBUFTDS.v diff --git a/src/xilibs/hdl/OBUFTDS_DCIEN.v b/src/xilibs/dv/OBUFTDS_DCIEN.v similarity index 100% rename from src/xilibs/hdl/OBUFTDS_DCIEN.v rename to src/xilibs/dv/OBUFTDS_DCIEN.v diff --git a/src/xilibs/hdl/ODDR.v b/src/xilibs/dv/ODDR.v similarity index 100% rename from src/xilibs/hdl/ODDR.v rename to src/xilibs/dv/ODDR.v diff --git a/src/xilibs/hdl/ODELAYE2.v b/src/xilibs/dv/ODELAYE2.v similarity index 100% rename from src/xilibs/hdl/ODELAYE2.v rename to src/xilibs/dv/ODELAYE2.v diff --git a/src/xilibs/hdl/OSERDESE2.v b/src/xilibs/dv/OSERDESE2.v similarity index 100% rename from src/xilibs/hdl/OSERDESE2.v rename to src/xilibs/dv/OSERDESE2.v diff --git a/src/xilibs/hdl/PLLE2_ADV.v b/src/xilibs/dv/PLLE2_ADV.v similarity index 100% rename from src/xilibs/hdl/PLLE2_ADV.v rename to src/xilibs/dv/PLLE2_ADV.v diff --git a/src/xilibs/hdl/PLLE2_BASE.v b/src/xilibs/dv/PLLE2_BASE.v similarity index 100% rename from src/xilibs/hdl/PLLE2_BASE.v rename to src/xilibs/dv/PLLE2_BASE.v diff --git a/src/xilibs/hdl/RAM32X1D.v b/src/xilibs/dv/RAM32X1D.v similarity index 100% rename from src/xilibs/hdl/RAM32X1D.v rename to src/xilibs/dv/RAM32X1D.v diff --git a/src/xilibs/hdl/fifo_async_104x32.v b/src/xilibs/dv/fifo_async_104x32.v similarity index 100% rename from src/xilibs/hdl/fifo_async_104x32.v rename to src/xilibs/dv/fifo_async_104x32.v diff --git a/src/xilibs/hdl/fifo_generator_vlog_beh.v b/src/xilibs/dv/fifo_generator_vlog_beh.v similarity index 100% rename from src/xilibs/hdl/fifo_generator_vlog_beh.v rename to src/xilibs/dv/fifo_generator_vlog_beh.v