From b83ef81db6f7e942a955bf826227cdf6847cde7e Mon Sep 17 00:00:00 2001 From: aolofsson Date: Mon, 15 Dec 2014 15:26:07 -0500 Subject: [PATCH] Wrong bus width (just cleanup..) --- erx/hdl/erx_protocol.v | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/erx/hdl/erx_protocol.v b/erx/hdl/erx_protocol.v index aff5793..61fec0b 100644 --- a/erx/hdl/erx_protocol.v +++ b/erx/hdl/erx_protocol.v @@ -138,7 +138,7 @@ module erx_protocol (/*AUTOARG*/ rxactive_in <= 1'b1; end else begin rxalign_in <= 3'd0; // No edge - rxactive_in <= 3'd0; + rxactive_in <= 1'd0; end end // always @ ( posedge rxlclk_p )